1*4549e789STom Rini// SPDX-License-Identifier: GPL-2.0+ OR X11 2126fe70dSShaohui Xie/* 3126fe70dSShaohui Xie * Device Tree Include file for Freescale Layerscape-1046A family SoC. 4126fe70dSShaohui Xie * 5126fe70dSShaohui Xie * Copyright (C) 2016, Freescale Semiconductor 6126fe70dSShaohui Xie * 7126fe70dSShaohui Xie * Mingkai Hu <Mingkai.hu@nxp.com> 8126fe70dSShaohui Xie */ 9126fe70dSShaohui Xie 10126fe70dSShaohui Xie/include/ "fsl-ls1046a.dtsi" 11126fe70dSShaohui Xie 12126fe70dSShaohui Xie/ { 13126fe70dSShaohui Xie model = "LS1046A QDS Board"; 14126fe70dSShaohui Xie aliases { 15126fe70dSShaohui Xie spi0 = &qspi; 16126fe70dSShaohui Xie spi1 = &dspi0; 17126fe70dSShaohui Xie }; 18126fe70dSShaohui Xie}; 19126fe70dSShaohui Xie 20126fe70dSShaohui Xie&dspi0 { 21126fe70dSShaohui Xie bus-num = <0>; 22126fe70dSShaohui Xie status = "okay"; 23126fe70dSShaohui Xie 24126fe70dSShaohui Xie dflash0: n25q128a { 25126fe70dSShaohui Xie #address-cells = <1>; 26126fe70dSShaohui Xie #size-cells = <1>; 27126fe70dSShaohui Xie compatible = "spi-flash"; 28126fe70dSShaohui Xie spi-max-frequency = <1000000>; /* input clock */ 29126fe70dSShaohui Xie spi-cpol; 30126fe70dSShaohui Xie spi-cpha; 31126fe70dSShaohui Xie reg = <0>; 32126fe70dSShaohui Xie }; 33126fe70dSShaohui Xie 34126fe70dSShaohui Xie dflash1: sst25wf040b { 35126fe70dSShaohui Xie #address-cells = <1>; 36126fe70dSShaohui Xie #size-cells = <1>; 37126fe70dSShaohui Xie compatible = "spi-flash"; 38126fe70dSShaohui Xie spi-max-frequency = <3500000>; 39126fe70dSShaohui Xie spi-cpol; 40126fe70dSShaohui Xie spi-cpha; 41126fe70dSShaohui Xie reg = <1>; 42126fe70dSShaohui Xie }; 43126fe70dSShaohui Xie 44126fe70dSShaohui Xie dflash2: en25s64 { 45126fe70dSShaohui Xie #address-cells = <1>; 46126fe70dSShaohui Xie #size-cells = <1>; 47126fe70dSShaohui Xie compatible = "spi-flash"; 48126fe70dSShaohui Xie spi-max-frequency = <3500000>; 49126fe70dSShaohui Xie spi-cpol; 50126fe70dSShaohui Xie spi-cpha; 51126fe70dSShaohui Xie reg = <2>; 52126fe70dSShaohui Xie }; 53126fe70dSShaohui Xie}; 54126fe70dSShaohui Xie 55126fe70dSShaohui Xie&qspi { 56126fe70dSShaohui Xie bus-num = <0>; 57126fe70dSShaohui Xie status = "okay"; 58126fe70dSShaohui Xie 59126fe70dSShaohui Xie qflash0: s25fl128s@0 { 60126fe70dSShaohui Xie #address-cells = <1>; 61126fe70dSShaohui Xie #size-cells = <1>; 62126fe70dSShaohui Xie compatible = "spi-flash"; 63126fe70dSShaohui Xie spi-max-frequency = <20000000>; 64126fe70dSShaohui Xie reg = <0>; 65126fe70dSShaohui Xie }; 66126fe70dSShaohui Xie}; 67126fe70dSShaohui Xie 68126fe70dSShaohui Xie&duart0 { 69126fe70dSShaohui Xie status = "okay"; 70126fe70dSShaohui Xie}; 71126fe70dSShaohui Xie 72126fe70dSShaohui Xie&duart1 { 73126fe70dSShaohui Xie status = "okay"; 74126fe70dSShaohui Xie}; 75fdc2b54cSShaohui Xie 76fdc2b54cSShaohui Xie&lpuart0 { 77fdc2b54cSShaohui Xie status = "okay"; 78fdc2b54cSShaohui Xie}; 79