1*126fe70dSShaohui Xie/* 2*126fe70dSShaohui Xie * Device Tree Include file for Freescale Layerscape-1046A family SoC. 3*126fe70dSShaohui Xie * 4*126fe70dSShaohui Xie * Copyright (C) 2016, Freescale Semiconductor 5*126fe70dSShaohui Xie * 6*126fe70dSShaohui Xie * Mingkai Hu <Mingkai.hu@nxp.com> 7*126fe70dSShaohui Xie * 8*126fe70dSShaohui Xie * This file is licensed under the terms of the GNU General Public 9*126fe70dSShaohui Xie * License version 2. This program is licensed "as is" without any 10*126fe70dSShaohui Xie * warranty of any kind, whether express or implied. 11*126fe70dSShaohui Xie */ 12*126fe70dSShaohui Xie 13*126fe70dSShaohui Xie/include/ "fsl-ls1046a.dtsi" 14*126fe70dSShaohui Xie 15*126fe70dSShaohui Xie/ { 16*126fe70dSShaohui Xie model = "LS1046A QDS Board"; 17*126fe70dSShaohui Xie aliases { 18*126fe70dSShaohui Xie spi0 = &qspi; 19*126fe70dSShaohui Xie spi1 = &dspi0; 20*126fe70dSShaohui Xie }; 21*126fe70dSShaohui Xie}; 22*126fe70dSShaohui Xie 23*126fe70dSShaohui Xie&dspi0 { 24*126fe70dSShaohui Xie bus-num = <0>; 25*126fe70dSShaohui Xie status = "okay"; 26*126fe70dSShaohui Xie 27*126fe70dSShaohui Xie dflash0: n25q128a { 28*126fe70dSShaohui Xie #address-cells = <1>; 29*126fe70dSShaohui Xie #size-cells = <1>; 30*126fe70dSShaohui Xie compatible = "spi-flash"; 31*126fe70dSShaohui Xie spi-max-frequency = <1000000>; /* input clock */ 32*126fe70dSShaohui Xie spi-cpol; 33*126fe70dSShaohui Xie spi-cpha; 34*126fe70dSShaohui Xie reg = <0>; 35*126fe70dSShaohui Xie }; 36*126fe70dSShaohui Xie 37*126fe70dSShaohui Xie dflash1: sst25wf040b { 38*126fe70dSShaohui Xie #address-cells = <1>; 39*126fe70dSShaohui Xie #size-cells = <1>; 40*126fe70dSShaohui Xie compatible = "spi-flash"; 41*126fe70dSShaohui Xie spi-max-frequency = <3500000>; 42*126fe70dSShaohui Xie spi-cpol; 43*126fe70dSShaohui Xie spi-cpha; 44*126fe70dSShaohui Xie reg = <1>; 45*126fe70dSShaohui Xie }; 46*126fe70dSShaohui Xie 47*126fe70dSShaohui Xie dflash2: en25s64 { 48*126fe70dSShaohui Xie #address-cells = <1>; 49*126fe70dSShaohui Xie #size-cells = <1>; 50*126fe70dSShaohui Xie compatible = "spi-flash"; 51*126fe70dSShaohui Xie spi-max-frequency = <3500000>; 52*126fe70dSShaohui Xie spi-cpol; 53*126fe70dSShaohui Xie spi-cpha; 54*126fe70dSShaohui Xie reg = <2>; 55*126fe70dSShaohui Xie }; 56*126fe70dSShaohui Xie}; 57*126fe70dSShaohui Xie 58*126fe70dSShaohui Xie&qspi { 59*126fe70dSShaohui Xie bus-num = <0>; 60*126fe70dSShaohui Xie status = "okay"; 61*126fe70dSShaohui Xie 62*126fe70dSShaohui Xie qflash0: s25fl128s@0 { 63*126fe70dSShaohui Xie #address-cells = <1>; 64*126fe70dSShaohui Xie #size-cells = <1>; 65*126fe70dSShaohui Xie compatible = "spi-flash"; 66*126fe70dSShaohui Xie spi-max-frequency = <20000000>; 67*126fe70dSShaohui Xie reg = <0>; 68*126fe70dSShaohui Xie }; 69*126fe70dSShaohui Xie}; 70*126fe70dSShaohui Xie 71*126fe70dSShaohui Xie&duart0 { 72*126fe70dSShaohui Xie status = "okay"; 73*126fe70dSShaohui Xie}; 74*126fe70dSShaohui Xie 75*126fe70dSShaohui Xie&duart1 { 76*126fe70dSShaohui Xie status = "okay"; 77*126fe70dSShaohui Xie}; 78