1/*
2 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
3 *
4 * Copyright (C) 2015, Freescale Semiconductor
5 *
6 * Mingkai Hu <Mingkai.hu@freescale.com>
7 *
8 * SPDX-License-Identifier:    GPL-2.0+	X11
9 */
10
11/dts-v1/;
12/include/ "fsl-ls1043a.dtsi"
13
14/ {
15	model = "LS1043A RDB Board";
16
17        aliases {
18		spi1 = &dspi0;
19        };
20
21};
22
23&dspi0 {
24	bus-num = <0>;
25	status = "okay";
26
27	dspiflash: n25q12a {
28		#address-cells = <1>;
29		#size-cells = <1>;
30		compatible = "spi-flash";
31		reg = <0>;
32		spi-max-frequency = <1000000>; /* input clock */
33	};
34
35};
36
37&i2c0 {
38	status = "okay";
39	ina220@40 {
40		compatible = "ti,ina220";
41		reg = <0x40>;
42		shunt-resistor = <1000>;
43	};
44	adt7461a@4c {
45		compatible = "adi,adt7461a";
46		reg = <0x4c>;
47	};
48	eeprom@52 {
49		compatible = "at24,24c512";
50		reg = <0x52>;
51	};
52
53	eeprom@53 {
54		compatible = "at24,24c512";
55		reg = <0x53>;
56	};
57
58	rtc@68 {
59		compatible = "pericom,pt7c4338";
60		reg = <0x68>;
61	};
62};
63
64&ifc {
65	status = "okay";
66	#address-cells = <2>;
67	#size-cells = <1>;
68	/* NOR, NAND Flashes and FPGA on board */
69	ranges = <0x0 0x0 0x0 0x60000000 0x08000000
70		  0x1 0x0 0x0 0x7e800000 0x00010000
71		  0x2 0x0 0x0 0x7fb00000 0x00000100>;
72
73		nor@0,0 {
74			compatible = "cfi-flash";
75			#address-cells = <1>;
76			#size-cells = <1>;
77			reg = <0x0 0x0 0x8000000>;
78			bank-width = <2>;
79			device-width = <1>;
80		};
81
82		nand@1,0 {
83			compatible = "fsl,ifc-nand";
84			#address-cells = <1>;
85			#size-cells = <1>;
86			reg = <0x1 0x0 0x10000>;
87		};
88
89		cpld: board-control@2,0 {
90			compatible = "fsl,ls1043ardb-cpld";
91			reg = <0x2 0x0 0x0000100>;
92		};
93};
94
95&duart0 {
96	status = "okay";
97};
98
99&duart1 {
100	status = "okay";
101};
102