18e728aa9SWenbin Song/* 28e728aa9SWenbin Song * Device Tree Include file for Freescale Layerscape-1043A family SoC. 38e728aa9SWenbin Song * 48e728aa9SWenbin Song * Copyright (C) 2015, Freescale Semiconductor 58e728aa9SWenbin Song * 68e728aa9SWenbin Song * Mingkai Hu <Mingkai.hu@freescale.com> 78e728aa9SWenbin Song * 88e728aa9SWenbin Song * This file is licensed under the terms of the GNU General Public 98e728aa9SWenbin Song * License version 2. This program is licensed "as is" without any 108e728aa9SWenbin Song * warranty of any kind, whether express or implied. 118e728aa9SWenbin Song */ 128e728aa9SWenbin Song 138e728aa9SWenbin Song/include/ "fsl-ls1043a.dtsi" 148e728aa9SWenbin Song 158e728aa9SWenbin Song/ { 168e728aa9SWenbin Song model = "LS1043A QDS Board"; 17*73a5de4cSQianyu Gong aliases { 18*73a5de4cSQianyu Gong spi0 = &qspi; 19*73a5de4cSQianyu Gong spi1 = &dspi0; 20*73a5de4cSQianyu Gong }; 21*73a5de4cSQianyu Gong}; 22*73a5de4cSQianyu Gong 23*73a5de4cSQianyu Gong&dspi0 { 24*73a5de4cSQianyu Gong bus-num = <0>; 25*73a5de4cSQianyu Gong status = "okay"; 26*73a5de4cSQianyu Gong 27*73a5de4cSQianyu Gong dflash0: n25q128a { 28*73a5de4cSQianyu Gong #address-cells = <1>; 29*73a5de4cSQianyu Gong #size-cells = <1>; 30*73a5de4cSQianyu Gong compatible = "spi-flash"; 31*73a5de4cSQianyu Gong reg = <0>; 32*73a5de4cSQianyu Gong spi-max-frequency = <1000000>; /* input clock */ 33*73a5de4cSQianyu Gong }; 34*73a5de4cSQianyu Gong 35*73a5de4cSQianyu Gong dflash1: sst25wf040b { 36*73a5de4cSQianyu Gong #address-cells = <1>; 37*73a5de4cSQianyu Gong #size-cells = <1>; 38*73a5de4cSQianyu Gong compatible = "spi-flash"; 39*73a5de4cSQianyu Gong spi-max-frequency = <3500000>; 40*73a5de4cSQianyu Gong reg = <1>; 41*73a5de4cSQianyu Gong }; 42*73a5de4cSQianyu Gong 43*73a5de4cSQianyu Gong dflash2: en25s64 { 44*73a5de4cSQianyu Gong #address-cells = <1>; 45*73a5de4cSQianyu Gong #size-cells = <1>; 46*73a5de4cSQianyu Gong compatible = "spi-flash"; 47*73a5de4cSQianyu Gong spi-max-frequency = <3500000>; 48*73a5de4cSQianyu Gong reg = <2>; 49*73a5de4cSQianyu Gong }; 50*73a5de4cSQianyu Gong}; 51*73a5de4cSQianyu Gong 52*73a5de4cSQianyu Gong&qspi { 53*73a5de4cSQianyu Gong bus-num = <0>; 54*73a5de4cSQianyu Gong status = "okay"; 55*73a5de4cSQianyu Gong 56*73a5de4cSQianyu Gong qflash0: s25fl128s@0 { 57*73a5de4cSQianyu Gong #address-cells = <1>; 58*73a5de4cSQianyu Gong #size-cells = <1>; 59*73a5de4cSQianyu Gong compatible = "spi-flash"; 60*73a5de4cSQianyu Gong spi-max-frequency = <20000000>; 61*73a5de4cSQianyu Gong reg = <0>; 62*73a5de4cSQianyu Gong }; 638e728aa9SWenbin Song}; 648e728aa9SWenbin Song 658e728aa9SWenbin Song&i2c0 { 668e728aa9SWenbin Song status = "okay"; 678e728aa9SWenbin Song pca9547@77 { 688e728aa9SWenbin Song compatible = "philips,pca9547"; 698e728aa9SWenbin Song reg = <0x77>; 708e728aa9SWenbin Song #address-cells = <1>; 718e728aa9SWenbin Song #size-cells = <0>; 728e728aa9SWenbin Song 738e728aa9SWenbin Song i2c@0 { 748e728aa9SWenbin Song #address-cells = <1>; 758e728aa9SWenbin Song #size-cells = <0>; 768e728aa9SWenbin Song reg = <0x0>; 778e728aa9SWenbin Song 788e728aa9SWenbin Song rtc@68 { 798e728aa9SWenbin Song compatible = "dallas,ds3232"; 808e728aa9SWenbin Song reg = <0x68>; 818e728aa9SWenbin Song /* IRQ10_B */ 828e728aa9SWenbin Song interrupts = <0 150 0x4>; 838e728aa9SWenbin Song }; 848e728aa9SWenbin Song }; 858e728aa9SWenbin Song 868e728aa9SWenbin Song i2c@2 { 878e728aa9SWenbin Song #address-cells = <1>; 888e728aa9SWenbin Song #size-cells = <0>; 898e728aa9SWenbin Song reg = <0x2>; 908e728aa9SWenbin Song 918e728aa9SWenbin Song ina220@40 { 928e728aa9SWenbin Song compatible = "ti,ina220"; 938e728aa9SWenbin Song reg = <0x40>; 948e728aa9SWenbin Song shunt-resistor = <1000>; 958e728aa9SWenbin Song }; 968e728aa9SWenbin Song 978e728aa9SWenbin Song ina220@41 { 988e728aa9SWenbin Song compatible = "ti,ina220"; 998e728aa9SWenbin Song reg = <0x41>; 1008e728aa9SWenbin Song shunt-resistor = <1000>; 1018e728aa9SWenbin Song }; 1028e728aa9SWenbin Song }; 1038e728aa9SWenbin Song 1048e728aa9SWenbin Song i2c@3 { 1058e728aa9SWenbin Song #address-cells = <1>; 1068e728aa9SWenbin Song #size-cells = <0>; 1078e728aa9SWenbin Song reg = <0x3>; 1088e728aa9SWenbin Song 1098e728aa9SWenbin Song eeprom@56 { 1108e728aa9SWenbin Song compatible = "at24,24c512"; 1118e728aa9SWenbin Song reg = <0x56>; 1128e728aa9SWenbin Song }; 1138e728aa9SWenbin Song 1148e728aa9SWenbin Song eeprom@57 { 1158e728aa9SWenbin Song compatible = "at24,24c512"; 1168e728aa9SWenbin Song reg = <0x57>; 1178e728aa9SWenbin Song }; 1188e728aa9SWenbin Song 1198e728aa9SWenbin Song adt7461a@4c { 1208e728aa9SWenbin Song compatible = "adt7461a"; 1218e728aa9SWenbin Song reg = <0x4c>; 1228e728aa9SWenbin Song }; 1238e728aa9SWenbin Song }; 1248e728aa9SWenbin Song }; 1258e728aa9SWenbin Song}; 1268e728aa9SWenbin Song 1278e728aa9SWenbin Song&ifc { 1288e728aa9SWenbin Song #address-cells = <2>; 1298e728aa9SWenbin Song #size-cells = <1>; 1308e728aa9SWenbin Song /* NOR, NAND Flashes and FPGA on board */ 1318e728aa9SWenbin Song ranges = <0x0 0x0 0x0 0x60000000 0x08000000 1328e728aa9SWenbin Song 0x2 0x0 0x0 0x7e800000 0x00010000 1338e728aa9SWenbin Song 0x3 0x0 0x0 0x7fb00000 0x00000100>; 1348e728aa9SWenbin Song status = "okay"; 1358e728aa9SWenbin Song 1368e728aa9SWenbin Song nor@0,0 { 1378e728aa9SWenbin Song #address-cells = <1>; 1388e728aa9SWenbin Song #size-cells = <1>; 1398e728aa9SWenbin Song compatible = "cfi-flash"; 1408e728aa9SWenbin Song reg = <0x0 0x0 0x8000000>; 1418e728aa9SWenbin Song bank-width = <2>; 1428e728aa9SWenbin Song device-width = <1>; 1438e728aa9SWenbin Song }; 1448e728aa9SWenbin Song 1458e728aa9SWenbin Song nand@2,0 { 1468e728aa9SWenbin Song compatible = "fsl,ifc-nand"; 1478e728aa9SWenbin Song #address-cells = <1>; 1488e728aa9SWenbin Song #size-cells = <1>; 1498e728aa9SWenbin Song reg = <0x1 0x0 0x10000>; 1508e728aa9SWenbin Song }; 1518e728aa9SWenbin Song 1528e728aa9SWenbin Song fpga: board-control@3,0 { 1538e728aa9SWenbin Song #address-cells = <1>; 1548e728aa9SWenbin Song #size-cells = <1>; 1558e728aa9SWenbin Song compatible = "simple-bus"; 1568e728aa9SWenbin Song reg = <0x3 0x0 0x0000100>; 1578e728aa9SWenbin Song bank-width = <1>; 1588e728aa9SWenbin Song device-width = <1>; 1598e728aa9SWenbin Song ranges = <0 3 0 0x100>; 1608e728aa9SWenbin Song }; 1618e728aa9SWenbin Song}; 1628e728aa9SWenbin Song 1638e728aa9SWenbin Song&duart0 { 1648e728aa9SWenbin Song status = "okay"; 1658e728aa9SWenbin Song}; 1668e728aa9SWenbin Song 1678e728aa9SWenbin Song&duart1 { 1688e728aa9SWenbin Song status = "okay"; 1698e728aa9SWenbin Song}; 1702970e14fSWenbin Song 1712970e14fSWenbin Song&lpuart0 { 1722970e14fSWenbin Song status = "okay"; 1732970e14fSWenbin Song}; 174