18e728aa9SWenbin Song/* 28e728aa9SWenbin Song * Device Tree Include file for Freescale Layerscape-1043A family SoC. 38e728aa9SWenbin Song * 48e728aa9SWenbin Song * Copyright (C) 2015, Freescale Semiconductor 58e728aa9SWenbin Song * 68e728aa9SWenbin Song * Mingkai Hu <Mingkai.hu@freescale.com> 78e728aa9SWenbin Song * 88e728aa9SWenbin Song * This file is licensed under the terms of the GNU General Public 98e728aa9SWenbin Song * License version 2. This program is licensed "as is" without any 108e728aa9SWenbin Song * warranty of any kind, whether express or implied. 118e728aa9SWenbin Song */ 128e728aa9SWenbin Song 138e728aa9SWenbin Song/include/ "fsl-ls1043a.dtsi" 148e728aa9SWenbin Song 158e728aa9SWenbin Song/ { 168e728aa9SWenbin Song model = "LS1043A QDS Board"; 1773a5de4cSQianyu Gong aliases { 1873a5de4cSQianyu Gong spi0 = &qspi; 1973a5de4cSQianyu Gong spi1 = &dspi0; 2073a5de4cSQianyu Gong }; 2173a5de4cSQianyu Gong}; 2273a5de4cSQianyu Gong 2373a5de4cSQianyu Gong&dspi0 { 2473a5de4cSQianyu Gong bus-num = <0>; 2573a5de4cSQianyu Gong status = "okay"; 2673a5de4cSQianyu Gong 2773a5de4cSQianyu Gong dflash0: n25q128a { 2873a5de4cSQianyu Gong #address-cells = <1>; 2973a5de4cSQianyu Gong #size-cells = <1>; 3073a5de4cSQianyu Gong compatible = "spi-flash"; 3173a5de4cSQianyu Gong spi-max-frequency = <1000000>; /* input clock */ 322ef846e4SQianyu Gong spi-cpol; 332ef846e4SQianyu Gong spi-cpha; 342ef846e4SQianyu Gong reg = <0>; 3573a5de4cSQianyu Gong }; 3673a5de4cSQianyu Gong 3773a5de4cSQianyu Gong dflash1: sst25wf040b { 3873a5de4cSQianyu Gong #address-cells = <1>; 3973a5de4cSQianyu Gong #size-cells = <1>; 4073a5de4cSQianyu Gong compatible = "spi-flash"; 4173a5de4cSQianyu Gong spi-max-frequency = <3500000>; 422ef846e4SQianyu Gong spi-cpol; 432ef846e4SQianyu Gong spi-cpha; 4473a5de4cSQianyu Gong reg = <1>; 4573a5de4cSQianyu Gong }; 4673a5de4cSQianyu Gong 4773a5de4cSQianyu Gong dflash2: en25s64 { 4873a5de4cSQianyu Gong #address-cells = <1>; 4973a5de4cSQianyu Gong #size-cells = <1>; 5073a5de4cSQianyu Gong compatible = "spi-flash"; 5173a5de4cSQianyu Gong spi-max-frequency = <3500000>; 522ef846e4SQianyu Gong spi-cpol; 532ef846e4SQianyu Gong spi-cpha; 5473a5de4cSQianyu Gong reg = <2>; 5573a5de4cSQianyu Gong }; 5673a5de4cSQianyu Gong}; 5773a5de4cSQianyu Gong 5873a5de4cSQianyu Gong&qspi { 5973a5de4cSQianyu Gong bus-num = <0>; 6073a5de4cSQianyu Gong status = "okay"; 6173a5de4cSQianyu Gong 6273a5de4cSQianyu Gong qflash0: s25fl128s@0 { 6373a5de4cSQianyu Gong #address-cells = <1>; 6473a5de4cSQianyu Gong #size-cells = <1>; 6573a5de4cSQianyu Gong compatible = "spi-flash"; 6673a5de4cSQianyu Gong spi-max-frequency = <20000000>; 6773a5de4cSQianyu Gong reg = <0>; 6873a5de4cSQianyu Gong }; 698e728aa9SWenbin Song}; 708e728aa9SWenbin Song 718e728aa9SWenbin Song&i2c0 { 728e728aa9SWenbin Song status = "okay"; 738e728aa9SWenbin Song pca9547@77 { 748e728aa9SWenbin Song compatible = "philips,pca9547"; 758e728aa9SWenbin Song reg = <0x77>; 768e728aa9SWenbin Song #address-cells = <1>; 778e728aa9SWenbin Song #size-cells = <0>; 788e728aa9SWenbin Song 798e728aa9SWenbin Song i2c@0 { 808e728aa9SWenbin Song #address-cells = <1>; 818e728aa9SWenbin Song #size-cells = <0>; 828e728aa9SWenbin Song reg = <0x0>; 838e728aa9SWenbin Song 848e728aa9SWenbin Song rtc@68 { 858e728aa9SWenbin Song compatible = "dallas,ds3232"; 868e728aa9SWenbin Song reg = <0x68>; 878e728aa9SWenbin Song /* IRQ10_B */ 888e728aa9SWenbin Song interrupts = <0 150 0x4>; 898e728aa9SWenbin Song }; 908e728aa9SWenbin Song }; 918e728aa9SWenbin Song 928e728aa9SWenbin Song i2c@2 { 938e728aa9SWenbin Song #address-cells = <1>; 948e728aa9SWenbin Song #size-cells = <0>; 958e728aa9SWenbin Song reg = <0x2>; 968e728aa9SWenbin Song 978e728aa9SWenbin Song ina220@40 { 988e728aa9SWenbin Song compatible = "ti,ina220"; 998e728aa9SWenbin Song reg = <0x40>; 1008e728aa9SWenbin Song shunt-resistor = <1000>; 1018e728aa9SWenbin Song }; 1028e728aa9SWenbin Song 1038e728aa9SWenbin Song ina220@41 { 1048e728aa9SWenbin Song compatible = "ti,ina220"; 1058e728aa9SWenbin Song reg = <0x41>; 1068e728aa9SWenbin Song shunt-resistor = <1000>; 1078e728aa9SWenbin Song }; 1088e728aa9SWenbin Song }; 1098e728aa9SWenbin Song 1108e728aa9SWenbin Song i2c@3 { 1118e728aa9SWenbin Song #address-cells = <1>; 1128e728aa9SWenbin Song #size-cells = <0>; 1138e728aa9SWenbin Song reg = <0x3>; 1148e728aa9SWenbin Song 1158e728aa9SWenbin Song eeprom@56 { 1168e728aa9SWenbin Song compatible = "at24,24c512"; 1178e728aa9SWenbin Song reg = <0x56>; 1188e728aa9SWenbin Song }; 1198e728aa9SWenbin Song 1208e728aa9SWenbin Song eeprom@57 { 1218e728aa9SWenbin Song compatible = "at24,24c512"; 1228e728aa9SWenbin Song reg = <0x57>; 1238e728aa9SWenbin Song }; 1248e728aa9SWenbin Song 1258e728aa9SWenbin Song adt7461a@4c { 1268e728aa9SWenbin Song compatible = "adt7461a"; 1278e728aa9SWenbin Song reg = <0x4c>; 1288e728aa9SWenbin Song }; 1298e728aa9SWenbin Song }; 1308e728aa9SWenbin Song }; 1318e728aa9SWenbin Song}; 1328e728aa9SWenbin Song 1338e728aa9SWenbin Song&ifc { 1348e728aa9SWenbin Song #address-cells = <2>; 1358e728aa9SWenbin Song #size-cells = <1>; 1368e728aa9SWenbin Song /* NOR, NAND Flashes and FPGA on board */ 1378e728aa9SWenbin Song ranges = <0x0 0x0 0x0 0x60000000 0x08000000 138*4002eab2SHou Zhiqiang 0x1 0x0 0x0 0x7e800000 0x00010000 139*4002eab2SHou Zhiqiang 0x2 0x0 0x0 0x7fb00000 0x00000100>; 1408e728aa9SWenbin Song status = "okay"; 1418e728aa9SWenbin Song 1428e728aa9SWenbin Song nor@0,0 { 1438e728aa9SWenbin Song #address-cells = <1>; 1448e728aa9SWenbin Song #size-cells = <1>; 1458e728aa9SWenbin Song compatible = "cfi-flash"; 1468e728aa9SWenbin Song reg = <0x0 0x0 0x8000000>; 1478e728aa9SWenbin Song bank-width = <2>; 1488e728aa9SWenbin Song device-width = <1>; 1498e728aa9SWenbin Song }; 1508e728aa9SWenbin Song 151*4002eab2SHou Zhiqiang nand@1,0 { 1528e728aa9SWenbin Song compatible = "fsl,ifc-nand"; 1538e728aa9SWenbin Song #address-cells = <1>; 1548e728aa9SWenbin Song #size-cells = <1>; 1558e728aa9SWenbin Song reg = <0x1 0x0 0x10000>; 1568e728aa9SWenbin Song }; 1578e728aa9SWenbin Song 158*4002eab2SHou Zhiqiang fpga: board-control@2,0 { 1598e728aa9SWenbin Song #address-cells = <1>; 1608e728aa9SWenbin Song #size-cells = <1>; 1618e728aa9SWenbin Song compatible = "simple-bus"; 162*4002eab2SHou Zhiqiang reg = <0x2 0x0 0x0000100>; 1638e728aa9SWenbin Song bank-width = <1>; 1648e728aa9SWenbin Song device-width = <1>; 165*4002eab2SHou Zhiqiang ranges = <0 2 0 0x100>; 1668e728aa9SWenbin Song }; 1678e728aa9SWenbin Song}; 1688e728aa9SWenbin Song 1698e728aa9SWenbin Song&duart0 { 1708e728aa9SWenbin Song status = "okay"; 1718e728aa9SWenbin Song}; 1728e728aa9SWenbin Song 1738e728aa9SWenbin Song&duart1 { 1748e728aa9SWenbin Song status = "okay"; 1758e728aa9SWenbin Song}; 1762970e14fSWenbin Song 1772970e14fSWenbin Song&lpuart0 { 1782970e14fSWenbin Song status = "okay"; 1792970e14fSWenbin Song}; 180