1*b0ce187bSBhaskar Upadhaya/* 2*b0ce187bSBhaskar Upadhaya * NXP ls1012a 2G5RDB board device tree source 3*b0ce187bSBhaskar Upadhaya * 4*b0ce187bSBhaskar Upadhaya * Copyright 2017 NXP 5*b0ce187bSBhaskar Upadhaya * 6*b0ce187bSBhaskar Upadhaya * SPDX-License-Identifier: GPL-2.0+ 7*b0ce187bSBhaskar Upadhaya */ 8*b0ce187bSBhaskar Upadhaya 9*b0ce187bSBhaskar Upadhaya/dts-v1/; 10*b0ce187bSBhaskar Upadhaya#include "fsl-ls1012a.dtsi" 11*b0ce187bSBhaskar Upadhaya 12*b0ce187bSBhaskar Upadhaya/ { 13*b0ce187bSBhaskar Upadhaya model = "LS1012A 2G5RDB Board"; 14*b0ce187bSBhaskar Upadhaya 15*b0ce187bSBhaskar Upadhaya aliases { 16*b0ce187bSBhaskar Upadhaya spi0 = &qspi; 17*b0ce187bSBhaskar Upadhaya }; 18*b0ce187bSBhaskar Upadhaya 19*b0ce187bSBhaskar Upadhaya chosen { 20*b0ce187bSBhaskar Upadhaya stdout-path = &duart0; 21*b0ce187bSBhaskar Upadhaya }; 22*b0ce187bSBhaskar Upadhaya}; 23*b0ce187bSBhaskar Upadhaya 24*b0ce187bSBhaskar Upadhaya&qspi { 25*b0ce187bSBhaskar Upadhaya bus-num = <0>; 26*b0ce187bSBhaskar Upadhaya status = "okay"; 27*b0ce187bSBhaskar Upadhaya 28*b0ce187bSBhaskar Upadhaya qflash0: s25fl128s@0 { 29*b0ce187bSBhaskar Upadhaya #address-cells = <1>; 30*b0ce187bSBhaskar Upadhaya #size-cells = <1>; 31*b0ce187bSBhaskar Upadhaya compatible = "spi-flash"; 32*b0ce187bSBhaskar Upadhaya spi-max-frequency = <20000000>; 33*b0ce187bSBhaskar Upadhaya reg = <0>; 34*b0ce187bSBhaskar Upadhaya }; 35*b0ce187bSBhaskar Upadhaya}; 36*b0ce187bSBhaskar Upadhaya 37*b0ce187bSBhaskar Upadhaya&i2c0 { 38*b0ce187bSBhaskar Upadhaya status = "okay"; 39*b0ce187bSBhaskar Upadhaya}; 40*b0ce187bSBhaskar Upadhaya 41*b0ce187bSBhaskar Upadhaya&duart0 { 42*b0ce187bSBhaskar Upadhaya status = "okay"; 43*b0ce187bSBhaskar Upadhaya}; 44