xref: /openbmc/u-boot/arch/arm/dts/exynos54xx.dtsi (revision d66ff4ba)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2013 SAMSUNG Electronics
4 * SAMSUNG EXYNOS5420 SoC device tree source
5 */
6
7#include "exynos5.dtsi"
8#include "exynos54xx-pinctrl.dtsi"
9
10/ {
11	config {
12		machine-arch-id = <4151>;
13	};
14
15	aliases {
16		i2c0 = "/i2c@12C60000";
17		i2c1 = "/i2c@12C70000";
18		i2c2 = "/i2c@12C80000";
19		i2c3 = "/i2c@12C90000";
20		i2c4 = "/i2c@12CA0000";
21		i2c5 = "/i2c@12CB0000";
22		i2c6 = "/i2c@12CC0000";
23		i2c7 = "/i2c@12CD0000";
24		i2c8 = "/i2c@12E00000";
25		i2c9 = "/i2c@12E10000";
26		i2c10 = "/i2c@12E20000";
27		pinctrl0 = &pinctrl_0;
28		pinctrl1 = &pinctrl_1;
29		pinctrl2 = &pinctrl_2;
30		pinctrl3 = &pinctrl_3;
31		pinctrl4 = &pinctrl_4;
32		spi0 = "/spi@12d20000";
33		spi1 = "/spi@12d30000";
34		spi2 = "/spi@12d40000";
35		spi3 = "/spi@131a0000";
36		spi4 = "/spi@131b0000";
37		mmc0 = "/mmc@12200000";
38		mmc1 = "/mmc@12210000";
39		mmc2 = "/mmc@12220000";
40		xhci0 = "/xhci@12000000";
41		xhci1 = "/xhci@12400000";
42	};
43
44	adc@12D10000 {
45		compatible = "samsung,exynos-adc-v2";
46		reg = <0x12D10000 0x100>;
47		interrupts = <0 106 0>;
48		status = "disabled";
49	};
50
51	hsi2c_4: i2c@12CA0000 {
52		#address-cells = <1>;
53		#size-cells = <0>;
54		compatible = "samsung,exynos5-hsi2c";
55		reg = <0x12CA0000 0x100>;
56		interrupts = <0 60 0>;
57	};
58
59	i2c@12CB0000 {
60		#address-cells = <1>;
61		#size-cells = <0>;
62		compatible = "samsung,exynos5-hsi2c";
63		reg = <0x12CB0000 0x100>;
64		interrupts = <0 61 0>;
65	};
66
67	i2c@12CC0000 {
68		#address-cells = <1>;
69		#size-cells = <0>;
70		compatible = "samsung,exynos5-hsi2c";
71		reg = <0x12CC0000 0x100>;
72		interrupts = <0 62 0>;
73	};
74
75	i2c@12CD0000 {
76		#address-cells = <1>;
77		#size-cells = <0>;
78		compatible = "samsung,exynos5-hsi2c";
79		reg = <0x12CD0000 0x100>;
80		interrupts = <0 63 0>;
81	};
82
83	i2c@12E00000 {
84		#address-cells = <1>;
85		#size-cells = <0>;
86		compatible = "samsung,exynos5-hsi2c";
87		reg = <0x12E00000 0x100>;
88		interrupts = <0 87 0>;
89	};
90
91	i2c@12E10000 {
92		#address-cells = <1>;
93		#size-cells = <0>;
94		compatible = "samsung,exynos5-hsi2c";
95		reg = <0x12E10000 0x100>;
96		interrupts = <0 88 0>;
97	};
98
99	i2c@12E20000 {
100		#address-cells = <1>;
101		#size-cells = <0>;
102		compatible = "samsung,exynos5-hsi2c";
103		reg = <0x12E20000 0x100>;
104		interrupts = <0 203 0>;
105	};
106
107	i2s0: i2s@3830000 {
108		compatible = "samsung,s5pv210-i2s";
109		reg = <0x03830000 0x100>;
110		#sound-dai-cells = <1>;
111		samsung,idma-addr = <0x03000000>;
112		samsung,i2s-epll-clock-frequency = <192000000>;
113		samsung,i2s-sampling-rate = <48000>;
114		samsung,i2s-bits-per-sample = <16>;
115		samsung,i2s-channels = <2>;
116		samsung,i2s-lr-clk-framesize = <256>;
117		samsung,i2s-bit-clk-framesize = <32>;
118		samsung,i2s-id = <0>;
119	};
120
121	mmc@12200000 {
122		samsung,bus-width = <8>;
123		samsung,timing = <1 3 3>;
124		samsung,removable = <0>;
125		samsung,pre-init;
126	};
127
128	mmc@12210000 {
129		status = "disabled";
130	};
131
132	mmc@12220000 {
133		samsung,bus-width = <4>;
134		samsung,timing = <1 2 3>;
135		samsung,removable = <1>;
136	};
137
138	mmc@12230000 {
139		status = "disabled";
140	};
141
142	fimdm0_sysmmu@0x14640000 {
143		compatible = "samsung,sysmmu-v3.3";
144		reg = <0x14640000 0x100>;
145	};
146
147	fimdm1_sysmmu@0x14680000 {
148		compatible = "samsung,sysmmu-v3.3";
149		reg = <0x14680000 0x100>;
150	};
151
152	pinctrl_0: pinctrl@13400000 {
153		compatible = "samsung,exynos5420-pinctrl";
154		reg = <0x13400000 0x1000>;
155		interrupts = <0 45 0>;
156
157		wakeup-interrupt-controller {
158			compatible = "samsung,exynos4210-wakeup-eint";
159			interrupt-parent = <&gic>;
160			interrupts = <0 32 0>;
161		};
162	};
163
164	pinctrl_1: pinctrl@13410000 {
165		compatible = "samsung,exynos5420-pinctrl";
166		reg = <0x13410000 0x1000>;
167		interrupts = <0 78 0>;
168	};
169
170	pinctrl_2: pinctrl@14000000 {
171		compatible = "samsung,exynos5420-pinctrl";
172		reg = <0x14000000 0x1000>;
173		interrupts = <0 46 0>;
174	};
175
176	pinctrl_3: pinctrl@14010000 {
177		compatible = "samsung,exynos5420-pinctrl";
178		reg = <0x14010000 0x1000>;
179		interrupts = <0 50 0>;
180	};
181
182	pinctrl_4: pinctrl@03860000 {
183		compatible = "samsung,exynos5420-pinctrl";
184		reg = <0x03860000 0x1000>;
185		interrupts = <0 47 0>;
186	};
187
188	fimd@14400000 {
189		/* sysmmu is not used in U-Boot */
190		samsung,disable-sysmmu;
191		samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
192	};
193
194	dp: dp@145b0000 {
195		samsung,lt-status = <0>;
196
197		samsung,master-mode = <0>;
198		samsung,bist-mode = <0>;
199		samsung,bist-pattern = <0>;
200		samsung,h-sync-polarity = <0>;
201		samsung,v-sync-polarity = <0>;
202		samsung,interlaced = <0>;
203		samsung,color-space = <0>;
204		samsung,dynamic-range = <0>;
205		samsung,ycbcr-coeff = <0>;
206		samsung,color-depth = <1>;
207	};
208
209	dmc {
210		mem-type = "ddr3";
211	};
212
213	pwm: pwm@12dd0000 {
214		compatible = "samsung,exynos4210-pwm";
215		reg = <0x12dd0000 0x100>;
216		samsung,pwm-outputs = <0>, <1>, <2>, <3>;
217		#pwm-cells = <3>;
218	};
219
220	xhci1: xhci@12400000 {
221		compatible = "samsung,exynos5250-xhci";
222		reg = <0x12400000 0x10000>;
223		#address-cells = <1>;
224		#size-cells = <1>;
225
226		phy {
227			compatible = "samsung,exynos5250-usb3-phy";
228			reg = <0x12500000 0x100>;
229		};
230	};
231};
232