xref: /openbmc/u-boot/arch/arm/dts/exynos54xx.dtsi (revision 0c01c3e8)
1/*
2 * (C) Copyright 2013 SAMSUNG Electronics
3 * SAMSUNG EXYNOS5420 SoC device tree source
4 *
5 * SPDX-License-Identifier:	GPL-2.0+
6 */
7
8#include "exynos5.dtsi"
9#include "exynos54xx-pinctrl.dtsi"
10
11/ {
12	config {
13		machine-arch-id = <4151>;
14	};
15
16	aliases {
17		i2c0 = "/i2c@12C60000";
18		i2c1 = "/i2c@12C70000";
19		i2c2 = "/i2c@12C80000";
20		i2c3 = "/i2c@12C90000";
21		i2c4 = "/i2c@12CA0000";
22		i2c5 = "/i2c@12CB0000";
23		i2c6 = "/i2c@12CC0000";
24		i2c7 = "/i2c@12CD0000";
25		i2c8 = "/i2c@12E00000";
26		i2c9 = "/i2c@12E10000";
27		i2c10 = "/i2c@12E20000";
28		pinctrl0 = &pinctrl_0;
29		pinctrl1 = &pinctrl_1;
30		pinctrl2 = &pinctrl_2;
31		pinctrl3 = &pinctrl_3;
32		pinctrl4 = &pinctrl_4;
33		spi0 = "/spi@12d20000";
34		spi1 = "/spi@12d30000";
35		spi2 = "/spi@12d40000";
36		spi3 = "/spi@131a0000";
37		spi4 = "/spi@131b0000";
38		mmc0 = "/mmc@12200000";
39		mmc1 = "/mmc@12210000";
40		mmc2 = "/mmc@12220000";
41		xhci0 = "/xhci@12000000";
42		xhci1 = "/xhci@12400000";
43	};
44
45	i2c@12CA0000 {
46		#address-cells = <1>;
47		#size-cells = <0>;
48		compatible = "samsung,exynos5-hsi2c";
49		reg = <0x12CA0000 0x100>;
50		interrupts = <0 60 0>;
51	};
52
53	i2c@12CB0000 {
54		#address-cells = <1>;
55		#size-cells = <0>;
56		compatible = "samsung,exynos5-hsi2c";
57		reg = <0x12CB0000 0x100>;
58		interrupts = <0 61 0>;
59	};
60
61	i2c@12CC0000 {
62		#address-cells = <1>;
63		#size-cells = <0>;
64		compatible = "samsung,exynos5-hsi2c";
65		reg = <0x12CC0000 0x100>;
66		interrupts = <0 62 0>;
67	};
68
69	i2c@12CD0000 {
70		#address-cells = <1>;
71		#size-cells = <0>;
72		compatible = "samsung,exynos5-hsi2c";
73		reg = <0x12CD0000 0x100>;
74		interrupts = <0 63 0>;
75	};
76
77	i2c@12E00000 {
78		#address-cells = <1>;
79		#size-cells = <0>;
80		compatible = "samsung,exynos5-hsi2c";
81		reg = <0x12E00000 0x100>;
82		interrupts = <0 87 0>;
83	};
84
85	i2c@12E10000 {
86		#address-cells = <1>;
87		#size-cells = <0>;
88		compatible = "samsung,exynos5-hsi2c";
89		reg = <0x12E10000 0x100>;
90		interrupts = <0 88 0>;
91	};
92
93	i2c@12E20000 {
94		#address-cells = <1>;
95		#size-cells = <0>;
96		compatible = "samsung,exynos5-hsi2c";
97		reg = <0x12E20000 0x100>;
98		interrupts = <0 203 0>;
99	};
100
101	mmc@12200000 {
102		samsung,bus-width = <8>;
103		samsung,timing = <1 3 3>;
104		samsung,removable = <0>;
105		samsung,pre-init;
106	};
107
108	mmc@12210000 {
109		status = "disabled";
110	};
111
112	mmc@12220000 {
113		samsung,bus-width = <4>;
114		samsung,timing = <1 2 3>;
115		samsung,removable = <1>;
116	};
117
118	mmc@12230000 {
119		status = "disabled";
120	};
121
122	fimdm0_sysmmu@0x14640000 {
123		compatible = "samsung,sysmmu-v3.3";
124		reg = <0x14640000 0x100>;
125	};
126
127	fimdm1_sysmmu@0x14680000 {
128		compatible = "samsung,sysmmu-v3.3";
129		reg = <0x14680000 0x100>;
130	};
131
132	pinctrl_0: pinctrl@13400000 {
133		compatible = "samsung,exynos5420-pinctrl";
134		reg = <0x13400000 0x1000>;
135		interrupts = <0 45 0>;
136
137		wakeup-interrupt-controller {
138			compatible = "samsung,exynos4210-wakeup-eint";
139			interrupt-parent = <&gic>;
140			interrupts = <0 32 0>;
141		};
142	};
143
144	pinctrl_1: pinctrl@13410000 {
145		compatible = "samsung,exynos5420-pinctrl";
146		reg = <0x13410000 0x1000>;
147		interrupts = <0 78 0>;
148	};
149
150	pinctrl_2: pinctrl@14000000 {
151		compatible = "samsung,exynos5420-pinctrl";
152		reg = <0x14000000 0x1000>;
153		interrupts = <0 46 0>;
154	};
155
156	pinctrl_3: pinctrl@14010000 {
157		compatible = "samsung,exynos5420-pinctrl";
158		reg = <0x14010000 0x1000>;
159		interrupts = <0 50 0>;
160	};
161
162	pinctrl_4: pinctrl@03860000 {
163		compatible = "samsung,exynos5420-pinctrl";
164		reg = <0x03860000 0x1000>;
165		interrupts = <0 47 0>;
166	};
167
168	fimd@14400000 {
169		/* sysmmu is not used in U-Boot */
170		samsung,disable-sysmmu;
171		samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
172	};
173
174	dp@145b0000 {
175		samsung,lt-status = <0>;
176
177		samsung,master-mode = <0>;
178		samsung,bist-mode = <0>;
179		samsung,bist-pattern = <0>;
180		samsung,h-sync-polarity = <0>;
181		samsung,v-sync-polarity = <0>;
182		samsung,interlaced = <0>;
183		samsung,color-space = <0>;
184		samsung,dynamic-range = <0>;
185		samsung,ycbcr-coeff = <0>;
186		samsung,color-depth = <1>;
187	};
188
189	dmc {
190		mem-type = "ddr3";
191	};
192
193	xhci1: xhci@12400000 {
194		compatible = "samsung,exynos5250-xhci";
195		reg = <0x12400000 0x10000>;
196		#address-cells = <1>;
197		#size-cells = <1>;
198
199		phy {
200			compatible = "samsung,exynos5250-usb3-phy";
201			reg = <0x12500000 0x100>;
202		};
203	};
204};
205