1/* 2 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source 3 * 4 * Copyright (c) 2013 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * 7 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device 8 * tree nodes are listed in this file. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13*/ 14 15#include "exynos54xx-pinctrl-uboot.dtsi" 16 17/ { 18 pinctrl@13400000 { 19 gpy7: gpy7 { 20 gpio-controller; 21 #gpio-cells = <2>; 22 23 interrupt-controller; 24 #interrupt-cells = <2>; 25 }; 26 27 gpx0: gpx0 { 28 gpio-controller; 29 #gpio-cells = <2>; 30 31 interrupt-controller; 32 interrupt-parent = <&combiner>; 33 #interrupt-cells = <2>; 34 interrupts = <23 0>, <24 0>, <25 0>, <25 1>, 35 <26 0>, <26 1>, <27 0>, <27 1>; 36 }; 37 38 gpx1: gpx1 { 39 gpio-controller; 40 #gpio-cells = <2>; 41 42 interrupt-controller; 43 interrupt-parent = <&combiner>; 44 #interrupt-cells = <2>; 45 interrupts = <28 0>, <28 1>, <29 0>, <29 1>, 46 <30 0>, <30 1>, <31 0>, <31 1>; 47 }; 48 49 gpx2: gpx2 { 50 gpio-controller; 51 #gpio-cells = <2>; 52 53 interrupt-controller; 54 #interrupt-cells = <2>; 55 }; 56 57 gpx3: gpx3 { 58 gpio-controller; 59 #gpio-cells = <2>; 60 61 interrupt-controller; 62 #interrupt-cells = <2>; 63 }; 64 65 }; 66 67 pinctrl@13410000 { 68 gpc0: gpc0 { 69 gpio-controller; 70 #gpio-cells = <2>; 71 72 interrupt-controller; 73 #interrupt-cells = <2>; 74 }; 75 76 gpc1: gpc1 { 77 gpio-controller; 78 #gpio-cells = <2>; 79 80 interrupt-controller; 81 #interrupt-cells = <2>; 82 }; 83 84 gpc2: gpc2 { 85 gpio-controller; 86 #gpio-cells = <2>; 87 88 interrupt-controller; 89 #interrupt-cells = <2>; 90 }; 91 92 gpc3: gpc3 { 93 gpio-controller; 94 #gpio-cells = <2>; 95 96 interrupt-controller; 97 #interrupt-cells = <2>; 98 }; 99 100 gpc4: gpc4 { 101 gpio-controller; 102 #gpio-cells = <2>; 103 104 interrupt-controller; 105 #interrupt-cells = <2>; 106 }; 107 108 gpd1: gpd1 { 109 gpio-controller; 110 #gpio-cells = <2>; 111 112 interrupt-controller; 113 #interrupt-cells = <2>; 114 }; 115 116 gpy0: gpy0 { 117 gpio-controller; 118 #gpio-cells = <2>; 119 }; 120 121 gpy1: gpy1 { 122 gpio-controller; 123 #gpio-cells = <2>; 124 }; 125 126 gpy2: gpy2 { 127 gpio-controller; 128 #gpio-cells = <2>; 129 }; 130 131 gpy3: gpy3 { 132 gpio-controller; 133 #gpio-cells = <2>; 134 }; 135 136 gpy4: gpy4 { 137 gpio-controller; 138 #gpio-cells = <2>; 139 }; 140 141 gpy5: gpy5 { 142 gpio-controller; 143 #gpio-cells = <2>; 144 }; 145 146 gpy6: gpy6 { 147 gpio-controller; 148 #gpio-cells = <2>; 149 }; 150 151 }; 152 153 pinctrl@14000000 { 154 gpe0: gpe0 { 155 gpio-controller; 156 #gpio-cells = <2>; 157 158 interrupt-controller; 159 #interrupt-cells = <2>; 160 }; 161 162 gpe1: gpe1 { 163 gpio-controller; 164 #gpio-cells = <2>; 165 166 interrupt-controller; 167 #interrupt-cells = <2>; 168 }; 169 170 gpf0: gpf0 { 171 gpio-controller; 172 #gpio-cells = <2>; 173 174 interrupt-controller; 175 #interrupt-cells = <2>; 176 }; 177 178 gpf1: gpf1 { 179 gpio-controller; 180 #gpio-cells = <2>; 181 182 interrupt-controller; 183 #interrupt-cells = <2>; 184 }; 185 186 gpg0: gpg0 { 187 gpio-controller; 188 #gpio-cells = <2>; 189 190 interrupt-controller; 191 #interrupt-cells = <2>; 192 }; 193 194 gpg1: gpg1 { 195 gpio-controller; 196 #gpio-cells = <2>; 197 198 interrupt-controller; 199 #interrupt-cells = <2>; 200 }; 201 202 gpg2: gpg2 { 203 gpio-controller; 204 #gpio-cells = <2>; 205 206 interrupt-controller; 207 #interrupt-cells = <2>; 208 }; 209 210 gpj4: gpj4 { 211 gpio-controller; 212 #gpio-cells = <2>; 213 214 interrupt-controller; 215 #interrupt-cells = <2>; 216 }; 217 218 }; 219 220 pinctrl@14010000 { 221 gpa0: gpa0 { 222 gpio-controller; 223 #gpio-cells = <2>; 224 225 interrupt-controller; 226 #interrupt-cells = <2>; 227 }; 228 229 gpa1: gpa1 { 230 gpio-controller; 231 #gpio-cells = <2>; 232 233 interrupt-controller; 234 #interrupt-cells = <2>; 235 }; 236 237 gpa2: gpa2 { 238 gpio-controller; 239 #gpio-cells = <2>; 240 241 interrupt-controller; 242 #interrupt-cells = <2>; 243 }; 244 245 gpb0: gpb0 { 246 gpio-controller; 247 #gpio-cells = <2>; 248 249 interrupt-controller; 250 #interrupt-cells = <2>; 251 }; 252 253 gpb1: gpb1 { 254 gpio-controller; 255 #gpio-cells = <2>; 256 257 interrupt-controller; 258 #interrupt-cells = <2>; 259 }; 260 261 gpb2: gpb2 { 262 gpio-controller; 263 #gpio-cells = <2>; 264 265 interrupt-controller; 266 #interrupt-cells = <2>; 267 }; 268 269 gpb3: gpb3 { 270 gpio-controller; 271 #gpio-cells = <2>; 272 273 interrupt-controller; 274 #interrupt-cells = <2>; 275 }; 276 277 gpb4: gpb4 { 278 gpio-controller; 279 #gpio-cells = <2>; 280 281 interrupt-controller; 282 #interrupt-cells = <2>; 283 }; 284 285 gph0: gph0 { 286 gpio-controller; 287 #gpio-cells = <2>; 288 289 interrupt-controller; 290 #interrupt-cells = <2>; 291 }; 292 293 }; 294 295 pinctrl@03860000 { 296 gpz: gpz { 297 gpio-controller; 298 #gpio-cells = <2>; 299 300 interrupt-controller; 301 #interrupt-cells = <2>; 302 }; 303 304 }; 305}; 306