xref: /openbmc/u-boot/arch/arm/dts/exynos5250.dtsi (revision 71a988aa)
1/*
2 * SAMSUNG EXYNOS5250 SoC device tree source
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 *		http://www.samsung.com
6 *
7 * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
8 * EXYNOS5250 based board files can include this file and provide
9 * values for board specfic bindings.
10 *
11 * Note: This file does not include device nodes for all the controllers in
12 * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
13 * additional nodes can be added to this file.
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18*/
19
20/include/ "skeleton.dtsi"
21
22/ {
23	compatible = "samsung,exynos5250";
24
25	sromc@12250000 {
26		compatible = "samsung,exynos-sromc";
27		reg = <0x12250000 0x20>;
28		#address-cells = <1>;
29		#size-cells = <0>;
30	};
31
32	i2c@12c60000 {
33		#address-cells = <1>;
34		#size-cells = <0>;
35		compatible = "samsung,s3c2440-i2c";
36		reg = <0x12C60000 0x100>;
37		interrupts = <0 56 0>;
38	};
39
40	i2c@12c70000 {
41		#address-cells = <1>;
42		#size-cells = <0>;
43		compatible = "samsung,s3c2440-i2c";
44		reg = <0x12C70000 0x100>;
45		interrupts = <0 57 0>;
46	};
47
48	i2c@12c80000 {
49		#address-cells = <1>;
50		#size-cells = <0>;
51		compatible = "samsung,s3c2440-i2c";
52		reg = <0x12C80000 0x100>;
53		interrupts = <0 58 0>;
54	};
55
56	i2c@12c90000 {
57		#address-cells = <1>;
58		#size-cells = <0>;
59		compatible = "samsung,s3c2440-i2c";
60		reg = <0x12C90000 0x100>;
61		interrupts = <0 59 0>;
62	};
63
64	i2c@12ca0000 {
65		#address-cells = <1>;
66		#size-cells = <0>;
67		compatible = "samsung,s3c2440-i2c";
68		reg = <0x12CA0000 0x100>;
69		interrupts = <0 60 0>;
70	};
71
72	i2c@12cb0000 {
73		#address-cells = <1>;
74		#size-cells = <0>;
75		compatible = "samsung,s3c2440-i2c";
76		reg = <0x12CB0000 0x100>;
77		interrupts = <0 61 0>;
78	};
79
80	i2c@12cc0000 {
81		#address-cells = <1>;
82		#size-cells = <0>;
83		compatible = "samsung,s3c2440-i2c";
84		reg = <0x12CC0000 0x100>;
85		interrupts = <0 62 0>;
86	};
87
88	i2c@12cd0000 {
89		#address-cells = <1>;
90		#size-cells = <0>;
91		compatible = "samsung,s3c2440-i2c";
92		reg = <0x12CD0000 0x100>;
93		interrupts = <0 63 0>;
94	};
95
96	sound@12d60000 {
97		compatible = "samsung,exynos-sound";
98		reg = <0x12d60000 0x20>;
99	};
100
101	spi@12d20000 {
102		#address-cells = <1>;
103		#size-cells = <0>;
104		compatible = "samsung,exynos-spi";
105		reg = <0x12d20000 0x30>;
106		interrupts = <0 68 0>;
107	};
108
109	spi@12d30000 {
110		#address-cells = <1>;
111		#size-cells = <0>;
112		compatible = "samsung,exynos-spi";
113		reg = <0x12d30000 0x30>;
114		interrupts = <0 69 0>;
115	};
116
117	spi@12d40000 {
118		#address-cells = <1>;
119		#size-cells = <0>;
120		compatible = "samsung,exynos-spi";
121		reg = <0x12d40000 0x30>;
122		clock-frequency = <50000000>;
123		interrupts = <0 70 0>;
124        };
125
126	spi@131a0000 {
127		#address-cells = <1>;
128		#size-cells = <0>;
129		compatible = "samsung,exynos-spi";
130		reg = <0x131a0000 0x30>;
131		interrupts = <0 129 0>;
132	};
133
134	spi@131b0000 {
135		#address-cells = <1>;
136		#size-cells = <0>;
137		compatible = "samsung,exynos-spi";
138		reg = <0x131b0000 0x30>;
139		interrupts = <0 130 0>;
140	};
141
142	ehci@12110000 {
143		compatible = "samsung,exynos-ehci";
144		reg = <0x12110000 0x100>;
145		#address-cells = <1>;
146		#size-cells = <1>;
147
148		phy {
149			compatible = "samsung,exynos-usb-phy";
150			reg = <0x12130000 0x100>;
151		};
152	};
153
154};
155