xref: /openbmc/u-boot/arch/arm/dts/exynos5250.dtsi (revision 70ad375e)
1/*
2 * (C) Copyright 2012 SAMSUNG Electronics
3 * SAMSUNG EXYNOS5250 SoC device tree source
4 *
5 * SPDX-License-Identifier:	GPL-2.0+
6 */
7
8/include/ "exynos5.dtsi"
9
10/ {
11	i2c@12ca0000 {
12		#address-cells = <1>;
13		#size-cells = <0>;
14		compatible = "samsung,s3c2440-i2c";
15		reg = <0x12CA0000 0x100>;
16		interrupts = <0 60 0>;
17	};
18
19	i2c@12cb0000 {
20		#address-cells = <1>;
21		#size-cells = <0>;
22		compatible = "samsung,s3c2440-i2c";
23		reg = <0x12CB0000 0x100>;
24		interrupts = <0 61 0>;
25	};
26
27	i2c@12cc0000 {
28		#address-cells = <1>;
29		#size-cells = <0>;
30		compatible = "samsung,s3c2440-i2c";
31		reg = <0x12CC0000 0x100>;
32		interrupts = <0 62 0>;
33	};
34
35	i2c@12cd0000 {
36		#address-cells = <1>;
37		#size-cells = <0>;
38		compatible = "samsung,s3c2440-i2c";
39		reg = <0x12CD0000 0x100>;
40		interrupts = <0 63 0>;
41	};
42
43	sound@3830000 {
44		compatible = "samsung,exynos-sound";
45		reg = <0x3830000 0x50>;
46		samsung,i2s-epll-clock-frequency = <192000000>;
47		samsung,i2s-sampling-rate = <48000>;
48		samsung,i2s-bits-per-sample = <16>;
49		samsung,i2s-channels = <2>;
50		samsung,i2s-lr-clk-framesize = <256>;
51		samsung,i2s-bit-clk-framesize = <32>;
52		samsung,i2s-id = <0>;
53	};
54
55	sound@12d60000 {
56		compatible = "samsung,exynos-sound";
57		reg = <0x12d60000 0x20>;
58		samsung,i2s-epll-clock-frequency = <192000000>;
59		samsung,i2s-sampling-rate = <48000>;
60		samsung,i2s-bits-per-sample = <16>;
61		samsung,i2s-channels = <2>;
62		samsung,i2s-lr-clk-framesize = <256>;
63		samsung,i2s-bit-clk-framesize = <32>;
64		samsung,i2s-id = <1>;
65	};
66
67
68	xhci@12000000 {
69		compatible = "samsung,exynos5250-xhci";
70		reg = <0x12000000 0x10000>;
71		#address-cells = <1>;
72		#size-cells = <1>;
73
74		phy {
75			compatible = "samsung,exynos5250-usb3-phy";
76			reg = <0x12100000 0x100>;
77		};
78	};
79
80};
81