1/* 2 * Google Spring board device tree source 3 * 4 * Copyright (c) 2013 Google, Inc 5 * Copyright (c) 2014 SUSE LINUX Products GmbH 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10/dts-v1/; 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/irq.h> 13#include <dt-bindings/input/input.h> 14#include "exynos5250.dtsi" 15 16/ { 17 model = "Google Spring"; 18 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5"; 19 20 aliases { 21 i2c0 = "/i2c@12C60000"; 22 i2c1 = "/i2c@12C70000"; 23 i2c2 = "/i2c@12C80000"; 24 i2c3 = "/i2c@12C90000"; 25 i2c4 = "/i2c@12CA0000"; 26 i2c5 = "/i2c@12CB0000"; 27 i2c6 = "/i2c@12CC0000"; 28 i2c7 = "/i2c@12CD0000"; 29 i2c104 = &cros_ec_ldo_tunnel; 30 spi0 = "/spi@12d20000"; 31 spi1 = "/spi@12d30000"; 32 spi2 = "/spi@12d40000"; 33 spi3 = "/spi@131a0000"; 34 spi4 = "/spi@131b0000"; 35 mmc0 = "/mmc@12000000"; 36 serial0 = "/serial@12C30000"; 37 console = "/serial@12C30000"; 38 i2s = "/sound@3830000"; 39 }; 40 41 memory { 42 reg = <0x40000000 0x80000000>; 43 }; 44 45 flash@0 { 46 spl { /* spl size override */ 47 size = <0x8000>; 48 }; 49 }; 50 51 chosen { 52 bootargs = "console=tty1"; 53 stdout-path = "serial3:115200n8"; 54 }; 55 56 board-rev { 57 compatible = "google,board-revision"; 58 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>, 59 <&gpy4 2 0>; 60 }; 61 62 i2c@12C90000 { 63 clock-frequency = <100000>; 64 tpm@20 { 65 reg = <0x20>; 66 compatible = "infineon,slb9645tt"; 67 }; 68 }; 69 70 mmc@12200000 { 71 samsung,bus-width = <8>; 72 samsung,timing = <1 3 3>; 73 samsung,removable = <0>; 74 }; 75 76 mmc@12210000 { 77 status = "disabled"; 78 }; 79 80 mmc@12220000 { 81 /* MMC2 pins are used as GPIO for eDP bridge */ 82 status = "disabled"; 83 }; 84 85 mmc@12230000 { 86 status = "disabled"; 87 }; 88 89 ehci@12110000 { 90 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>; 91 status = "okay"; 92 }; 93 94 xhci@12000000 { 95 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>; 96 }; 97 98 spi@12d30000 { 99 spi-max-frequency = <50000000>; 100 firmware_storage_spi: flash@0 { 101 compatible = "spi-flash"; 102 reg = <0>; 103 }; 104 }; 105 106 tmu@10060000 { 107 samsung,min-temp = <25>; 108 samsung,max-temp = <125>; 109 samsung,start-warning = <95>; 110 samsung,start-tripping = <105>; 111 samsung,hw-tripping = <110>; 112 samsung,efuse-min-value = <40>; 113 samsung,efuse-value = <55>; 114 samsung,efuse-max-value = <100>; 115 samsung,slope = <274761730>; 116 samsung,dc-value = <25>; 117 }; 118 119 fimd@14400000 { 120 samsung,vl-freq = <60>; 121 samsung,vl-col = <1366>; 122 samsung,vl-row = <768>; 123 samsung,vl-width = <1366>; 124 samsung,vl-height = <768>; 125 126 samsung,vl-clkp; 127 samsung,vl-dp; 128 samsung,vl-hsp; 129 samsung,vl-vsp; 130 131 samsung,vl-bpix = <4>; 132 133 samsung,vl-hspw = <32>; 134 samsung,vl-hbpd = <80>; 135 samsung,vl-hfpd = <48>; 136 samsung,vl-vspw = <5>; 137 samsung,vl-vbpd = <14>; 138 samsung,vl-vfpd = <3>; 139 samsung,vl-cmd-allow-len = <0xf>; 140 141 samsung,winid = <0>; 142 samsung,interface-mode = <1>; 143 samsung,dp-enabled = <1>; 144 samsung,dual-lcd-enabled = <0>; 145 }; 146 147 dp@145b0000 { 148 samsung,lt-status = <0>; 149 150 samsung,master-mode = <0>; 151 samsung,bist-mode = <0>; 152 samsung,bist-pattern = <0>; 153 samsung,h-sync-polarity = <0>; 154 samsung,v-sync-polarity = <0>; 155 samsung,interlaced = <0>; 156 samsung,color-space = <0>; 157 samsung,dynamic-range = <0>; 158 samsung,ycbcr-coeff = <0>; 159 samsung,color-depth = <1>; 160 }; 161}; 162 163&i2c_0 { 164 status = "okay"; 165 samsung,i2c-sda-delay = <100>; 166 samsung,i2c-max-bus-freq = <378000>; 167 168 s5m8767-pmic@66 { 169 compatible = "samsung,s5m8767-pmic"; 170 reg = <0x66>; 171 interrupt-parent = <&gpx3>; 172 wakeup-source; 173 174 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */ 175 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */ 176 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */ 177 178 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */ 179 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */ 180 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */ 181 182 /* 183 * The following arrays of DVS voltages are not used, since we are 184 * not using GPIOs to control PMIC bucks, but they must be defined 185 * to please the driver. 186 */ 187 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>, 188 <1250000>, <1200000>, 189 <1150000>, <1100000>, 190 <1000000>, <950000>; 191 192 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>, 193 <1100000>, <1100000>, 194 <1000000>, <1000000>, 195 <1000000>, <1000000>; 196 197 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>, 198 <1200000>, <1200000>, 199 <1200000>, <1200000>, 200 <1200000>, <1200000>; 201 202 clocks { 203 compatible = "samsung,s5m8767-clk"; 204 #clock-cells = <1>; 205 clock-output-names = "en32khz_ap", 206 "en32khz_cp", 207 "en32khz_bt"; 208 }; 209 210 regulators { 211 ldo4_reg: LDO4 { 212 regulator-name = "P1.0V_LDO_OUT4"; 213 regulator-min-microvolt = <1000000>; 214 regulator-max-microvolt = <1000000>; 215 regulator-always-on; 216 op_mode = <0>; 217 }; 218 219 ldo5_reg: LDO5 { 220 regulator-name = "P1.8V_LDO_OUT5"; 221 regulator-min-microvolt = <1800000>; 222 regulator-max-microvolt = <1800000>; 223 regulator-always-on; 224 op_mode = <0>; 225 }; 226 227 ldo6_reg: LDO6 { 228 regulator-name = "vdd_mydp"; 229 regulator-min-microvolt = <1200000>; 230 regulator-max-microvolt = <1200000>; 231 regulator-always-on; 232 op_mode = <3>; 233 }; 234 235 ldo7_reg: LDO7 { 236 regulator-name = "P1.1V_LDO_OUT7"; 237 regulator-min-microvolt = <1100000>; 238 regulator-max-microvolt = <1100000>; 239 regulator-always-on; 240 op_mode = <3>; 241 }; 242 243 ldo8_reg: LDO8 { 244 regulator-name = "P1.0V_LDO_OUT8"; 245 regulator-min-microvolt = <1000000>; 246 regulator-max-microvolt = <1000000>; 247 regulator-always-on; 248 op_mode = <3>; 249 }; 250 251 ldo10_reg: LDO10 { 252 regulator-name = "P1.8V_LDO_OUT10"; 253 regulator-min-microvolt = <1800000>; 254 regulator-max-microvolt = <1800000>; 255 regulator-always-on; 256 op_mode = <3>; 257 }; 258 259 ldo11_reg: LDO11 { 260 regulator-name = "P1.8V_LDO_OUT11"; 261 regulator-min-microvolt = <1800000>; 262 regulator-max-microvolt = <1800000>; 263 regulator-always-on; 264 op_mode = <0>; 265 }; 266 267 ldo12_reg: LDO12 { 268 regulator-name = "P3.0V_LDO_OUT12"; 269 regulator-min-microvolt = <3000000>; 270 regulator-max-microvolt = <3000000>; 271 regulator-always-on; 272 op_mode = <3>; 273 }; 274 275 ldo13_reg: LDO13 { 276 regulator-name = "P1.8V_LDO_OUT13"; 277 regulator-min-microvolt = <1800000>; 278 regulator-max-microvolt = <1800000>; 279 regulator-always-on; 280 op_mode = <0>; 281 }; 282 283 ldo14_reg: LDO14 { 284 regulator-name = "P1.8V_LDO_OUT14"; 285 regulator-min-microvolt = <1800000>; 286 regulator-max-microvolt = <1800000>; 287 regulator-always-on; 288 op_mode = <3>; 289 }; 290 291 ldo15_reg: LDO15 { 292 regulator-name = "P1.0V_LDO_OUT15"; 293 regulator-min-microvolt = <1000000>; 294 regulator-max-microvolt = <1000000>; 295 regulator-always-on; 296 op_mode = <3>; 297 }; 298 299 ldo16_reg: LDO16 { 300 regulator-name = "P1.8V_LDO_OUT16"; 301 regulator-min-microvolt = <1800000>; 302 regulator-max-microvolt = <1800000>; 303 regulator-always-on; 304 op_mode = <3>; 305 }; 306 307 ldo17_reg: LDO17 { 308 regulator-name = "P1.2V_LDO_OUT17"; 309 regulator-min-microvolt = <1200000>; 310 regulator-max-microvolt = <1200000>; 311 regulator-always-on; 312 op_mode = <0>; 313 }; 314 315 ldo25_reg: LDO25 { 316 regulator-name = "vdd_bridge"; 317 regulator-min-microvolt = <1200000>; 318 regulator-max-microvolt = <1200000>; 319 regulator-always-on; 320 op_mode = <1>; 321 }; 322 323 buck1_reg: BUCK1 { 324 regulator-name = "vdd_mif"; 325 regulator-min-microvolt = <950000>; 326 regulator-max-microvolt = <1300000>; 327 regulator-always-on; 328 regulator-boot-on; 329 op_mode = <3>; 330 }; 331 332 buck2_reg: BUCK2 { 333 regulator-name = "vdd_arm"; 334 regulator-min-microvolt = <850000>; 335 regulator-max-microvolt = <1350000>; 336 regulator-always-on; 337 regulator-boot-on; 338 op_mode = <3>; 339 }; 340 341 buck3_reg: BUCK3 { 342 regulator-name = "vdd_int"; 343 regulator-min-microvolt = <900000>; 344 regulator-max-microvolt = <1200000>; 345 regulator-always-on; 346 regulator-boot-on; 347 op_mode = <3>; 348 }; 349 350 buck4_reg: BUCK4 { 351 regulator-name = "vdd_g3d"; 352 regulator-min-microvolt = <850000>; 353 regulator-max-microvolt = <1300000>; 354 regulator-boot-on; 355 op_mode = <3>; 356 }; 357 358 buck5_reg: BUCK5 { 359 regulator-name = "P1.8V_BUCK_OUT5"; 360 regulator-min-microvolt = <1800000>; 361 regulator-max-microvolt = <1800000>; 362 regulator-always-on; 363 regulator-boot-on; 364 op_mode = <1>; 365 }; 366 367 buck6_reg: BUCK6 { 368 regulator-name = "P1.2V_BUCK_OUT6"; 369 regulator-min-microvolt = <2050000>; 370 regulator-max-microvolt = <2050000>; 371 regulator-always-on; 372 regulator-boot-on; 373 op_mode = <0>; 374 }; 375 376 buck9_reg: BUCK9 { 377 regulator-name = "vdd_ummc"; 378 regulator-min-microvolt = <950000>; 379 regulator-max-microvolt = <3000000>; 380 regulator-always-on; 381 regulator-boot-on; 382 op_mode = <3>; 383 }; 384 }; 385 }; 386}; 387 388&i2c_1 { 389 status = "okay"; 390 samsung,i2c-sda-delay = <100>; 391 samsung,i2c-max-bus-freq = <378000>; 392}; 393 394&i2c_2 { 395 status = "okay"; 396 samsung,i2c-sda-delay = <100>; 397 samsung,i2c-max-bus-freq = <66000>; 398}; 399 400&i2c_3 { 401 status = "okay"; 402 samsung,i2c-sda-delay = <100>; 403 samsung,i2c-max-bus-freq = <66000>; 404}; 405 406&i2c_4 { 407 status = "okay"; 408 samsung,i2c-sda-delay = <100>; 409 samsung,i2c-max-bus-freq = <66000>; 410 clock-frequency = <66000>; 411 412 cros_ec: embedded-controller { 413 compatible = "google,cros-ec-i2c"; 414 reg = <0x1e>; 415 interrupts = <6 IRQ_TYPE_NONE>; 416 interrupt-parent = <&gpx1>; 417 wakeup-source; 418 u-boot,i2c-offset-len = <0>; 419 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>; 420 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel { 421 compatible = "google,cros-ec-ldo-tunnel"; 422 #address-cells = <1>; 423 #size-cells = <0>; 424 power-regulator { 425 compatible = "ti,tps65090"; 426 reg = <0x48>; 427 428 regulators { 429 dcdc1 { 430 ti,enable-ext-control; 431 }; 432 dcdc2 { 433 ti,enable-ext-control; 434 }; 435 dcdc3 { 436 ti,enable-ext-control; 437 }; 438 fet1: fet1 { 439 regulator-name = "vcd_led"; 440 ti,overcurrent-wait = <3>; 441 }; 442 tps65090_fet2: fet2 { 443 regulator-name = "video_mid"; 444 regulator-always-on; 445 ti,overcurrent-wait = <3>; 446 }; 447 fet3 { 448 regulator-name = "wwan_r"; 449 regulator-always-on; 450 ti,overcurrent-wait = <3>; 451 }; 452 fet4 { 453 regulator-name = "sdcard"; 454 ti,overcurrent-wait = <3>; 455 }; 456 fet5 { 457 regulator-name = "camout"; 458 regulator-always-on; 459 ti,overcurrent-wait = <3>; 460 }; 461 fet6: fet6 { 462 regulator-name = "lcd_vdd"; 463 ti,overcurrent-wait = <3>; 464 }; 465 tps65090_fet7: fet7 { 466 regulator-name = "video_mid_1a"; 467 regulator-always-on; 468 ti,overcurrent-wait = <3>; 469 }; 470 ldo1 { 471 }; 472 ldo2 { 473 }; 474 }; 475 }; 476 }; 477 }; 478}; 479 480&i2c_5 { 481 status = "okay"; 482 samsung,i2c-sda-delay = <100>; 483 samsung,i2c-max-bus-freq = <66000>; 484}; 485 486&i2c_7 { 487 status = "okay"; 488 samsung,i2c-sda-delay = <100>; 489 samsung,i2c-max-bus-freq = <66000>; 490 491 ps8622-bridge@8 { 492 compatible = "parade,ps8622"; 493 reg = <0x8>; 494 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>; 495 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>; 496 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>; 497 power-supply = <&ldo6_reg>; 498 parade,regs = /bits/ 8 < 499 0x02 0xa1 0x01 /* HPD low */ 500 /* 501 * SW setting: [1:0] SW output 1.2V voltage is 502 * lower to 96% 503 */ 504 0x04 0x14 0x01 505 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */ 506 0x04 0xe3 0x20 507 0x04 0xe2 0x80 /* [7] RCO SS enable */ 508 /* 509 * RPHY Setting: [3:2] CDR tune wait cycle before 510 * measure for fine tune b00: 1us, 511 * 01: 0.5us, 10:2us, 11:4us 512 */ 513 0x04 0x8a 0x0c 514 0x04 0x89 0x08 /* [3] RFD always on */ 515 /* 516 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times 517 */ 518 0x04 0x71 0x2d 519 /* 2.7G CDR settings */ 520 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */ 521 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */ 522 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */ 523 /* 524 * 1.62G CDR settings: 525 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5 526 */ 527 0x04 0xc0 0x12 528 0x04 0xc1 0x92 /* Gitune=-37% */ 529 0x04 0xc2 0x1c /* Fbstep=100% */ 530 0x04 0x32 0x80 /* [7] LOS signal disable */ 531 /* RPIO Setting */ 532 /* [7:4] LVDS driver bias current 75% (250mV swing) */ 533 0x04 0x00 0xb0 534 /* [7:6] Right-bar GPIO output strength is 8mA */ 535 0x04 0x15 0x40 536 /* EQ Training State Machine Setting */ 537 0x04 0x54 0x10 /* RCO calibration start */ 538 /* [4:0] MAX_LANE_COUNT set to one lane */ 539 0x01 0x02 0x81 540 /* [4:0] LANE_COUNT_SET set to one lane */ 541 0x01 0x21 0x81 542 0x00 0x52 0x20 543 0x00 0xf1 0x03 /* HPD CP toggle enable */ 544 0x00 0x62 0x41 545 /* Counter number add 1ms counter delay */ 546 0x00 0xf6 0x01 547 /* 548 * [6]PWM function control by DPCD0040f[7], default 549 * is PWM block always works 550 */ 551 0x00 0x77 0x06 552 0x00 0x4c 0x04 553 /* 554 * 04h Adjust VTotal tolerance to fix the 30Hz no- 555 * display issue 556 * DPCD00400='h00 Parade OUI = 'h001cf8 557 */ 558 0x01 0xc0 0x00 559 0x01 0xc1 0x1c /* DPCD00401='h1c */ 560 0x01 0xc2 0xf8 /* DPCD00402='hf8 */ 561 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */ 562 0x01 0xc3 0x44 563 0x01 0xc4 0x32 /* DPCD404 */ 564 0x01 0xc5 0x53 /* DPCD405 */ 565 0x01 0xc6 0x4c /* DPCD406 */ 566 0x01 0xc7 0x56 /* DPCD407 */ 567 0x01 0xc8 0x35 /* DPCD408 */ 568 /* DPCD40A Initial Code major revision '01' */ 569 0x01 0xca 0x01 570 /* DPCD40B Initial Code minor revision '05' */ 571 0x01 0xcb 0x05 572 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */ 573 /* 574 * 0xff for 100% PWM of brightness, 0h for 0% brightness 575 */ 576 0x01 0xa7 0x00 577 /* 578 * Set LVDS output as 6bit-VESA mapping, single LVDS 579 * channel 580 */ 581 0x01 0xcc 0x13 582 0x02 0xb1 0x20 /* Enable SSC set by register */ 583 /* Set SSC enabled and +/-1% central spreading */ 584 0x04 0x10 0x16 585 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */ 586 0x04 0x54 0x14 /* LC -> RCO */ 587 0x02 0xa1 0x91>; /* HPD high */ 588 }; 589 590 soundcodec@20 { 591 reg = <0x20>; 592 compatible = "maxim,max98088-codec"; 593 }; 594}; 595 596#include "cros-ec-keyboard.dtsi" 597