1/* 2 * Copyright (c) 2013 The Chromium OS Authors 3 * SAMSUNG EXYNOS5 SoC device tree source 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#include "skeleton.dtsi" 9 10/ { 11 compatible = "samsung,exynos5"; 12 13 combiner: interrupt-controller@10440000 { 14 compatible = "samsung,exynos4210-combiner"; 15 #interrupt-cells = <2>; 16 interrupt-controller; 17 samsung,combiner-nr = <32>; 18 reg = <0x10440000 0x1000>; 19 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 20 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 21 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, 22 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, 23 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 24 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, 25 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 26 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 27 }; 28 29 gic: interrupt-controller@10481000 { 30 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 31 #interrupt-cells = <3>; 32 interrupt-controller; 33 reg = <0x10481000 0x1000>, 34 <0x10482000 0x1000>, 35 <0x10484000 0x2000>, 36 <0x10486000 0x2000>; 37 interrupts = <1 9 0xf04>; 38 }; 39 40 sromc@12250000 { 41 compatible = "samsung,exynos-sromc"; 42 reg = <0x12250000 0x20>; 43 #address-cells = <1>; 44 #size-cells = <0>; 45 }; 46 47 combiner: interrupt-controller@10440000 { 48 compatible = "samsung,exynos4210-combiner"; 49 #interrupt-cells = <2>; 50 interrupt-controller; 51 samsung,combiner-nr = <32>; 52 reg = <0x10440000 0x1000>; 53 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, 54 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, 55 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, 56 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, 57 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 58 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, 59 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 60 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 61 }; 62 63 gic: interrupt-controller@10481000 { 64 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; 65 #interrupt-cells = <3>; 66 interrupt-controller; 67 reg = <0x10481000 0x1000>, 68 <0x10482000 0x1000>, 69 <0x10484000 0x2000>, 70 <0x10486000 0x2000>; 71 interrupts = <1 9 0xf04>; 72 }; 73 74 i2c@12c60000 { 75 #address-cells = <1>; 76 #size-cells = <0>; 77 compatible = "samsung,s3c2440-i2c"; 78 reg = <0x12C60000 0x100>; 79 interrupts = <0 56 0>; 80 }; 81 82 i2c@12c70000 { 83 #address-cells = <1>; 84 #size-cells = <0>; 85 compatible = "samsung,s3c2440-i2c"; 86 reg = <0x12C70000 0x100>; 87 interrupts = <0 57 0>; 88 }; 89 90 i2c@12c80000 { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 compatible = "samsung,s3c2440-i2c"; 94 reg = <0x12C80000 0x100>; 95 interrupts = <0 58 0>; 96 }; 97 98 i2c@12c90000 { 99 #address-cells = <1>; 100 #size-cells = <0>; 101 compatible = "samsung,s3c2440-i2c"; 102 reg = <0x12C90000 0x100>; 103 interrupts = <0 59 0>; 104 }; 105 106 spi@12d20000 { 107 #address-cells = <1>; 108 #size-cells = <0>; 109 compatible = "samsung,exynos-spi"; 110 reg = <0x12d20000 0x30>; 111 interrupts = <0 68 0>; 112 }; 113 114 spi@12d30000 { 115 #address-cells = <1>; 116 #size-cells = <0>; 117 compatible = "samsung,exynos-spi"; 118 reg = <0x12d30000 0x30>; 119 interrupts = <0 69 0>; 120 }; 121 122 spi@12d40000 { 123 #address-cells = <1>; 124 #size-cells = <0>; 125 compatible = "samsung,exynos-spi"; 126 reg = <0x12d40000 0x30>; 127 clock-frequency = <50000000>; 128 interrupts = <0 70 0>; 129 }; 130 131 spi@131a0000 { 132 #address-cells = <1>; 133 #size-cells = <0>; 134 compatible = "samsung,exynos-spi"; 135 reg = <0x131a0000 0x30>; 136 interrupts = <0 129 0>; 137 }; 138 139 spi@131b0000 { 140 #address-cells = <1>; 141 #size-cells = <0>; 142 compatible = "samsung,exynos-spi"; 143 reg = <0x131b0000 0x30>; 144 interrupts = <0 130 0>; 145 }; 146 147 ehci@12110000 { 148 compatible = "samsung,exynos-ehci"; 149 reg = <0x12110000 0x100>; 150 #address-cells = <1>; 151 #size-cells = <1>; 152 153 phy { 154 compatible = "samsung,exynos-usb-phy"; 155 reg = <0x12130000 0x100>; 156 }; 157 }; 158 159 tmu@10060000 { 160 compatible = "samsung,exynos-tmu"; 161 reg = <0x10060000 0x10000>; 162 }; 163 164 fimd@14400000 { 165 compatible = "samsung,exynos-fimd"; 166 reg = <0x14400000 0x10000>; 167 #address-cells = <1>; 168 #size-cells = <1>; 169 }; 170 171 dp@145b0000 { 172 compatible = "samsung,exynos5-dp"; 173 reg = <0x145b0000 0x1000>; 174 #address-cells = <1>; 175 #size-cells = <1>; 176 }; 177 178 xhci0: xhci@12000000 { 179 compatible = "samsung,exynos5250-xhci"; 180 reg = <0x12000000 0x10000>; 181 #address-cells = <1>; 182 #size-cells = <1>; 183 184 phy { 185 compatible = "samsung,exynos5250-usb3-phy"; 186 reg = <0x12100000 0x100>; 187 }; 188 }; 189 190 mmc@12200000 { 191 #address-cells = <1>; 192 #size-cells = <0>; 193 compatible = "samsung,exynos-dwmmc"; 194 reg = <0x12200000 0x1000>; 195 interrupts = <0 75 0>; 196 }; 197 198 mmc@12210000 { 199 #address-cells = <1>; 200 #size-cells = <0>; 201 compatible = "samsung,exynos-dwmmc"; 202 reg = <0x12210000 0x1000>; 203 interrupts = <0 76 0>; 204 }; 205 206 mmc@12220000 { 207 #address-cells = <1>; 208 #size-cells = <0>; 209 compatible = "samsung,exynos-dwmmc"; 210 reg = <0x12220000 0x1000>; 211 interrupts = <0 77 0>; 212 }; 213 214 mmc@12230000 { 215 #address-cells = <1>; 216 #size-cells = <0>; 217 compatible = "samsung,exynos-dwmmc"; 218 reg = <0x12230000 0x1000>; 219 interrupts = <0 78 0>; 220 }; 221 222 serial@12C00000 { 223 compatible = "samsung,exynos4210-uart"; 224 reg = <0x12C00000 0x100>; 225 interrupts = <0 51 0>; 226 id = <0>; 227 }; 228 229 serial@12C10000 { 230 compatible = "samsung,exynos4210-uart"; 231 reg = <0x12C10000 0x100>; 232 interrupts = <0 52 0>; 233 id = <1>; 234 }; 235 236 serial@12C20000 { 237 compatible = "samsung,exynos4210-uart"; 238 reg = <0x12C20000 0x100>; 239 interrupts = <0 53 0>; 240 id = <2>; 241 }; 242 243 serial@12C30000 { 244 compatible = "samsung,exynos4210-uart"; 245 reg = <0x12C30000 0x100>; 246 interrupts = <0 54 0>; 247 u-boot,dm-pre-reloc; 248 id = <3>; 249 }; 250 251 gpio: gpio { 252 }; 253}; 254