1/* 2 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source 3 * 4 * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * Copyright (c) 2011-2012 Linaro Ltd. 7 * www.linaro.org 8 * 9 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device 10 * tree nodes are listed in this file. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15*/ 16 17/ { 18 pinctrl@11400000 { 19 gpa0: gpa0 { 20 gpio-controller; 21 #gpio-cells = <2>; 22 23 interrupt-controller; 24 #interrupt-cells = <2>; 25 }; 26 27 gpa1: gpa1 { 28 gpio-controller; 29 #gpio-cells = <2>; 30 31 interrupt-controller; 32 #interrupt-cells = <2>; 33 }; 34 35 gpb: gpb { 36 gpio-controller; 37 #gpio-cells = <2>; 38 39 interrupt-controller; 40 #interrupt-cells = <2>; 41 }; 42 43 gpc0: gpc0 { 44 gpio-controller; 45 #gpio-cells = <2>; 46 47 interrupt-controller; 48 #interrupt-cells = <2>; 49 }; 50 51 gpc1: gpc1 { 52 gpio-controller; 53 #gpio-cells = <2>; 54 55 interrupt-controller; 56 #interrupt-cells = <2>; 57 }; 58 59 gpd0: gpd0 { 60 gpio-controller; 61 #gpio-cells = <2>; 62 63 interrupt-controller; 64 #interrupt-cells = <2>; 65 }; 66 67 gpd1: gpd1 { 68 gpio-controller; 69 #gpio-cells = <2>; 70 71 interrupt-controller; 72 #interrupt-cells = <2>; 73 }; 74 75 gpe0: gpe0 { 76 gpio-controller; 77 #gpio-cells = <2>; 78 79 interrupt-controller; 80 #interrupt-cells = <2>; 81 }; 82 83 gpe1: gpe1 { 84 gpio-controller; 85 #gpio-cells = <2>; 86 87 interrupt-controller; 88 #interrupt-cells = <2>; 89 }; 90 91 gpe2: gpe2 { 92 gpio-controller; 93 #gpio-cells = <2>; 94 95 interrupt-controller; 96 #interrupt-cells = <2>; 97 }; 98 99 gpe3: gpe3 { 100 gpio-controller; 101 #gpio-cells = <2>; 102 103 interrupt-controller; 104 #interrupt-cells = <2>; 105 }; 106 107 gpe4: gpe4 { 108 gpio-controller; 109 #gpio-cells = <2>; 110 111 interrupt-controller; 112 #interrupt-cells = <2>; 113 }; 114 115 gpf0: gpf0 { 116 gpio-controller; 117 #gpio-cells = <2>; 118 119 interrupt-controller; 120 #interrupt-cells = <2>; 121 }; 122 123 gpf1: gpf1 { 124 gpio-controller; 125 #gpio-cells = <2>; 126 127 interrupt-controller; 128 #interrupt-cells = <2>; 129 }; 130 131 gpf2: gpf2 { 132 gpio-controller; 133 #gpio-cells = <2>; 134 135 interrupt-controller; 136 #interrupt-cells = <2>; 137 }; 138 139 gpf3: gpf3 { 140 gpio-controller; 141 #gpio-cells = <2>; 142 143 interrupt-controller; 144 #interrupt-cells = <2>; 145 }; 146 147 }; 148 149 pinctrl@11000000 { 150 gpj0: gpj0 { 151 gpio-controller; 152 #gpio-cells = <2>; 153 154 interrupt-controller; 155 #interrupt-cells = <2>; 156 }; 157 158 gpj1: gpj1 { 159 gpio-controller; 160 #gpio-cells = <2>; 161 162 interrupt-controller; 163 #interrupt-cells = <2>; 164 }; 165 166 gpk0: gpk0 { 167 gpio-controller; 168 #gpio-cells = <2>; 169 170 interrupt-controller; 171 #interrupt-cells = <2>; 172 }; 173 174 gpk1: gpk1 { 175 gpio-controller; 176 #gpio-cells = <2>; 177 178 interrupt-controller; 179 #interrupt-cells = <2>; 180 }; 181 182 gpk2: gpk2 { 183 gpio-controller; 184 #gpio-cells = <2>; 185 186 interrupt-controller; 187 #interrupt-cells = <2>; 188 }; 189 190 gpk3: gpk3 { 191 gpio-controller; 192 #gpio-cells = <2>; 193 194 interrupt-controller; 195 #interrupt-cells = <2>; 196 }; 197 198 gpl0: gpl0 { 199 gpio-controller; 200 #gpio-cells = <2>; 201 202 interrupt-controller; 203 #interrupt-cells = <2>; 204 }; 205 206 gpl1: gpl1 { 207 gpio-controller; 208 #gpio-cells = <2>; 209 210 interrupt-controller; 211 #interrupt-cells = <2>; 212 }; 213 214 gpl2: gpl2 { 215 gpio-controller; 216 #gpio-cells = <2>; 217 218 interrupt-controller; 219 #interrupt-cells = <2>; 220 }; 221 222 gpy0: gpy0 { 223 gpio-controller; 224 #gpio-cells = <2>; 225 }; 226 227 gpy1: gpy1 { 228 gpio-controller; 229 #gpio-cells = <2>; 230 }; 231 232 gpy2: gpy2 { 233 gpio-controller; 234 #gpio-cells = <2>; 235 }; 236 237 gpy3: gpy3 { 238 gpio-controller; 239 #gpio-cells = <2>; 240 }; 241 242 gpy4: gpy4 { 243 gpio-controller; 244 #gpio-cells = <2>; 245 }; 246 247 gpy5: gpy5 { 248 gpio-controller; 249 #gpio-cells = <2>; 250 }; 251 252 gpy6: gpy6 { 253 gpio-controller; 254 #gpio-cells = <2>; 255 }; 256 257 gpx0: gpx0 { 258 gpio-controller; 259 #gpio-cells = <2>; 260 261 interrupt-controller; 262 interrupt-parent = <&gic>; 263 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, 264 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>; 265 #interrupt-cells = <2>; 266 }; 267 268 gpx1: gpx1 { 269 gpio-controller; 270 #gpio-cells = <2>; 271 272 interrupt-controller; 273 interrupt-parent = <&gic>; 274 interrupts = <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, 275 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; 276 #interrupt-cells = <2>; 277 }; 278 279 gpx2: gpx2 { 280 gpio-controller; 281 #gpio-cells = <2>; 282 283 interrupt-controller; 284 #interrupt-cells = <2>; 285 }; 286 287 gpx3: gpx3 { 288 gpio-controller; 289 #gpio-cells = <2>; 290 291 interrupt-controller; 292 #interrupt-cells = <2>; 293 }; 294 295 }; 296 297 pinctrl@03860000 { 298 gpz: gpz { 299 gpio-controller; 300 #gpio-cells = <2>; 301 }; 302 303 }; 304}; 305