1/* 2 * Samsung's Exynos4 SoC common device tree source 3 * 4 * Copyright (c) 2014 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#include "skeleton.dtsi" 11 12/ { 13 aliases { 14 i2c0 = &i2c_0; 15 i2c1 = &i2c_1; 16 i2c2 = &i2c_2; 17 i2c3 = &i2c_3; 18 i2c4 = &i2c_4; 19 i2c5 = &i2c_5; 20 i2c6 = &i2c_6; 21 i2c7 = &i2c_7; 22 }; 23 24 combiner: interrupt-controller@10440000 { 25 compatible = "samsung,exynos4210-combiner"; 26 #interrupt-cells = <2>; 27 interrupt-controller; 28 reg = <0x10440000 0x1000>; 29 }; 30 31 serial@13800000 { 32 compatible = "samsung,exynos4210-uart"; 33 reg = <0x13800000 0x3c>; 34 id = <0>; 35 }; 36 37 serial@13810000 { 38 compatible = "samsung,exynos4210-uart"; 39 reg = <0x13810000 0x3c>; 40 id = <1>; 41 }; 42 43 serial@13820000 { 44 compatible = "samsung,exynos4210-uart"; 45 reg = <0x13820000 0x3c>; 46 id = <2>; 47 }; 48 49 serial@13830000 { 50 compatible = "samsung,exynos4210-uart"; 51 reg = <0x13830000 0x3c>; 52 id = <3>; 53 }; 54 55 serial@13840000 { 56 compatible = "samsung,exynos4210-uart"; 57 reg = <0x13840000 0x3c>; 58 id = <4>; 59 }; 60 61 i2c_0: i2c@13860000 { 62 #address-cells = <1>; 63 #size-cells = <0>; 64 compatible = "samsung,s3c2440-i2c"; 65 reg = <0x13860000 0x100>; 66 interrupts = <0 56 0>; 67 }; 68 69 i2c_1: i2c@13870000 { 70 #address-cells = <1>; 71 #size-cells = <0>; 72 compatible = "samsung,s3c2440-i2c"; 73 reg = <0x13870000 0x100>; 74 interrupts = <1 57 0>; 75 }; 76 77 i2c_2: i2c@13880000 { 78 #address-cells = <1>; 79 #size-cells = <0>; 80 compatible = "samsung,s3c2440-i2c"; 81 reg = <0x13880000 0x100>; 82 interrupts = <2 58 0>; 83 }; 84 85 i2c_3: i2c@13890000 { 86 #address-cells = <1>; 87 #size-cells = <0>; 88 compatible = "samsung,s3c2440-i2c"; 89 reg = <0x13890000 0x100>; 90 interrupts = <3 59 0>; 91 }; 92 93 i2c_4: i2c@138a0000 { 94 #address-cells = <1>; 95 #size-cells = <0>; 96 compatible = "samsung,s3c2440-i2c"; 97 reg = <0x138a0000 0x100>; 98 interrupts = <4 60 0>; 99 }; 100 101 i2c_5: i2c@138b0000 { 102 #address-cells = <1>; 103 #size-cells = <0>; 104 compatible = "samsung,s3c2440-i2c"; 105 reg = <0x138b0000 0x100>; 106 interrupts = <5 61 0>; 107 }; 108 109 i2c_6: i2c@138c0000 { 110 #address-cells = <1>; 111 #size-cells = <0>; 112 compatible = "samsung,s3c2440-i2c"; 113 reg = <0x138c0000 0x100>; 114 interrupts = <6 62 0>; 115 }; 116 117 i2c_7: i2c@138d0000 { 118 #address-cells = <1>; 119 #size-cells = <0>; 120 compatible = "samsung,s3c2440-i2c"; 121 reg = <0x138d0000 0x100>; 122 interrupts = <7 63 0>; 123 }; 124 125 sdhci@12510000 { 126 #address-cells = <1>; 127 #size-cells = <0>; 128 compatible = "samsung,exynos-mmc"; 129 reg = <0x12510000 0x1000>; 130 interrupts = <0 75 0>; 131 }; 132 133 sdhci@12520000 { 134 #address-cells = <1>; 135 #size-cells = <0>; 136 compatible = "samsung,exynos-mmc"; 137 reg = <0x12520000 0x1000>; 138 interrupts = <0 76 0>; 139 }; 140 141 sdhci@12530000 { 142 #address-cells = <1>; 143 #size-cells = <0>; 144 compatible = "samsung,exynos-mmc"; 145 reg = <0x12530000 0x1000>; 146 interrupts = <0 77 0>; 147 }; 148 149 sdhci@12540000 { 150 #address-cells = <1>; 151 #size-cells = <0>; 152 compatible = "samsung,exynos-mmc"; 153 reg = <0x12540000 0x1000>; 154 interrupts = <0 78 0>; 155 }; 156 157 dwmmc@12550000 { 158 #address-cells = <1>; 159 #size-cells = <0>; 160 compatible = "samsung,exynos-dwmmc"; 161 reg = <0x12550000 0x1000>; 162 interrupts = <0 131 0>; 163 }; 164 165}; 166