xref: /openbmc/u-boot/arch/arm/dts/dra72-evm-revc.dts (revision 20c700f8)
1/*
2 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8#include "dra72-evm-common.dtsi"
9#include <dt-bindings/net/ti-dp83867.h>
10
11/ {
12	model = "TI DRA722 Rev C EVM";
13
14	memory {
15		device_type = "memory";
16		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
17	};
18};
19
20&tps65917_regulators {
21	ldo2_reg: ldo2 {
22		/* LDO2_OUT --> VDDA_1V8_PHY2 */
23		regulator-name = "ldo2";
24		regulator-min-microvolt = <1800000>;
25		regulator-max-microvolt = <1800000>;
26		regulator-always-on;
27		regulator-boot-on;
28	};
29};
30
31&hdmi {
32	vdda_video-supply = <&ldo2_reg>;
33};
34
35&mac {
36	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
37		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */
38		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */
39	dual_emac;
40};
41
42&cpsw_emac0 {
43	phy-handle = <&dp83867_0>;
44	phy-mode = "rgmii-id";
45	dual_emac_res_vlan = <1>;
46};
47
48&cpsw_emac1 {
49	phy-handle = <&dp83867_1>;
50	phy-mode = "rgmii-id";
51	dual_emac_res_vlan = <2>;
52};
53
54&davinci_mdio {
55	dp83867_0: ethernet-phy@2 {
56		reg = <2>;
57		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
58		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
59		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
60		ti,min-output-imepdance;
61	};
62
63	dp83867_1: ethernet-phy@3 {
64		reg = <3>;
65		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
66		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
67		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
68		ti,min-output-imepdance;
69	};
70};
71