1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Bitmain Antminer S9 board DTS
4 *
5 * Copyright (C) 2018 Michal Simek
6 * Copyright (C) 2018 VanguardiaSur
7 */
8/dts-v1/;
9#include "zynq-7000.dtsi"
10
11/ {
12	model = "Bitmain Antminer S9 Board";
13	compatible = "bitmain,antminer-s9", "xlnx,zynq-7000";
14
15	aliases {
16		ethernet0 = &gem0;
17		serial0 = &uart1;
18		mmc0 = &sdhci0;
19		gpio0 = &gpio0;
20	};
21
22	memory@0 {
23		device_type = "memory";
24		reg = <0x0 0x40000000>;
25	};
26
27	reserved-memory {
28		#address-cells = <1>;
29		#size-cells = <1>;
30		ranges;
31
32		bootcount@efffff0 {
33			reg = <0xefffff0 0x10>;
34			no-map;
35		};
36
37		fpga_space@f000000 {
38			reg = <0xf000000 0x1000000>;
39			no-map;
40		};
41	};
42
43	chosen {
44		bootargs = "earlycon";
45		stdout-path = "serial0:115200n8";
46	};
47};
48
49&clkc {
50	ps-clk-frequency = <33333333>;
51};
52
53&gem0 {
54	status = "okay";
55	phy-mode = "rgmii-id";
56	phy-handle = <&ethernet_phy>;
57
58	/* 0362/5e62 */
59	ethernet_phy: ethernet-phy@1 {
60		reg = <1>;
61	};
62};
63
64&sdhci0 {
65	u-boot,dm-pre-reloc;
66	status = "okay";
67	disable-wp;
68};
69
70&uart1 {
71	u-boot,dm-pre-reloc;
72	status = "okay";
73};
74
75&watchdog0 {
76	reset-on-timeout;
77	timeout-sec = <200>;
78};
79