1*c66f5620SEzequiel Garcia// SPDX-License-Identifier: GPL-2.0
2*c66f5620SEzequiel Garcia/*
3*c66f5620SEzequiel Garcia * Bitmain Antminer S9 board DTS
4*c66f5620SEzequiel Garcia *
5*c66f5620SEzequiel Garcia * Copyright (C) 2018 Michal Simek
6*c66f5620SEzequiel Garcia * Copyright (C) 2018 VanguardiaSur
7*c66f5620SEzequiel Garcia */
8*c66f5620SEzequiel Garcia/dts-v1/;
9*c66f5620SEzequiel Garcia#include "zynq-7000.dtsi"
10*c66f5620SEzequiel Garcia
11*c66f5620SEzequiel Garcia/ {
12*c66f5620SEzequiel Garcia	model = "Bitmain Antminer S9 Board";
13*c66f5620SEzequiel Garcia	compatible = "bitmain,antminer-s9", "xlnx,zynq-7000";
14*c66f5620SEzequiel Garcia
15*c66f5620SEzequiel Garcia	aliases {
16*c66f5620SEzequiel Garcia		ethernet0 = &gem0;
17*c66f5620SEzequiel Garcia		serial0 = &uart1;
18*c66f5620SEzequiel Garcia		mmc0 = &sdhci0;
19*c66f5620SEzequiel Garcia		gpio0 = &gpio0;
20*c66f5620SEzequiel Garcia	};
21*c66f5620SEzequiel Garcia
22*c66f5620SEzequiel Garcia	memory@0 {
23*c66f5620SEzequiel Garcia		device_type = "memory";
24*c66f5620SEzequiel Garcia		reg = <0x0 0x40000000>;
25*c66f5620SEzequiel Garcia	};
26*c66f5620SEzequiel Garcia
27*c66f5620SEzequiel Garcia	reserved-memory {
28*c66f5620SEzequiel Garcia		#address-cells = <1>;
29*c66f5620SEzequiel Garcia		#size-cells = <1>;
30*c66f5620SEzequiel Garcia		ranges;
31*c66f5620SEzequiel Garcia
32*c66f5620SEzequiel Garcia		bootcount@efffff0 {
33*c66f5620SEzequiel Garcia			reg = <0xefffff0 0x10>;
34*c66f5620SEzequiel Garcia			no-map;
35*c66f5620SEzequiel Garcia		};
36*c66f5620SEzequiel Garcia
37*c66f5620SEzequiel Garcia		fpga_space@f000000 {
38*c66f5620SEzequiel Garcia			reg = <0xf000000 0x1000000>;
39*c66f5620SEzequiel Garcia			no-map;
40*c66f5620SEzequiel Garcia		};
41*c66f5620SEzequiel Garcia	};
42*c66f5620SEzequiel Garcia
43*c66f5620SEzequiel Garcia	chosen {
44*c66f5620SEzequiel Garcia		bootargs = "earlycon";
45*c66f5620SEzequiel Garcia		stdout-path = "serial0:115200n8";
46*c66f5620SEzequiel Garcia	};
47*c66f5620SEzequiel Garcia};
48*c66f5620SEzequiel Garcia
49*c66f5620SEzequiel Garcia&clkc {
50*c66f5620SEzequiel Garcia	ps-clk-frequency = <33333333>;
51*c66f5620SEzequiel Garcia};
52*c66f5620SEzequiel Garcia
53*c66f5620SEzequiel Garcia&gem0 {
54*c66f5620SEzequiel Garcia	status = "okay";
55*c66f5620SEzequiel Garcia	phy-mode = "rgmii-id";
56*c66f5620SEzequiel Garcia	phy-handle = <&ethernet_phy>;
57*c66f5620SEzequiel Garcia
58*c66f5620SEzequiel Garcia	/* 0362/5e62 */
59*c66f5620SEzequiel Garcia	ethernet_phy: ethernet-phy@1 {
60*c66f5620SEzequiel Garcia		reg = <1>;
61*c66f5620SEzequiel Garcia	};
62*c66f5620SEzequiel Garcia};
63*c66f5620SEzequiel Garcia
64*c66f5620SEzequiel Garcia&sdhci0 {
65*c66f5620SEzequiel Garcia	u-boot,dm-pre-reloc;
66*c66f5620SEzequiel Garcia	status = "okay";
67*c66f5620SEzequiel Garcia	disable-wp;
68*c66f5620SEzequiel Garcia};
69*c66f5620SEzequiel Garcia
70*c66f5620SEzequiel Garcia&uart1 {
71*c66f5620SEzequiel Garcia	u-boot,dm-pre-reloc;
72*c66f5620SEzequiel Garcia	status = "okay";
73*c66f5620SEzequiel Garcia};
74*c66f5620SEzequiel Garcia
75*c66f5620SEzequiel Garcia&watchdog0 {
76*c66f5620SEzequiel Garcia	reset-on-timeout;
77*c66f5620SEzequiel Garcia	timeout-sec = <200>;
78*c66f5620SEzequiel Garcia};
79