1#include "bcm283x.dtsi" 2 3/ { 4 compatible = "brcm,bcm2836"; 5 6 soc { 7 ranges = <0x7e000000 0x3f000000 0x1000000>, 8 <0x40000000 0x40000000 0x00001000>; 9 dma-ranges = <0xc0000000 0x00000000 0x3f000000>; 10 11 local_intc: local_intc { 12 compatible = "brcm,bcm2836-l1-intc"; 13 reg = <0x40000000 0x100>; 14 interrupt-controller; 15 #interrupt-cells = <1>; 16 interrupt-parent = <&local_intc>; 17 }; 18 }; 19 20 timer { 21 compatible = "arm,armv7-timer"; 22 interrupt-parent = <&local_intc>; 23 interrupts = <0>, // PHYS_SECURE_PPI 24 <1>, // PHYS_NONSECURE_PPI 25 <3>, // VIRT_PPI 26 <2>; // HYP_PPI 27 always-on; 28 }; 29 30 cpus: cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 34 cpu0: cpu@0 { 35 device_type = "cpu"; 36 compatible = "arm,cortex-a53"; 37 reg = <0>; 38 enable-method = "spin-table"; 39 cpu-release-addr = <0x0 0x000000d8>; 40 }; 41 42 cpu1: cpu@1 { 43 device_type = "cpu"; 44 compatible = "arm,cortex-a53"; 45 reg = <1>; 46 enable-method = "spin-table"; 47 cpu-release-addr = <0x0 0x000000e0>; 48 }; 49 50 cpu2: cpu@2 { 51 device_type = "cpu"; 52 compatible = "arm,cortex-a53"; 53 reg = <2>; 54 enable-method = "spin-table"; 55 cpu-release-addr = <0x0 0x000000e8>; 56 }; 57 58 cpu3: cpu@3 { 59 device_type = "cpu"; 60 compatible = "arm,cortex-a53"; 61 reg = <3>; 62 enable-method = "spin-table"; 63 cpu-release-addr = <0x0 0x000000f0>; 64 }; 65 }; 66}; 67 68/* Make the BCM2835-style global interrupt controller be a child of the 69 * CPU-local interrupt controller. 70 */ 71&intc { 72 compatible = "brcm,bcm2836-armctrl-ic"; 73 reg = <0x7e00b200 0x200>; 74 interrupt-parent = <&local_intc>; 75 interrupts = <8>; 76}; 77