1/* 2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC 3 * 4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> 5 * 6 * Licensed under GPLv2 only. 7 */ 8 9#include "skeleton.dtsi" 10#include <dt-bindings/pinctrl/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/clock/at91.h> 14 15/ { 16 model = "Atmel AT91SAM9261 family SoC"; 17 compatible = "atmel,at91sam9261"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 tcb0 = &tcb0; 29 i2c0 = &i2c0; 30 ssc0 = &ssc0; 31 ssc1 = &ssc1; 32 ssc2 = &ssc2; 33 spi0 = &spi0; 34 }; 35 36 cpus { 37 cpu { 38 compatible = "arm,arm926ej-s"; 39 device_type = "cpu"; 40 }; 41 }; 42 43 memory { 44 reg = <0x20000000 0x08000000>; 45 }; 46 47 clocks { 48 main_xtal: main_xtal { 49 compatible = "fixed-clock"; 50 #clock-cells = <0>; 51 clock-frequency = <0>; 52 }; 53 54 slow_xtal: slow_xtal { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 }; 60 61 sram: sram@00300000 { 62 compatible = "mmio-sram"; 63 reg = <0x00300000 0x28000>; 64 }; 65 66 ahb { 67 compatible = "simple-bus"; 68 #address-cells = <1>; 69 #size-cells = <1>; 70 ranges; 71 u-boot,dm-pre-reloc; 72 73 usb0: ohci@00500000 { 74 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 75 reg = <0x00500000 0x100000>; 76 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; 77 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>; 78 clock-names = "ohci_clk", "hclk", "uhpck"; 79 status = "disabled"; 80 }; 81 82 fb0: fb@0x00600000 { 83 compatible = "atmel,at91sam9261-lcdc"; 84 reg = <0x00600000 0x1000>; 85 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 86 pinctrl-names = "default"; 87 pinctrl-0 = <&pinctrl_fb>; 88 clocks = <&lcd_clk>, <&hclk1>; 89 clock-names = "lcdc_clk", "hclk"; 90 status = "disabled"; 91 }; 92 93 nand0: nand@40000000 { 94 compatible = "atmel,at91rm9200-nand"; 95 #address-cells = <1>; 96 #size-cells = <1>; 97 reg = <0x40000000 0x10000000>; 98 atmel,nand-addr-offset = <22>; 99 atmel,nand-cmd-offset = <21>; 100 pinctrl-names = "default"; 101 pinctrl-0 = <&pinctrl_nand>; 102 103 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>, 104 <&pioC 14 GPIO_ACTIVE_HIGH>, 105 <0>; 106 status = "disabled"; 107 }; 108 109 apb { 110 compatible = "simple-bus"; 111 #address-cells = <1>; 112 #size-cells = <1>; 113 ranges; 114 u-boot,dm-pre-reloc; 115 116 tcb0: timer@fffa0000 { 117 compatible = "atmel,at91rm9200-tcb"; 118 reg = <0xfffa0000 0x100>; 119 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, 120 <18 IRQ_TYPE_LEVEL_HIGH 0>, 121 <19 IRQ_TYPE_LEVEL_HIGH 0>; 122 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>; 123 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 124 }; 125 126 usb1: gadget@fffa4000 { 127 compatible = "atmel,at91sam9261-udc"; 128 reg = <0xfffa4000 0x4000>; 129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 130 clocks = <&udc_clk>, <&udpck>; 131 clock-names = "pclk", "hclk"; 132 atmel,matrix = <&matrix>; 133 status = "disabled"; 134 }; 135 136 mmc0: mmc@fffa8000 { 137 compatible = "atmel,hsmci"; 138 reg = <0xfffa8000 0x600>; 139 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; 140 pinctrl-names = "default"; 141 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; 142 #address-cells = <1>; 143 #size-cells = <0>; 144 clocks = <&mci0_clk>; 145 clock-names = "mci_clk"; 146 status = "disabled"; 147 }; 148 149 i2c0: i2c@fffac000 { 150 compatible = "atmel,at91sam9261-i2c"; 151 pinctrl-names = "default"; 152 pinctrl-0 = <&pinctrl_i2c_twi>; 153 reg = <0xfffac000 0x100>; 154 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 155 #address-cells = <1>; 156 #size-cells = <0>; 157 clocks = <&twi0_clk>; 158 status = "disabled"; 159 }; 160 161 usart0: serial@fffb0000 { 162 compatible = "atmel,at91sam9260-usart"; 163 reg = <0xfffb0000 0x200>; 164 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 165 atmel,use-dma-rx; 166 atmel,use-dma-tx; 167 pinctrl-names = "default"; 168 pinctrl-0 = <&pinctrl_usart0>; 169 clocks = <&usart0_clk>; 170 clock-names = "usart"; 171 status = "disabled"; 172 }; 173 174 usart1: serial@fffb4000 { 175 compatible = "atmel,at91sam9260-usart"; 176 reg = <0xfffb4000 0x200>; 177 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 178 atmel,use-dma-rx; 179 atmel,use-dma-tx; 180 pinctrl-names = "default"; 181 pinctrl-0 = <&pinctrl_usart1>; 182 clocks = <&usart1_clk>; 183 clock-names = "usart"; 184 status = "disabled"; 185 }; 186 187 usart2: serial@fffb8000{ 188 compatible = "atmel,at91sam9260-usart"; 189 reg = <0xfffb8000 0x200>; 190 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 191 atmel,use-dma-rx; 192 atmel,use-dma-tx; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&pinctrl_usart2>; 195 clocks = <&usart2_clk>; 196 clock-names = "usart"; 197 status = "disabled"; 198 }; 199 200 ssc0: ssc@fffbc000 { 201 compatible = "atmel,at91rm9200-ssc"; 202 reg = <0xfffbc000 0x4000>; 203 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 206 clocks = <&ssc0_clk>; 207 clock-names = "pclk"; 208 status = "disabled"; 209 }; 210 211 ssc1: ssc@fffc0000 { 212 compatible = "atmel,at91rm9200-ssc"; 213 reg = <0xfffc0000 0x4000>; 214 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 217 clocks = <&ssc1_clk>; 218 clock-names = "pclk"; 219 status = "disabled"; 220 }; 221 222 ssc2: ssc@fffc4000 { 223 compatible = "atmel,at91rm9200-ssc"; 224 reg = <0xfffc4000 0x4000>; 225 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; 228 clocks = <&ssc2_clk>; 229 clock-names = "pclk"; 230 status = "disabled"; 231 }; 232 233 spi0: spi@fffc8000 { 234 #address-cells = <1>; 235 #size-cells = <0>; 236 compatible = "atmel,at91rm9200-spi"; 237 reg = <0xfffc8000 0x200>; 238 cs-gpios = <0>, <0>, <0>, <0>; 239 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 240 pinctrl-names = "default"; 241 pinctrl-0 = <&pinctrl_spi0>; 242 clocks = <&spi0_clk>; 243 clock-names = "spi_clk"; 244 status = "disabled"; 245 }; 246 247 spi1: spi@fffcc000 { 248 #address-cells = <1>; 249 #size-cells = <0>; 250 compatible = "atmel,at91rm9200-spi"; 251 reg = <0xfffcc000 0x200>; 252 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 253 pinctrl-names = "default"; 254 pinctrl-0 = <&pinctrl_spi1>; 255 clocks = <&spi1_clk>; 256 clock-names = "spi_clk"; 257 status = "disabled"; 258 }; 259 260 ramc: ramc@ffffea00 { 261 compatible = "atmel,at91sam9260-sdramc"; 262 reg = <0xffffea00 0x200>; 263 }; 264 265 matrix: matrix@ffffee00 { 266 compatible = "atmel,at91sam9260-bus-matrix", "syscon"; 267 reg = <0xffffee00 0x200>; 268 }; 269 270 aic: interrupt-controller@fffff000 { 271 #interrupt-cells = <3>; 272 compatible = "atmel,at91rm9200-aic"; 273 interrupt-controller; 274 reg = <0xfffff000 0x200>; 275 atmel,external-irqs = <29 30 31>; 276 }; 277 278 dbgu: serial@fffff200 { 279 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 280 reg = <0xfffff200 0x200>; 281 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 282 pinctrl-names = "default"; 283 pinctrl-0 = <&pinctrl_dbgu>; 284 clocks = <&mck>; 285 clock-names = "usart"; 286 status = "disabled"; 287 }; 288 289 pioA: gpio@fffff400 { 290 compatible = "atmel,at91rm9200-gpio"; 291 reg = <0xfffff400 0x200>; 292 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 293 #gpio-cells = <2>; 294 gpio-controller; 295 interrupt-controller; 296 #interrupt-cells = <2>; 297 clocks = <&pioA_clk>; 298 u-boot,dm-pre-reloc; 299 }; 300 301 pioB: gpio@fffff600 { 302 compatible = "atmel,at91rm9200-gpio"; 303 reg = <0xfffff600 0x200>; 304 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 305 #gpio-cells = <2>; 306 gpio-controller; 307 interrupt-controller; 308 #interrupt-cells = <2>; 309 clocks = <&pioB_clk>; 310 u-boot,dm-pre-reloc; 311 }; 312 313 pioC: gpio@fffff800 { 314 compatible = "atmel,at91rm9200-gpio"; 315 reg = <0xfffff800 0x200>; 316 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 317 #gpio-cells = <2>; 318 gpio-controller; 319 interrupt-controller; 320 #interrupt-cells = <2>; 321 clocks = <&pioC_clk>; 322 u-boot,dm-pre-reloc; 323 }; 324 325 pinctrl@fffff400 { 326 #address-cells = <1>; 327 #size-cells = <1>; 328 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 329 ranges = <0xfffff400 0xfffff400 0x600>; 330 reg = <0xfffff400 0x200 /* pioA */ 331 0xfffff600 0x200 /* pioB */ 332 0xfffff800 0x200 /* pioC */ 333 >; 334 atmel,mux-mask = 335 /* A B */ 336 <0xffffffff 0xfffffff7>, /* pioA */ 337 <0xffffffff 0xfffffff4>, /* pioB */ 338 <0xffffffff 0xffffff07>; /* pioC */ 339 u-boot,dm-pre-reloc; 340 341 /* shared pinctrl settings */ 342 dbgu { 343 u-boot,dm-pre-reloc; 344 pinctrl_dbgu: dbgu-0 { 345 atmel,pins = 346 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, 347 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 348 }; 349 }; 350 351 usart0 { 352 pinctrl_usart0: usart0-0 { 353 atmel,pins = 354 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 355 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 356 }; 357 358 pinctrl_usart0_rts: usart0_rts-0 { 359 atmel,pins = 360 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 361 }; 362 363 pinctrl_usart0_cts: usart0_cts-0 { 364 atmel,pins = 365 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; 366 }; 367 }; 368 369 usart1 { 370 pinctrl_usart1: usart1-0 { 371 atmel,pins = 372 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 373 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 374 }; 375 376 pinctrl_usart1_rts: usart1_rts-0 { 377 atmel,pins = 378 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; 379 }; 380 381 pinctrl_usart1_cts: usart1_cts-0 { 382 atmel,pins = 383 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; 384 }; 385 }; 386 387 usart2 { 388 pinctrl_usart2: usart2-0 { 389 atmel,pins = 390 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 391 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 392 }; 393 394 pinctrl_usart2_rts: usart2_rts-0 { 395 atmel,pins = 396 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 397 }; 398 399 pinctrl_usart2_cts: usart2_cts-0 { 400 atmel,pins = 401 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 402 }; 403 }; 404 405 nand { 406 pinctrl_nand: nand-0 { 407 atmel,pins = 408 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, 409 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 410 }; 411 }; 412 413 mmc0 { 414 pinctrl_mmc0_clk: mmc0_clk-0 { 415 atmel,pins = 416 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 417 }; 418 419 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 420 atmel,pins = 421 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 422 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 423 }; 424 425 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 426 atmel,pins = 427 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 428 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 429 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 430 }; 431 }; 432 433 ssc0 { 434 pinctrl_ssc0_tx: ssc0_tx-0 { 435 atmel,pins = 436 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, 437 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>, 438 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 439 }; 440 441 pinctrl_ssc0_rx: ssc0_rx-0 { 442 atmel,pins = 443 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, 444 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 445 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 446 }; 447 }; 448 449 ssc1 { 450 pinctrl_ssc1_tx: ssc1_tx-0 { 451 atmel,pins = 452 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 453 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 454 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 455 }; 456 457 pinctrl_ssc1_rx: ssc1_rx-0 { 458 atmel,pins = 459 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 460 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 461 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 462 }; 463 }; 464 465 ssc2 { 466 pinctrl_ssc2_tx: ssc2_tx-0 { 467 atmel,pins = 468 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, 469 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, 470 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; 471 }; 472 473 pinctrl_ssc2_rx: ssc2_rx-0 { 474 atmel,pins = 475 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, 476 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 477 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 478 }; 479 }; 480 481 spi0 { 482 pinctrl_spi0: spi0-0 { 483 atmel,pins = 484 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 485 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, 486 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 487 }; 488 }; 489 490 spi1 { 491 pinctrl_spi1: spi1-0 { 492 atmel,pins = 493 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>, 494 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>, 495 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 496 }; 497 }; 498 499 tcb0 { 500 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 501 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 502 }; 503 504 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 505 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 506 }; 507 508 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 509 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 510 }; 511 512 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 513 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 514 }; 515 516 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 517 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; 518 }; 519 520 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 521 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; 522 }; 523 524 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 525 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 526 }; 527 528 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 529 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 530 }; 531 532 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 533 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; 534 }; 535 }; 536 537 i2c0 { 538 pinctrl_i2c_bitbang: i2c-0-bitbang { 539 atmel,pins = 540 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>, 541 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 542 }; 543 pinctrl_i2c_twi: i2c-0-twi { 544 atmel,pins = 545 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 546 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 547 }; 548 }; 549 550 fb { 551 pinctrl_fb: fb-0 { 552 atmel,pins = 553 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, 554 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 555 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 556 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 557 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>, 558 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, 559 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>, 560 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, 561 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>, 562 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 563 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 564 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 565 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 566 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 567 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>, 568 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 569 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 570 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, 571 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, 572 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>, 573 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 574 }; 575 }; 576 }; 577 578 pmc: pmc@fffffc00 { 579 compatible = "atmel,at91rm9200-pmc", "syscon"; 580 reg = <0xfffffc00 0x100>; 581 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 582 interrupt-controller; 583 #address-cells = <1>; 584 #size-cells = <0>; 585 #interrupt-cells = <1>; 586 u-boot,dm-pre-reloc; 587 588 main_osc: main_osc { 589 compatible = "atmel,at91rm9200-clk-main-osc"; 590 #clock-cells = <0>; 591 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 592 clocks = <&main_xtal>; 593 }; 594 595 main: mainck { 596 compatible = "atmel,at91rm9200-clk-main"; 597 #clock-cells = <0>; 598 clocks = <&main_osc>; 599 }; 600 601 plla: pllack@0 { 602 compatible = "atmel,at91rm9200-clk-pll"; 603 #clock-cells = <0>; 604 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 605 clocks = <&main>; 606 reg = <0>; 607 atmel,clk-input-range = <1000000 32000000>; 608 #atmel,pll-clk-output-range-cells = <4>; 609 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 610 <190000000 240000000 2 1>; 611 }; 612 613 pllb: pllbck@1 { 614 compatible = "atmel,at91rm9200-clk-pll"; 615 #clock-cells = <0>; 616 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 617 clocks = <&main>; 618 reg = <1>; 619 atmel,clk-input-range = <1000000 5000000>; 620 #atmel,pll-clk-output-range-cells = <4>; 621 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; 622 }; 623 624 mck: masterck { 625 compatible = "atmel,at91rm9200-clk-master"; 626 #clock-cells = <0>; 627 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 628 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 629 atmel,clk-output-range = <0 94000000>; 630 atmel,clk-divisors = <1 2 4 0>; 631 u-boot,dm-pre-reloc; 632 }; 633 634 usb: usbck { 635 compatible = "atmel,at91rm9200-clk-usb"; 636 #clock-cells = <0>; 637 atmel,clk-divisors = <1 2 4 0>; 638 clocks = <&pllb>; 639 }; 640 641 prog: progck { 642 compatible = "atmel,at91rm9200-clk-programmable"; 643 #address-cells = <1>; 644 #size-cells = <0>; 645 interrupt-parent = <&pmc>; 646 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 647 648 prog0: progi@0 { 649 #clock-cells = <0>; 650 reg = <0>; 651 interrupts = <AT91_PMC_PCKRDY(0)>; 652 }; 653 654 prog1: prog@1 { 655 #clock-cells = <0>; 656 reg = <1>; 657 interrupts = <AT91_PMC_PCKRDY(1)>; 658 }; 659 660 prog2: prog@2 { 661 #clock-cells = <0>; 662 reg = <2>; 663 interrupts = <AT91_PMC_PCKRDY(2)>; 664 }; 665 666 prog3: prog@3 { 667 #clock-cells = <0>; 668 reg = <3>; 669 interrupts = <AT91_PMC_PCKRDY(3)>; 670 }; 671 }; 672 673 systemck { 674 compatible = "atmel,at91rm9200-clk-system"; 675 #address-cells = <1>; 676 #size-cells = <0>; 677 678 uhpck: uhpck@6 { 679 #clock-cells = <0>; 680 reg = <6>; 681 clocks = <&usb>; 682 }; 683 684 udpck: udpck@7 { 685 #clock-cells = <0>; 686 reg = <7>; 687 clocks = <&usb>; 688 }; 689 690 pck0: pck@8 { 691 #clock-cells = <0>; 692 reg = <8>; 693 clocks = <&prog0>; 694 }; 695 696 pck1: pck@9 { 697 #clock-cells = <0>; 698 reg = <9>; 699 clocks = <&prog1>; 700 }; 701 702 pck2: pck@10 { 703 #clock-cells = <0>; 704 reg = <10>; 705 clocks = <&prog2>; 706 }; 707 708 pck3: pck@11 { 709 #clock-cells = <0>; 710 reg = <11>; 711 clocks = <&prog3>; 712 }; 713 714 hclk0: hclk@16 { 715 #clock-cells = <0>; 716 reg = <16>; 717 clocks = <&mck>; 718 }; 719 720 hclk1: hclk@17 { 721 #clock-cells = <0>; 722 reg = <17>; 723 clocks = <&mck>; 724 }; 725 }; 726 727 periphck { 728 compatible = "atmel,at91rm9200-clk-peripheral"; 729 #address-cells = <1>; 730 #size-cells = <0>; 731 clocks = <&mck>; 732 u-boot,dm-pre-reloc; 733 734 pioA_clk: pioA_clk@2 { 735 #clock-cells = <0>; 736 reg = <2>; 737 u-boot,dm-pre-reloc; 738 }; 739 740 pioB_clk: pioB_clk@3 { 741 #clock-cells = <0>; 742 reg = <3>; 743 u-boot,dm-pre-reloc; 744 }; 745 746 pioC_clk: pioC_clk@4 { 747 #clock-cells = <0>; 748 reg = <4>; 749 u-boot,dm-pre-reloc; 750 }; 751 752 usart0_clk: usart0_clk@6 { 753 #clock-cells = <0>; 754 reg = <6>; 755 }; 756 757 usart1_clk: usart1_clk@7 { 758 #clock-cells = <0>; 759 reg = <7>; 760 }; 761 762 usart2_clk: usart2_clk@8 { 763 #clock-cells = <0>; 764 reg = <8>; 765 }; 766 767 mci0_clk: mci0_clk@9 { 768 #clock-cells = <0>; 769 reg = <9>; 770 }; 771 772 udc_clk: udc_clk@10 { 773 #clock-cells = <0>; 774 reg = <10>; 775 }; 776 777 twi0_clk: twi0_clk@11 { 778 reg = <11>; 779 #clock-cells = <0>; 780 }; 781 782 spi0_clk: spi0_clk@12 { 783 #clock-cells = <0>; 784 reg = <12>; 785 }; 786 787 spi1_clk: spi1_clk@13 { 788 #clock-cells = <0>; 789 reg = <13>; 790 }; 791 792 ssc0_clk: ssc0_clk@14 { 793 #clock-cells = <0>; 794 reg = <14>; 795 }; 796 797 ssc1_clk: ssc1_clk@15 { 798 #clock-cells = <0>; 799 reg = <15>; 800 }; 801 802 ssc2_clk: ssc2_clk@16 { 803 #clock-cells = <0>; 804 reg = <16>; 805 }; 806 807 tc0_clk: tc0_clk@17 { 808 #clock-cells = <0>; 809 reg = <17>; 810 }; 811 812 tc1_clk: tc1_clk@18 { 813 #clock-cells = <0>; 814 reg = <18>; 815 }; 816 817 tc2_clk: tc2_clk@19 { 818 #clock-cells = <0>; 819 reg = <19>; 820 }; 821 822 ohci_clk: ohci_clk@20 { 823 #clock-cells = <0>; 824 reg = <20>; 825 }; 826 827 lcd_clk: lcd_clk@21 { 828 #clock-cells = <0>; 829 reg = <21>; 830 }; 831 }; 832 }; 833 834 rstc@fffffd00 { 835 compatible = "atmel,at91sam9260-rstc"; 836 reg = <0xfffffd00 0x10>; 837 clocks = <&slow_xtal>; 838 }; 839 840 shdwc@fffffd10 { 841 compatible = "atmel,at91sam9260-shdwc"; 842 reg = <0xfffffd10 0x10>; 843 clocks = <&slow_xtal>; 844 }; 845 846 pit: timer@fffffd30 { 847 compatible = "atmel,at91sam9260-pit"; 848 reg = <0xfffffd30 0xf>; 849 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 850 clocks = <&mck>; 851 }; 852 853 rtc@fffffd20 { 854 compatible = "atmel,at91sam9260-rtt"; 855 reg = <0xfffffd20 0x10>; 856 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 857 clocks = <&slow_xtal>; 858 status = "disabled"; 859 }; 860 861 watchdog@fffffd40 { 862 compatible = "atmel,at91sam9260-wdt"; 863 reg = <0xfffffd40 0x10>; 864 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 865 clocks = <&slow_xtal>; 866 status = "disabled"; 867 }; 868 869 gpbr: syscon@fffffd50 { 870 compatible = "atmel,at91sam9260-gpbr", "syscon"; 871 reg = <0xfffffd50 0x10>; 872 status = "disabled"; 873 }; 874 }; 875 }; 876 877 i2c@0 { 878 compatible = "i2c-gpio"; 879 pinctrl-names = "default"; 880 pinctrl-0 = <&pinctrl_i2c_bitbang>; 881 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */ 882 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */ 883 i2c-gpio,sda-open-drain; 884 i2c-gpio,scl-open-drain; 885 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 886 #address-cells = <1>; 887 #size-cells = <0>; 888 status = "disabled"; 889 }; 890}; 891