1/* 2 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC 3 * 4 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> 5 * 6 * Licensed under GPLv2 only. 7 */ 8 9#include "skeleton.dtsi" 10#include <dt-bindings/pinctrl/at91.h> 11#include <dt-bindings/interrupt-controller/irq.h> 12#include <dt-bindings/gpio/gpio.h> 13#include <dt-bindings/clock/at91.h> 14 15/ { 16 model = "Atmel AT91SAM9261 family SoC"; 17 compatible = "atmel,at91sam9261"; 18 interrupt-parent = <&aic>; 19 20 aliases { 21 serial0 = &dbgu; 22 serial1 = &usart0; 23 serial2 = &usart1; 24 serial3 = &usart2; 25 gpio0 = &pioA; 26 gpio1 = &pioB; 27 gpio2 = &pioC; 28 tcb0 = &tcb0; 29 i2c0 = &i2c0; 30 ssc0 = &ssc0; 31 ssc1 = &ssc1; 32 ssc2 = &ssc2; 33 spi0 = &spi0; 34 }; 35 36 cpus { 37 #address-cells = <0>; 38 #size-cells = <0>; 39 40 cpu { 41 compatible = "arm,arm926ej-s"; 42 device_type = "cpu"; 43 }; 44 }; 45 46 memory { 47 reg = <0x20000000 0x08000000>; 48 }; 49 50 clocks { 51 main_xtal: main_xtal { 52 compatible = "fixed-clock"; 53 #clock-cells = <0>; 54 clock-frequency = <0>; 55 }; 56 57 slow_xtal: slow_xtal { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 }; 63 64 sram: sram@00300000 { 65 compatible = "mmio-sram"; 66 reg = <0x00300000 0x28000>; 67 }; 68 69 ahb { 70 compatible = "simple-bus"; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 u-boot,dm-pre-reloc; 75 76 usb0: ohci@00500000 { 77 compatible = "atmel,at91rm9200-ohci", "usb-ohci"; 78 reg = <0x00500000 0x100000>; 79 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>; 80 clocks = <&ohci_clk>, <&hclk0>, <&uhpck>; 81 clock-names = "ohci_clk", "hclk", "uhpck"; 82 status = "disabled"; 83 }; 84 85 fb0: fb@0x00600000 { 86 compatible = "atmel,at91sam9261-lcdc"; 87 reg = <0x00600000 0x1000>; 88 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_fb>; 91 clocks = <&lcd_clk>, <&hclk1>; 92 clock-names = "lcdc_clk", "hclk"; 93 status = "disabled"; 94 }; 95 96 nand0: nand@40000000 { 97 compatible = "atmel,at91rm9200-nand"; 98 #address-cells = <1>; 99 #size-cells = <1>; 100 reg = <0x40000000 0x10000000>; 101 atmel,nand-addr-offset = <22>; 102 atmel,nand-cmd-offset = <21>; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_nand>; 105 106 gpios = <&pioC 15 GPIO_ACTIVE_HIGH>, 107 <&pioC 14 GPIO_ACTIVE_HIGH>, 108 <0>; 109 status = "disabled"; 110 }; 111 112 apb { 113 compatible = "simple-bus"; 114 #address-cells = <1>; 115 #size-cells = <1>; 116 ranges; 117 u-boot,dm-pre-reloc; 118 119 tcb0: timer@fffa0000 { 120 compatible = "atmel,at91rm9200-tcb"; 121 reg = <0xfffa0000 0x100>; 122 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>, 123 <18 IRQ_TYPE_LEVEL_HIGH 0>, 124 <19 IRQ_TYPE_LEVEL_HIGH 0>; 125 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&slow_xtal>; 126 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 127 }; 128 129 usb1: gadget@fffa4000 { 130 compatible = "atmel,at91sam9261-udc"; 131 reg = <0xfffa4000 0x4000>; 132 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 133 clocks = <&udc_clk>, <&udpck>; 134 clock-names = "pclk", "hclk"; 135 atmel,matrix = <&matrix>; 136 status = "disabled"; 137 }; 138 139 mmc0: mmc@fffa8000 { 140 compatible = "atmel,hsmci"; 141 reg = <0xfffa8000 0x600>; 142 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>; 143 pinctrl-names = "default"; 144 pinctrl-0 = <&pinctrl_mmc0_clk>, <&pinctrl_mmc0_slot0_cmd_dat0>, <&pinctrl_mmc0_slot0_dat1_3>; 145 #address-cells = <1>; 146 #size-cells = <0>; 147 clocks = <&mci0_clk>; 148 clock-names = "mci_clk"; 149 status = "disabled"; 150 }; 151 152 i2c0: i2c@fffac000 { 153 compatible = "atmel,at91sam9261-i2c"; 154 pinctrl-names = "default"; 155 pinctrl-0 = <&pinctrl_i2c_twi>; 156 reg = <0xfffac000 0x100>; 157 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 158 #address-cells = <1>; 159 #size-cells = <0>; 160 clocks = <&twi0_clk>; 161 status = "disabled"; 162 }; 163 164 usart0: serial@fffb0000 { 165 compatible = "atmel,at91sam9260-usart"; 166 reg = <0xfffb0000 0x200>; 167 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 168 atmel,use-dma-rx; 169 atmel,use-dma-tx; 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_usart0>; 172 clocks = <&usart0_clk>; 173 clock-names = "usart"; 174 status = "disabled"; 175 }; 176 177 usart1: serial@fffb4000 { 178 compatible = "atmel,at91sam9260-usart"; 179 reg = <0xfffb4000 0x200>; 180 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 181 atmel,use-dma-rx; 182 atmel,use-dma-tx; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&pinctrl_usart1>; 185 clocks = <&usart1_clk>; 186 clock-names = "usart"; 187 status = "disabled"; 188 }; 189 190 usart2: serial@fffb8000{ 191 compatible = "atmel,at91sam9260-usart"; 192 reg = <0xfffb8000 0x200>; 193 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 194 atmel,use-dma-rx; 195 atmel,use-dma-tx; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&pinctrl_usart2>; 198 clocks = <&usart2_clk>; 199 clock-names = "usart"; 200 status = "disabled"; 201 }; 202 203 ssc0: ssc@fffbc000 { 204 compatible = "atmel,at91rm9200-ssc"; 205 reg = <0xfffbc000 0x4000>; 206 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 209 clocks = <&ssc0_clk>; 210 clock-names = "pclk"; 211 status = "disabled"; 212 }; 213 214 ssc1: ssc@fffc0000 { 215 compatible = "atmel,at91rm9200-ssc"; 216 reg = <0xfffc0000 0x4000>; 217 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 220 clocks = <&ssc1_clk>; 221 clock-names = "pclk"; 222 status = "disabled"; 223 }; 224 225 ssc2: ssc@fffc4000 { 226 compatible = "atmel,at91rm9200-ssc"; 227 reg = <0xfffc4000 0x4000>; 228 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>; 229 pinctrl-names = "default"; 230 pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>; 231 clocks = <&ssc2_clk>; 232 clock-names = "pclk"; 233 status = "disabled"; 234 }; 235 236 spi0: spi@fffc8000 { 237 #address-cells = <1>; 238 #size-cells = <0>; 239 compatible = "atmel,at91rm9200-spi"; 240 reg = <0xfffc8000 0x200>; 241 cs-gpios = <0>, <0>, <0>, <0>; 242 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>; 243 pinctrl-names = "default"; 244 pinctrl-0 = <&pinctrl_spi0>; 245 clocks = <&spi0_clk>; 246 clock-names = "spi_clk"; 247 status = "disabled"; 248 }; 249 250 spi1: spi@fffcc000 { 251 #address-cells = <1>; 252 #size-cells = <0>; 253 compatible = "atmel,at91rm9200-spi"; 254 reg = <0xfffcc000 0x200>; 255 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_spi1>; 258 clocks = <&spi1_clk>; 259 clock-names = "spi_clk"; 260 status = "disabled"; 261 }; 262 263 ramc: ramc@ffffea00 { 264 compatible = "atmel,at91sam9260-sdramc"; 265 reg = <0xffffea00 0x200>; 266 }; 267 268 matrix: matrix@ffffee00 { 269 compatible = "atmel,at91sam9260-bus-matrix", "syscon"; 270 reg = <0xffffee00 0x200>; 271 }; 272 273 aic: interrupt-controller@fffff000 { 274 #interrupt-cells = <3>; 275 compatible = "atmel,at91rm9200-aic"; 276 interrupt-controller; 277 reg = <0xfffff000 0x200>; 278 atmel,external-irqs = <29 30 31>; 279 }; 280 281 dbgu: serial@fffff200 { 282 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 283 reg = <0xfffff200 0x200>; 284 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 285 pinctrl-names = "default"; 286 pinctrl-0 = <&pinctrl_dbgu>; 287 clocks = <&mck>; 288 clock-names = "usart"; 289 status = "disabled"; 290 }; 291 292 pioA: gpio@fffff400 { 293 compatible = "atmel,at91rm9200-gpio"; 294 reg = <0xfffff400 0x200>; 295 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 296 #gpio-cells = <2>; 297 gpio-controller; 298 interrupt-controller; 299 #interrupt-cells = <2>; 300 clocks = <&pioA_clk>; 301 u-boot,dm-pre-reloc; 302 }; 303 304 pioB: gpio@fffff600 { 305 compatible = "atmel,at91rm9200-gpio"; 306 reg = <0xfffff600 0x200>; 307 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 308 #gpio-cells = <2>; 309 gpio-controller; 310 interrupt-controller; 311 #interrupt-cells = <2>; 312 clocks = <&pioB_clk>; 313 u-boot,dm-pre-reloc; 314 }; 315 316 pioC: gpio@fffff800 { 317 compatible = "atmel,at91rm9200-gpio"; 318 reg = <0xfffff800 0x200>; 319 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 320 #gpio-cells = <2>; 321 gpio-controller; 322 interrupt-controller; 323 #interrupt-cells = <2>; 324 clocks = <&pioC_clk>; 325 u-boot,dm-pre-reloc; 326 }; 327 328 pinctrl@fffff400 { 329 #address-cells = <1>; 330 #size-cells = <1>; 331 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 332 ranges = <0xfffff400 0xfffff400 0x600>; 333 reg = <0xfffff400 0x200 /* pioA */ 334 0xfffff600 0x200 /* pioB */ 335 0xfffff800 0x200 /* pioC */ 336 >; 337 atmel,mux-mask = 338 /* A B */ 339 <0xffffffff 0xfffffff7>, /* pioA */ 340 <0xffffffff 0xfffffff4>, /* pioB */ 341 <0xffffffff 0xffffff07>; /* pioC */ 342 u-boot,dm-pre-reloc; 343 344 /* shared pinctrl settings */ 345 dbgu { 346 u-boot,dm-pre-reloc; 347 pinctrl_dbgu: dbgu-0 { 348 atmel,pins = 349 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, 350 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 351 }; 352 }; 353 354 usart0 { 355 pinctrl_usart0: usart0-0 { 356 atmel,pins = 357 <AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 358 <AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 359 }; 360 361 pinctrl_usart0_rts: usart0_rts-0 { 362 atmel,pins = 363 <AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 364 }; 365 366 pinctrl_usart0_cts: usart0_cts-0 { 367 atmel,pins = 368 <AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; 369 }; 370 }; 371 372 usart1 { 373 pinctrl_usart1: usart1-0 { 374 atmel,pins = 375 <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 376 <AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; 377 }; 378 379 pinctrl_usart1_rts: usart1_rts-0 { 380 atmel,pins = 381 <AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_NONE>; 382 }; 383 384 pinctrl_usart1_cts: usart1_cts-0 { 385 atmel,pins = 386 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>; 387 }; 388 }; 389 390 usart2 { 391 pinctrl_usart2: usart2-0 { 392 atmel,pins = 393 <AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 394 <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 395 }; 396 397 pinctrl_usart2_rts: usart2_rts-0 { 398 atmel,pins = 399 <AT91_PIOA 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 400 }; 401 402 pinctrl_usart2_cts: usart2_cts-0 { 403 atmel,pins = 404 <AT91_PIOA 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 405 }; 406 }; 407 408 nand { 409 pinctrl_nand: nand-0 { 410 atmel,pins = 411 <AT91_PIOC 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>, 412 <AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 413 }; 414 }; 415 416 mmc0 { 417 pinctrl_mmc0_clk: mmc0_clk-0 { 418 atmel,pins = 419 <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 420 }; 421 422 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 423 atmel,pins = 424 <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 425 <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 426 }; 427 428 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 429 atmel,pins = 430 <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 431 <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>, 432 <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; 433 }; 434 }; 435 436 ssc0 { 437 pinctrl_ssc0_tx: ssc0_tx-0 { 438 atmel,pins = 439 <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>, 440 <AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>, 441 <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; 442 }; 443 444 pinctrl_ssc0_rx: ssc0_rx-0 { 445 atmel,pins = 446 <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>, 447 <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 448 <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; 449 }; 450 }; 451 452 ssc1 { 453 pinctrl_ssc1_tx: ssc1_tx-0 { 454 atmel,pins = 455 <AT91_PIOA 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 456 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 457 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 458 }; 459 460 pinctrl_ssc1_rx: ssc1_rx-0 { 461 atmel,pins = 462 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 463 <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 464 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 465 }; 466 }; 467 468 ssc2 { 469 pinctrl_ssc2_tx: ssc2_tx-0 { 470 atmel,pins = 471 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, 472 <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, 473 <AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; 474 }; 475 476 pinctrl_ssc2_rx: ssc2_rx-0 { 477 atmel,pins = 478 <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>, 479 <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 480 <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 481 }; 482 }; 483 484 spi0 { 485 pinctrl_spi0: spi0-0 { 486 atmel,pins = 487 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 488 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, 489 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 490 }; 491 }; 492 493 spi1 { 494 pinctrl_spi1: spi1-0 { 495 atmel,pins = 496 <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE>, 497 <AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_NONE>, 498 <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 499 }; 500 }; 501 502 tcb0 { 503 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 504 atmel,pins = <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 505 }; 506 507 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 508 atmel,pins = <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; 509 }; 510 511 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 512 atmel,pins = <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 513 }; 514 515 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 516 atmel,pins = <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 517 }; 518 519 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 520 atmel,pins = <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>; 521 }; 522 523 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 524 atmel,pins = <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; 525 }; 526 527 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 528 atmel,pins = <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 529 }; 530 531 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 532 atmel,pins = <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 533 }; 534 535 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 536 atmel,pins = <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; 537 }; 538 }; 539 540 i2c0 { 541 pinctrl_i2c_bitbang: i2c-0-bitbang { 542 atmel,pins = 543 <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>, 544 <AT91_PIOA 8 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 545 }; 546 pinctrl_i2c_twi: i2c-0-twi { 547 atmel,pins = 548 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 549 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 550 }; 551 }; 552 553 fb { 554 pinctrl_fb: fb-0 { 555 atmel,pins = 556 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE>, 557 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 558 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 559 <AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 560 <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>, 561 <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>, 562 <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>, 563 <AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>, 564 <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE>, 565 <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 566 <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 567 <AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 568 <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 569 <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 570 <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE>, 571 <AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 572 <AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 573 <AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE>, 574 <AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>, 575 <AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>, 576 <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>; 577 }; 578 }; 579 }; 580 581 pmc: pmc@fffffc00 { 582 compatible = "atmel,at91rm9200-pmc", "syscon"; 583 reg = <0xfffffc00 0x100>; 584 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 585 interrupt-controller; 586 #address-cells = <1>; 587 #size-cells = <0>; 588 #interrupt-cells = <1>; 589 u-boot,dm-pre-reloc; 590 591 main_osc: main_osc { 592 compatible = "atmel,at91rm9200-clk-main-osc"; 593 #clock-cells = <0>; 594 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 595 clocks = <&main_xtal>; 596 }; 597 598 main: mainck { 599 compatible = "atmel,at91rm9200-clk-main"; 600 #clock-cells = <0>; 601 clocks = <&main_osc>; 602 }; 603 604 plla: pllack@0 { 605 compatible = "atmel,at91rm9200-clk-pll"; 606 #clock-cells = <0>; 607 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 608 clocks = <&main>; 609 reg = <0>; 610 atmel,clk-input-range = <1000000 32000000>; 611 #atmel,pll-clk-output-range-cells = <4>; 612 atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, 613 <190000000 240000000 2 1>; 614 }; 615 616 pllb: pllbck@1 { 617 compatible = "atmel,at91rm9200-clk-pll"; 618 #clock-cells = <0>; 619 interrupts-extended = <&pmc AT91_PMC_LOCKB>; 620 clocks = <&main>; 621 reg = <1>; 622 atmel,clk-input-range = <1000000 5000000>; 623 #atmel,pll-clk-output-range-cells = <4>; 624 atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; 625 }; 626 627 mck: masterck { 628 compatible = "atmel,at91rm9200-clk-master"; 629 #clock-cells = <0>; 630 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 631 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 632 atmel,clk-output-range = <0 94000000>; 633 atmel,clk-divisors = <1 2 4 0>; 634 u-boot,dm-pre-reloc; 635 }; 636 637 usb: usbck { 638 compatible = "atmel,at91rm9200-clk-usb"; 639 #clock-cells = <0>; 640 atmel,clk-divisors = <1 2 4 0>; 641 clocks = <&pllb>; 642 }; 643 644 prog: progck { 645 compatible = "atmel,at91rm9200-clk-programmable"; 646 #address-cells = <1>; 647 #size-cells = <0>; 648 interrupt-parent = <&pmc>; 649 clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>; 650 651 prog0: progi@0 { 652 #clock-cells = <0>; 653 reg = <0>; 654 interrupts = <AT91_PMC_PCKRDY(0)>; 655 }; 656 657 prog1: prog@1 { 658 #clock-cells = <0>; 659 reg = <1>; 660 interrupts = <AT91_PMC_PCKRDY(1)>; 661 }; 662 663 prog2: prog@2 { 664 #clock-cells = <0>; 665 reg = <2>; 666 interrupts = <AT91_PMC_PCKRDY(2)>; 667 }; 668 669 prog3: prog@3 { 670 #clock-cells = <0>; 671 reg = <3>; 672 interrupts = <AT91_PMC_PCKRDY(3)>; 673 }; 674 }; 675 676 systemck { 677 compatible = "atmel,at91rm9200-clk-system"; 678 #address-cells = <1>; 679 #size-cells = <0>; 680 681 uhpck: uhpck@6 { 682 #clock-cells = <0>; 683 reg = <6>; 684 clocks = <&usb>; 685 }; 686 687 udpck: udpck@7 { 688 #clock-cells = <0>; 689 reg = <7>; 690 clocks = <&usb>; 691 }; 692 693 pck0: pck@8 { 694 #clock-cells = <0>; 695 reg = <8>; 696 clocks = <&prog0>; 697 }; 698 699 pck1: pck@9 { 700 #clock-cells = <0>; 701 reg = <9>; 702 clocks = <&prog1>; 703 }; 704 705 pck2: pck@10 { 706 #clock-cells = <0>; 707 reg = <10>; 708 clocks = <&prog2>; 709 }; 710 711 pck3: pck@11 { 712 #clock-cells = <0>; 713 reg = <11>; 714 clocks = <&prog3>; 715 }; 716 717 hclk0: hclk@16 { 718 #clock-cells = <0>; 719 reg = <16>; 720 clocks = <&mck>; 721 }; 722 723 hclk1: hclk@17 { 724 #clock-cells = <0>; 725 reg = <17>; 726 clocks = <&mck>; 727 }; 728 }; 729 730 periphck { 731 compatible = "atmel,at91rm9200-clk-peripheral"; 732 #address-cells = <1>; 733 #size-cells = <0>; 734 clocks = <&mck>; 735 u-boot,dm-pre-reloc; 736 737 pioA_clk: pioA_clk@2 { 738 #clock-cells = <0>; 739 reg = <2>; 740 u-boot,dm-pre-reloc; 741 }; 742 743 pioB_clk: pioB_clk@3 { 744 #clock-cells = <0>; 745 reg = <3>; 746 u-boot,dm-pre-reloc; 747 }; 748 749 pioC_clk: pioC_clk@4 { 750 #clock-cells = <0>; 751 reg = <4>; 752 u-boot,dm-pre-reloc; 753 }; 754 755 usart0_clk: usart0_clk@6 { 756 #clock-cells = <0>; 757 reg = <6>; 758 }; 759 760 usart1_clk: usart1_clk@7 { 761 #clock-cells = <0>; 762 reg = <7>; 763 }; 764 765 usart2_clk: usart2_clk@8 { 766 #clock-cells = <0>; 767 reg = <8>; 768 }; 769 770 mci0_clk: mci0_clk@9 { 771 #clock-cells = <0>; 772 reg = <9>; 773 }; 774 775 udc_clk: udc_clk@10 { 776 #clock-cells = <0>; 777 reg = <10>; 778 }; 779 780 twi0_clk: twi0_clk@11 { 781 reg = <11>; 782 #clock-cells = <0>; 783 }; 784 785 spi0_clk: spi0_clk@12 { 786 #clock-cells = <0>; 787 reg = <12>; 788 }; 789 790 spi1_clk: spi1_clk@13 { 791 #clock-cells = <0>; 792 reg = <13>; 793 }; 794 795 ssc0_clk: ssc0_clk@14 { 796 #clock-cells = <0>; 797 reg = <14>; 798 }; 799 800 ssc1_clk: ssc1_clk@15 { 801 #clock-cells = <0>; 802 reg = <15>; 803 }; 804 805 ssc2_clk: ssc2_clk@16 { 806 #clock-cells = <0>; 807 reg = <16>; 808 }; 809 810 tc0_clk: tc0_clk@17 { 811 #clock-cells = <0>; 812 reg = <17>; 813 }; 814 815 tc1_clk: tc1_clk@18 { 816 #clock-cells = <0>; 817 reg = <18>; 818 }; 819 820 tc2_clk: tc2_clk@19 { 821 #clock-cells = <0>; 822 reg = <19>; 823 }; 824 825 ohci_clk: ohci_clk@20 { 826 #clock-cells = <0>; 827 reg = <20>; 828 }; 829 830 lcd_clk: lcd_clk@21 { 831 #clock-cells = <0>; 832 reg = <21>; 833 }; 834 }; 835 }; 836 837 rstc@fffffd00 { 838 compatible = "atmel,at91sam9260-rstc"; 839 reg = <0xfffffd00 0x10>; 840 clocks = <&slow_xtal>; 841 }; 842 843 shdwc@fffffd10 { 844 compatible = "atmel,at91sam9260-shdwc"; 845 reg = <0xfffffd10 0x10>; 846 clocks = <&slow_xtal>; 847 }; 848 849 pit: timer@fffffd30 { 850 compatible = "atmel,at91sam9260-pit"; 851 reg = <0xfffffd30 0xf>; 852 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 853 clocks = <&mck>; 854 }; 855 856 rtc@fffffd20 { 857 compatible = "atmel,at91sam9260-rtt"; 858 reg = <0xfffffd20 0x10>; 859 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 860 clocks = <&slow_xtal>; 861 status = "disabled"; 862 }; 863 864 watchdog@fffffd40 { 865 compatible = "atmel,at91sam9260-wdt"; 866 reg = <0xfffffd40 0x10>; 867 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 868 clocks = <&slow_xtal>; 869 status = "disabled"; 870 }; 871 872 gpbr: syscon@fffffd50 { 873 compatible = "atmel,at91sam9260-gpbr", "syscon"; 874 reg = <0xfffffd50 0x10>; 875 status = "disabled"; 876 }; 877 }; 878 }; 879 880 i2c@0 { 881 compatible = "i2c-gpio"; 882 pinctrl-names = "default"; 883 pinctrl-0 = <&pinctrl_i2c_bitbang>; 884 gpios = <&pioA 7 GPIO_ACTIVE_HIGH>, /* sda */ 885 <&pioA 8 GPIO_ACTIVE_HIGH>; /* scl */ 886 i2c-gpio,sda-open-drain; 887 i2c-gpio,scl-open-drain; 888 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 889 #address-cells = <1>; 890 #size-cells = <0>; 891 status = "disabled"; 892 }; 893}; 894