1/dts-v1/; 2 3#include "ast2600-u-boot.dtsi" 4 5/ { 6 memory { 7 device_type = "memory"; 8 reg = <0x80000000 0x40000000>; 9 }; 10 11 chosen { 12 stdout-path = &uart5; 13 }; 14 15 aliases { 16 spi0 = &fmc; 17 spi1 = &spi1; 18 spi2 = &spi2; 19 ethernet0 = &mac0; 20 ethernet1 = &mac1; 21 ethernet2 = &mac2; 22 ethernet3 = &mac3; 23 mmc0 = &emmc_slot0; 24 mmc1 = &sdhci_slot0; 25 mmc2 = &sdhci_slot1; 26 }; 27 28 cpus { 29 cpu@0 { 30 clock-frequency = <800000000>; 31 }; 32 cpu@1 { 33 clock-frequency = <800000000>; 34 }; 35 }; 36}; 37 38&uart5 { 39 u-boot,dm-pre-reloc; 40 status = "okay"; 41}; 42 43&sdrammc { 44 clock-frequency = <400000000>; 45}; 46 47&wdt1 { 48 u-boot,dm-pre-reloc; 49 status = "okay"; 50}; 51 52&wdt2 { 53 u-boot,dm-pre-reloc; 54 status = "okay"; 55}; 56 57&wdt3 { 58 u-boot,dm-pre-reloc; 59 status = "okay"; 60}; 61 62&mdio { 63 status = "okay"; 64 #address-cells = <1>; 65 #size-cells = <0>; 66 ethphy1: ethernet-phy@1 { 67 reg = <0>; 68 }; 69 70 ethphy2: ethernet-phy@2 { 71 reg = <0>; 72 }; 73 74 ethphy3: ethernet-phy@3 { 75 reg = <0>; 76 }; 77 78 ethphy4: ethernet-phy@4 { 79 reg = <0>; 80 }; 81}; 82 83&mac0 { 84 status = "okay"; 85 phy-mode = "rgmii"; 86 phy-handle = <ðphy1>; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mac1link_default &pinctrl_mdio1_default>; 89}; 90 91&mac1 { 92 status = "okay"; 93 phy-mode = "rgmii"; 94 phy-handle = <ðphy2>; 95 pinctrl-names = "default"; 96 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mac2link_default &pinctrl_mdio2_default>; 97}; 98 99&mac2 { 100 status = "okay"; 101 phy-mode = "rgmii"; 102 phy-handle = <ðphy3>; 103 pinctrl-names = "default"; 104 pinctrl-0 = <&pinctrl_rgmii3_default &pinctrl_mac3link_default &pinctrl_mdio3_default>; 105}; 106 107&mac3 { 108 status = "okay"; 109 phy-mode = "rgmii"; 110 phy-handle = <ðphy4>; 111 pinctrl-names = "default"; 112 pinctrl-0 = <&pinctrl_rgmii4_default &pinctrl_mac4link_default &pinctrl_mdio4_default>; 113}; 114 115&fmc { 116 status = "okay"; 117#if 0 118 pinctrl-names = "default"; 119 pinctrl-0 = <&pinctrl_fmcquad_default>; 120#endif 121 flash@0 { 122 compatible = "spi-flash", "sst,w25q256"; 123 status = "okay"; 124 spi-max-frequency = <50000000>; 125 spi-tx-bus-width = <2>; 126 spi-rx-bus-width = <2>; 127 }; 128 129 flash@1 { 130 compatible = "spi-flash", "sst,w25q256"; 131 status = "okay"; 132 spi-max-frequency = <50000000>; 133 spi-tx-bus-width = <2>; 134 spi-rx-bus-width = <2>; 135 }; 136 137 flash@2 { 138 compatible = "spi-flash", "sst,w25q256"; 139 status = "okay"; 140 spi-max-frequency = <50000000>; 141 spi-tx-bus-width = <2>; 142 spi-rx-bus-width = <2>; 143 }; 144}; 145 146&spi1 { 147 status = "okay"; 148 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default 151 &pinctrl_spi1cs1_default &pinctrl_spi1wp_default 152 &pinctrl_spi1wp_default>; 153 154 flash@0 { 155 compatible = "spi-flash", "sst,w25q256"; 156 status = "okay"; 157 spi-max-frequency = <50000000>; 158 spi-tx-bus-width = <2>; 159 spi-rx-bus-width = <2>; 160 }; 161 162 flash@1 { 163 compatible = "spi-flash", "sst,w25q256"; 164 status = "okay"; 165 spi-max-frequency = <50000000>; 166 spi-tx-bus-width = <2>; 167 spi-rx-bus-width = <2>; 168 }; 169}; 170 171&spi2 { 172 status = "okay"; 173 174 pinctrl-names = "default"; 175 pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default 176 &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; 177 178 flash@0 { 179 compatible = "spi-flash", "sst,w25q256"; 180 status = "okay"; 181 spi-max-frequency = <50000000>; 182 spi-tx-bus-width = <2>; 183 spi-rx-bus-width = <2>; 184 }; 185 186 flash@1 { 187 compatible = "spi-flash", "sst,w25q256"; 188 status = "okay"; 189 spi-max-frequency = <50000000>; 190 spi-tx-bus-width = <2>; 191 spi-rx-bus-width = <2>; 192 }; 193 194 flash@2 { 195 compatible = "spi-flash", "sst,w25q256"; 196 status = "okay"; 197 spi-max-frequency = <50000000>; 198 spi-tx-bus-width = <2>; 199 spi-rx-bus-width = <2>; 200 }; 201}; 202 203&emmc_slot0 { 204 status = "okay"; 205 bus-width = <4>; 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_emmc_default>; 208}; 209 210&sdhci_slot0 { 211 status = "okay"; 212 bus-width = <4>; 213 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 214 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_sd1_default>; 217}; 218 219&sdhci_slot1 { 220 status = "okay"; 221 bus-width = <4>; 222 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 223 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&pinctrl_sd2_default>; 226}; 227 228&i2c4 { 229 status = "okay"; 230 231 pinctrl-names = "default"; 232 pinctrl-0 = <&pinctrl_i2c5_default>; 233}; 234 235&i2c5 { 236 status = "okay"; 237 238 pinctrl-names = "default"; 239 pinctrl-0 = <&pinctrl_i2c6_default>; 240}; 241 242&i2c6 { 243 status = "okay"; 244 245 pinctrl-names = "default"; 246 pinctrl-0 = <&pinctrl_i2c7_default>; 247}; 248 249&i2c7 { 250 status = "okay"; 251 252 pinctrl-names = "default"; 253 pinctrl-0 = <&pinctrl_i2c8_default>; 254}; 255 256&i2c8 { 257 status = "okay"; 258 259 pinctrl-names = "default"; 260 pinctrl-0 = <&pinctrl_i2c9_default>; 261}; 262 263#if 0 264&pcie_bridge1 { 265 status = "okay"; 266}; 267 268&h2x { 269 status = "okay"; 270}; 271#endif 272 273#if 0 274&fsim0 { 275 status = "okay"; 276}; 277 278&fsim1 { 279 status = "okay"; 280}; 281#endif 282