xref: /openbmc/u-boot/arch/arm/dts/ast2600a1-evb.dts (revision 43d14b2e)
1fb79a3bfSChia-Wei, Wang/dts-v1/;
2fb79a3bfSChia-Wei, Wang
3fb79a3bfSChia-Wei, Wang#include "ast2600-u-boot.dtsi"
4fb79a3bfSChia-Wei, Wang
5fb79a3bfSChia-Wei, Wang/ {
6fb79a3bfSChia-Wei, Wang	memory {
7fb79a3bfSChia-Wei, Wang		device_type = "memory";
8fb79a3bfSChia-Wei, Wang		reg = <0x80000000 0x40000000>;
9fb79a3bfSChia-Wei, Wang	};
10fb79a3bfSChia-Wei, Wang
11fb79a3bfSChia-Wei, Wang	chosen {
12fb79a3bfSChia-Wei, Wang		stdout-path = &uart5;
13fb79a3bfSChia-Wei, Wang	};
14fb79a3bfSChia-Wei, Wang
15fb79a3bfSChia-Wei, Wang	aliases {
160db450caSryan_chen		mmc0 = &emmc_slot0;
170db450caSryan_chen		mmc1 = &sdhci_slot0;
180db450caSryan_chen		mmc2 = &sdhci_slot1;
19fb79a3bfSChia-Wei, Wang		spi0 = &fmc;
20fb79a3bfSChia-Wei, Wang		spi1 = &spi1;
21fb79a3bfSChia-Wei, Wang		spi2 = &spi2;
22e8060417SDylan Hung		ethernet0 = &mac0;
23e8060417SDylan Hung		ethernet1 = &mac1;
24e8060417SDylan Hung		ethernet2 = &mac2;
25e8060417SDylan Hung		ethernet3 = &mac3;
26fb79a3bfSChia-Wei, Wang	};
27fb79a3bfSChia-Wei, Wang
28fb79a3bfSChia-Wei, Wang	cpus {
29fb79a3bfSChia-Wei, Wang		cpu@0 {
30fb79a3bfSChia-Wei, Wang			clock-frequency = <800000000>;
31fb79a3bfSChia-Wei, Wang		};
32fb79a3bfSChia-Wei, Wang		cpu@1 {
33fb79a3bfSChia-Wei, Wang			clock-frequency = <800000000>;
34fb79a3bfSChia-Wei, Wang		};
35fb79a3bfSChia-Wei, Wang	};
36fb79a3bfSChia-Wei, Wang};
37fb79a3bfSChia-Wei, Wang
38fb79a3bfSChia-Wei, Wang&uart5 {
39fb79a3bfSChia-Wei, Wang	u-boot,dm-pre-reloc;
40fb79a3bfSChia-Wei, Wang	status = "okay";
41fb79a3bfSChia-Wei, Wang};
42fb79a3bfSChia-Wei, Wang
43fb79a3bfSChia-Wei, Wang&sdrammc {
44fb79a3bfSChia-Wei, Wang	clock-frequency = <400000000>;
45fb79a3bfSChia-Wei, Wang};
46fb79a3bfSChia-Wei, Wang
47fb79a3bfSChia-Wei, Wang&wdt1 {
48fb79a3bfSChia-Wei, Wang	u-boot,dm-pre-reloc;
49fb79a3bfSChia-Wei, Wang	status = "okay";
50fb79a3bfSChia-Wei, Wang};
51fb79a3bfSChia-Wei, Wang
52fb79a3bfSChia-Wei, Wang&wdt2 {
53fb79a3bfSChia-Wei, Wang	u-boot,dm-pre-reloc;
54fb79a3bfSChia-Wei, Wang	status = "okay";
55fb79a3bfSChia-Wei, Wang};
56fb79a3bfSChia-Wei, Wang
57fb79a3bfSChia-Wei, Wang&wdt3 {
58fb79a3bfSChia-Wei, Wang	u-boot,dm-pre-reloc;
59fb79a3bfSChia-Wei, Wang	status = "okay";
60fb79a3bfSChia-Wei, Wang};
61fb79a3bfSChia-Wei, Wang
62fb79a3bfSChia-Wei, Wang&mdio {
63fb79a3bfSChia-Wei, Wang	status = "okay";
64*43d14b2eSDylan Hung	pinctrl-names = "default";
65*43d14b2eSDylan Hung	pinctrl-0 = <	&pinctrl_mdio1_default &pinctrl_mdio2_default
66*43d14b2eSDylan Hung			&pinctrl_mdio3_default &pinctrl_mdio4_default>;
67785eb4e9SDylan Hung	#address-cells = <1>;
68785eb4e9SDylan Hung	#size-cells = <0>;
69*43d14b2eSDylan Hung	ethphy0: ethernet-phy@0 {
70*43d14b2eSDylan Hung		reg = <0>;
71*43d14b2eSDylan Hung	};
72*43d14b2eSDylan Hung
73785eb4e9SDylan Hung	ethphy1: ethernet-phy@1 {
74785eb4e9SDylan Hung		reg = <0>;
75785eb4e9SDylan Hung	};
76785eb4e9SDylan Hung
77785eb4e9SDylan Hung	ethphy2: ethernet-phy@2 {
78785eb4e9SDylan Hung		reg = <0>;
79785eb4e9SDylan Hung	};
80785eb4e9SDylan Hung
81785eb4e9SDylan Hung	ethphy3: ethernet-phy@3 {
82785eb4e9SDylan Hung		reg = <0>;
83785eb4e9SDylan Hung	};
84fb79a3bfSChia-Wei, Wang};
85fb79a3bfSChia-Wei, Wang
86e8060417SDylan Hung&mac0 {
87fb79a3bfSChia-Wei, Wang	status = "okay";
88fb79a3bfSChia-Wei, Wang	phy-mode = "rgmii";
89*43d14b2eSDylan Hung	phy-handle = <&ethphy0>;
90fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
91*43d14b2eSDylan Hung	pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mac1link_default>;
92fb79a3bfSChia-Wei, Wang};
93fb79a3bfSChia-Wei, Wang
94e8060417SDylan Hung&mac1 {
95fb79a3bfSChia-Wei, Wang	status = "okay";
96fb79a3bfSChia-Wei, Wang	phy-mode = "rgmii";
97*43d14b2eSDylan Hung	phy-handle = <&ethphy1>;
98fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
99*43d14b2eSDylan Hung	pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mac2link_default>;
100fb79a3bfSChia-Wei, Wang};
101fb79a3bfSChia-Wei, Wang
102e8060417SDylan Hung&mac2 {
103fb79a3bfSChia-Wei, Wang	status = "okay";
104fb79a3bfSChia-Wei, Wang	phy-mode = "rgmii";
105*43d14b2eSDylan Hung	phy-handle = <&ethphy2>;
106fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
107*43d14b2eSDylan Hung	pinctrl-0 = <&pinctrl_rgmii3_default &pinctrl_mac3link_default>;
1089a1dcf0cSDylan Hung};
1099a1dcf0cSDylan Hung
110e8060417SDylan Hung&mac3 {
1119a1dcf0cSDylan Hung	status = "okay";
1129a1dcf0cSDylan Hung	phy-mode = "rgmii";
113*43d14b2eSDylan Hung	phy-handle = <&ethphy3>;
1149a1dcf0cSDylan Hung	pinctrl-names = "default";
115*43d14b2eSDylan Hung	pinctrl-0 = <&pinctrl_rgmii4_default &pinctrl_mac4link_default>;
116fb79a3bfSChia-Wei, Wang};
117fb79a3bfSChia-Wei, Wang
118fb79a3bfSChia-Wei, Wang&fmc {
119fb79a3bfSChia-Wei, Wang	status = "okay";
1200db450caSryan_chen
121fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
122fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_fmcquad_default>;
1230db450caSryan_chen
124fb79a3bfSChia-Wei, Wang	flash@0 {
125fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
126fb79a3bfSChia-Wei, Wang		status = "okay";
127fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1280db450caSryan_chen		spi-tx-bus-width = <4>;
1290db450caSryan_chen		spi-rx-bus-width = <4>;
130fb79a3bfSChia-Wei, Wang	};
131fb79a3bfSChia-Wei, Wang
132fb79a3bfSChia-Wei, Wang	flash@1 {
133fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
134fb79a3bfSChia-Wei, Wang		status = "okay";
135fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1360db450caSryan_chen		spi-tx-bus-width = <4>;
1370db450caSryan_chen		spi-rx-bus-width = <4>;
138fb79a3bfSChia-Wei, Wang	};
139fb79a3bfSChia-Wei, Wang
140fb79a3bfSChia-Wei, Wang	flash@2 {
141fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
142fb79a3bfSChia-Wei, Wang		status = "okay";
143fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1440db450caSryan_chen		spi-tx-bus-width = <4>;
1450db450caSryan_chen		spi-rx-bus-width = <4>;
146fb79a3bfSChia-Wei, Wang	};
147fb79a3bfSChia-Wei, Wang};
148fb79a3bfSChia-Wei, Wang
149fb79a3bfSChia-Wei, Wang&spi1 {
150fb79a3bfSChia-Wei, Wang	status = "okay";
151fb79a3bfSChia-Wei, Wang
152fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
153fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
154fb79a3bfSChia-Wei, Wang			&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
1550db450caSryan_chen			&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
156fb79a3bfSChia-Wei, Wang
157fb79a3bfSChia-Wei, Wang	flash@0 {
158fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
159fb79a3bfSChia-Wei, Wang		status = "okay";
160fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1610db450caSryan_chen		spi-tx-bus-width = <4>;
1620db450caSryan_chen		spi-rx-bus-width = <4>;
163fb79a3bfSChia-Wei, Wang	};
164fb79a3bfSChia-Wei, Wang
165fb79a3bfSChia-Wei, Wang	flash@1 {
166fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
167fb79a3bfSChia-Wei, Wang		status = "okay";
168fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1690db450caSryan_chen		spi-tx-bus-width = <4>;
1700db450caSryan_chen		spi-rx-bus-width = <4>;
171fb79a3bfSChia-Wei, Wang	};
172fb79a3bfSChia-Wei, Wang};
173fb79a3bfSChia-Wei, Wang
174fb79a3bfSChia-Wei, Wang&spi2 {
175fb79a3bfSChia-Wei, Wang	status = "okay";
176fb79a3bfSChia-Wei, Wang
177fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
178fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
179fb79a3bfSChia-Wei, Wang			&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
180fb79a3bfSChia-Wei, Wang
181fb79a3bfSChia-Wei, Wang	flash@0 {
182fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
183fb79a3bfSChia-Wei, Wang		status = "okay";
184fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1850db450caSryan_chen		spi-tx-bus-width = <4>;
1860db450caSryan_chen		spi-rx-bus-width = <4>;
187fb79a3bfSChia-Wei, Wang	};
188fb79a3bfSChia-Wei, Wang
189fb79a3bfSChia-Wei, Wang	flash@1 {
190fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
191fb79a3bfSChia-Wei, Wang		status = "okay";
192fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
1930db450caSryan_chen		spi-tx-bus-width = <4>;
1940db450caSryan_chen		spi-rx-bus-width = <4>;
195fb79a3bfSChia-Wei, Wang	};
196fb79a3bfSChia-Wei, Wang
197fb79a3bfSChia-Wei, Wang	flash@2 {
198fb79a3bfSChia-Wei, Wang		compatible = "spi-flash", "sst,w25q256";
199fb79a3bfSChia-Wei, Wang		status = "okay";
200fb79a3bfSChia-Wei, Wang		spi-max-frequency = <50000000>;
2010db450caSryan_chen		spi-tx-bus-width = <4>;
2020db450caSryan_chen		spi-rx-bus-width = <4>;
203fb79a3bfSChia-Wei, Wang	};
204fb79a3bfSChia-Wei, Wang};
205fb79a3bfSChia-Wei, Wang
206fb79a3bfSChia-Wei, Wang&emmc_slot0 {
207fb79a3bfSChia-Wei, Wang	status = "okay";
208fb79a3bfSChia-Wei, Wang	bus-width = <4>;
209fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
210fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_emmc_default>;
211fb79a3bfSChia-Wei, Wang};
212fb79a3bfSChia-Wei, Wang
213fb79a3bfSChia-Wei, Wang&sdhci_slot0 {
214fb79a3bfSChia-Wei, Wang	status = "okay";
215fb79a3bfSChia-Wei, Wang	bus-width = <4>;
216fb79a3bfSChia-Wei, Wang	pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
217fb79a3bfSChia-Wei, Wang	pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
218fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
219fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_sd1_default>;
220fb79a3bfSChia-Wei, Wang};
221fb79a3bfSChia-Wei, Wang
222fb79a3bfSChia-Wei, Wang&sdhci_slot1 {
223fb79a3bfSChia-Wei, Wang	status = "okay";
224fb79a3bfSChia-Wei, Wang	bus-width = <4>;
225fb79a3bfSChia-Wei, Wang	pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
226fb79a3bfSChia-Wei, Wang	pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
227fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
228fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_sd2_default>;
229fb79a3bfSChia-Wei, Wang};
230fb79a3bfSChia-Wei, Wang
231fb79a3bfSChia-Wei, Wang&i2c4 {
232fb79a3bfSChia-Wei, Wang	status = "okay";
233fb79a3bfSChia-Wei, Wang
234fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
235fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_i2c5_default>;
236fb79a3bfSChia-Wei, Wang};
237fb79a3bfSChia-Wei, Wang
238fb79a3bfSChia-Wei, Wang&i2c5 {
239fb79a3bfSChia-Wei, Wang	status = "okay";
240fb79a3bfSChia-Wei, Wang
241fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
242fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_i2c6_default>;
243fb79a3bfSChia-Wei, Wang};
244fb79a3bfSChia-Wei, Wang
245fb79a3bfSChia-Wei, Wang&i2c6 {
246fb79a3bfSChia-Wei, Wang	status = "okay";
247fb79a3bfSChia-Wei, Wang
248fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
249fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_i2c7_default>;
250fb79a3bfSChia-Wei, Wang};
251fb79a3bfSChia-Wei, Wang
252fb79a3bfSChia-Wei, Wang&i2c7 {
253fb79a3bfSChia-Wei, Wang	status = "okay";
254fb79a3bfSChia-Wei, Wang
255fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
256fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_i2c8_default>;
257fb79a3bfSChia-Wei, Wang};
258fb79a3bfSChia-Wei, Wang
259fb79a3bfSChia-Wei, Wang&i2c8 {
260fb79a3bfSChia-Wei, Wang	status = "okay";
261fb79a3bfSChia-Wei, Wang
262fb79a3bfSChia-Wei, Wang	pinctrl-names = "default";
263fb79a3bfSChia-Wei, Wang	pinctrl-0 = <&pinctrl_i2c9_default>;
264fb79a3bfSChia-Wei, Wang};
265fb79a3bfSChia-Wei, Wang
266fb79a3bfSChia-Wei, Wang&pcie_bridge1 {
267fb79a3bfSChia-Wei, Wang	status = "okay";
268fb79a3bfSChia-Wei, Wang};
269fb79a3bfSChia-Wei, Wang
270fb79a3bfSChia-Wei, Wang&h2x {
271fb79a3bfSChia-Wei, Wang	status = "okay";
272fb79a3bfSChia-Wei, Wang};
273fb79a3bfSChia-Wei, Wang
274fb79a3bfSChia-Wei, Wang#if 0
275fb79a3bfSChia-Wei, Wang&fsim0 {
276fb79a3bfSChia-Wei, Wang	status = "okay";
277fb79a3bfSChia-Wei, Wang};
278fb79a3bfSChia-Wei, Wang
279fb79a3bfSChia-Wei, Wang&fsim1 {
280fb79a3bfSChia-Wei, Wang	status = "okay";
281fb79a3bfSChia-Wei, Wang};
282fb79a3bfSChia-Wei, Wang#endif
2830db450caSryan_chen
2840db450caSryan_chen&ehci1 {
2850db450caSryan_chen	status = "okay";
2860db450caSryan_chen};
287