1/dts-v1/; 2 3#include "ast2600-u-boot.dtsi" 4 5/ { 6 model = "AST2600 EVB"; 7 compatible = "aspeed,ast2600-evb", "aspeed,ast2600"; 8 9 memory { 10 device_type = "memory"; 11 reg = <0x80000000 0x40000000>; 12 }; 13 14 chosen { 15 stdout-path = &uart5; 16 }; 17 18 aliases { 19 mmc0 = &emmc_slot0; 20 mmc1 = &sdhci_slot0; 21 mmc2 = &sdhci_slot1; 22 spi0 = &fmc; 23 spi1 = &spi1; 24 spi2 = &spi2; 25 26 ethernet0 = &mac1; 27 ethernet1 = &mac2; 28 ethernet2 = &mac3; 29 }; 30 31 cpus { 32 cpu@0 { 33 clock-frequency = <800000000>; 34 }; 35 cpu@1 { 36 clock-frequency = <800000000>; 37 }; 38 }; 39}; 40 41&uart5 { 42 u-boot,dm-pre-reloc; 43 status = "okay"; 44}; 45 46&sdrammc { 47 clock-frequency = <400000000>; 48}; 49 50&wdt1 { 51 u-boot,dm-pre-reloc; 52 status = "okay"; 53}; 54 55&wdt2 { 56 u-boot,dm-pre-reloc; 57 status = "okay"; 58}; 59 60&wdt3 { 61 u-boot,dm-pre-reloc; 62 status = "okay"; 63}; 64 65&mdio { 66 status = "okay"; 67 #address-cells = <1>; 68 #size-cells = <0>; 69 ethphy1: ethernet-phy@1 { 70 reg = <0>; 71 }; 72 73 ethphy2: ethernet-phy@2 { 74 reg = <0>; 75 }; 76 77 ethphy3: ethernet-phy@3 { 78 reg = <0>; 79 }; 80 81 ethphy4: ethernet-phy@4 { 82 reg = <0>; 83 }; 84}; 85 86 87&mac1 { 88 status = "okay"; 89 phy-mode = "rgmii"; 90 phy-handle = <ðphy2>; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mac2link_default &pinctrl_mdio2_default>; 93}; 94 95&mac2 { 96 status = "okay"; 97 phy-mode = "rgmii"; 98 phy-handle = <ðphy3>; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_rgmii3_default &pinctrl_mac3link_default &pinctrl_mdio3_default>; 101}; 102 103&mac3 { 104 status = "okay"; 105 phy-mode = "rgmii"; 106 phy-handle = <ðphy4>; 107 pinctrl-names = "default"; 108 pinctrl-0 = <&pinctrl_rgmii4_default &pinctrl_mac4link_default &pinctrl_mdio4_default>; 109}; 110 111&fmc { 112 status = "okay"; 113 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_fmcquad_default>; 116 117 flash@0 { 118 compatible = "spi-flash", "sst,w25q256"; 119 status = "okay"; 120 spi-max-frequency = <50000000>; 121 spi-tx-bus-width = <4>; 122 spi-rx-bus-width = <4>; 123 }; 124 125 flash@1 { 126 compatible = "spi-flash", "sst,w25q256"; 127 status = "okay"; 128 spi-max-frequency = <50000000>; 129 spi-tx-bus-width = <4>; 130 spi-rx-bus-width = <4>; 131 }; 132 133 flash@2 { 134 compatible = "spi-flash", "sst,w25q256"; 135 status = "disabled"; 136 spi-max-frequency = <50000000>; 137 spi-tx-bus-width = <4>; 138 spi-rx-bus-width = <4>; 139 }; 140}; 141 142&spi1 { 143 status = "okay"; 144 145 pinctrl-names = "default"; 146 pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default 147 &pinctrl_spi1cs1_default &pinctrl_spi1wp_default 148 &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; 149 150 flash@0 { 151 compatible = "spi-flash", "sst,w25q256"; 152 status = "okay"; 153 spi-max-frequency = <50000000>; 154 spi-tx-bus-width = <4>; 155 spi-rx-bus-width = <4>; 156 }; 157 158 flash@1 { 159 compatible = "spi-flash", "sst,w25q256"; 160 status = "disabled"; 161 spi-max-frequency = <50000000>; 162 spi-tx-bus-width = <4>; 163 spi-rx-bus-width = <4>; 164 }; 165}; 166 167&spi2 { 168 status = "okay"; 169 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default 172 &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; 173 174 flash@0 { 175 compatible = "spi-flash", "sst,w25q256"; 176 status = "okay"; 177 spi-max-frequency = <50000000>; 178 spi-tx-bus-width = <4>; 179 spi-rx-bus-width = <4>; 180 }; 181 182 flash@1 { 183 compatible = "spi-flash", "sst,w25q256"; 184 status = "disabled"; 185 spi-max-frequency = <50000000>; 186 spi-tx-bus-width = <4>; 187 spi-rx-bus-width = <4>; 188 }; 189 190 flash@2 { 191 compatible = "spi-flash", "sst,w25q256"; 192 status = "disabled"; 193 spi-max-frequency = <50000000>; 194 spi-tx-bus-width = <4>; 195 spi-rx-bus-width = <4>; 196 }; 197}; 198 199&emmc_slot0 { 200 status = "okay"; 201 202#if 1 203 bus-width = <4>; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_emmc_default>; 206#else 207 bus-width = <8>; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&pinctrl_emmcg8_default>; 210#endif 211}; 212 213&sdhci_slot0 { 214 status = "okay"; 215 bus-width = <4>; 216 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 217 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 218 pinctrl-names = "default"; 219 pinctrl-0 = <&pinctrl_sd1_default>; 220}; 221 222&sdhci_slot1 { 223 status = "okay"; 224 bus-width = <4>; 225 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 226 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 227 pinctrl-names = "default"; 228 pinctrl-0 = <&pinctrl_sd2_default>; 229}; 230 231&i2c4 { 232 status = "okay"; 233 234 pinctrl-names = "default"; 235 pinctrl-0 = <&pinctrl_i2c5_default>; 236}; 237 238&i2c5 { 239 status = "okay"; 240 241 pinctrl-names = "default"; 242 pinctrl-0 = <&pinctrl_i2c6_default>; 243}; 244 245&i2c6 { 246 status = "okay"; 247 248 pinctrl-names = "default"; 249 pinctrl-0 = <&pinctrl_i2c7_default>; 250}; 251 252&i2c7 { 253 status = "okay"; 254 255 pinctrl-names = "default"; 256 pinctrl-0 = <&pinctrl_i2c8_default>; 257}; 258 259&i2c8 { 260 status = "okay"; 261 262 pinctrl-names = "default"; 263 pinctrl-0 = <&pinctrl_i2c9_default>; 264}; 265 266 267#if 0 268&fsim0 { 269 status = "okay"; 270}; 271 272&fsim1 { 273 status = "okay"; 274}; 275#endif 276 277&ehci1 { 278 status = "okay"; 279}; 280