1/dts-v1/; 2 3#include "ast2600-u-boot.dtsi" 4 5/ { 6 memory { 7 device_type = "memory"; 8 reg = <0x80000000 0x40000000>; 9 }; 10 11 chosen { 12 stdout-path = &uart5; 13 }; 14 15 aliases { 16 mmc0 = &emmc_slot0; 17 mmc1 = &sdhci_slot0; 18 mmc2 = &sdhci_slot1; 19 spi0 = &fmc; 20 spi1 = &spi1; 21 spi2 = &spi2; 22 23 ethernet0 = &mac1; 24 ethernet1 = &mac2; 25 ethernet2 = &mac3; 26 }; 27 28 cpus { 29 cpu@0 { 30 clock-frequency = <800000000>; 31 }; 32 cpu@1 { 33 clock-frequency = <800000000>; 34 }; 35 }; 36}; 37 38&uart5 { 39 u-boot,dm-pre-reloc; 40 status = "okay"; 41}; 42 43&sdrammc { 44 clock-frequency = <400000000>; 45}; 46 47&wdt1 { 48 u-boot,dm-pre-reloc; 49 status = "okay"; 50}; 51 52&wdt2 { 53 u-boot,dm-pre-reloc; 54 status = "okay"; 55}; 56 57&wdt3 { 58 u-boot,dm-pre-reloc; 59 status = "okay"; 60}; 61 62&mdio { 63 status = "okay"; 64 #address-cells = <1>; 65 #size-cells = <0>; 66 ethphy1: ethernet-phy@1 { 67 reg = <0>; 68 }; 69 70 ethphy2: ethernet-phy@2 { 71 reg = <0>; 72 }; 73 74 ethphy3: ethernet-phy@3 { 75 reg = <0>; 76 }; 77 78 ethphy4: ethernet-phy@4 { 79 reg = <0>; 80 }; 81}; 82 83#if 0 84&mac0 { 85 status = "okay"; 86 phy-mode = "rgmii"; 87 phy-handle = <ðphy1>; 88 pinctrl-names = "default"; 89 pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mac1link_default &pinctrl_mdio1_default>; 90}; 91#endif 92 93&mac1 { 94 status = "okay"; 95 phy-mode = "rgmii"; 96 phy-handle = <ðphy2>; 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mac2link_default &pinctrl_mdio2_default>; 99}; 100 101&mac2 { 102 status = "okay"; 103 phy-mode = "rgmii"; 104 phy-handle = <ðphy3>; 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pinctrl_rgmii3_default &pinctrl_mac3link_default &pinctrl_mdio3_default>; 107}; 108 109&mac3 { 110 status = "okay"; 111 phy-mode = "rgmii"; 112 phy-handle = <ðphy4>; 113 pinctrl-names = "default"; 114 pinctrl-0 = <&pinctrl_rgmii4_default &pinctrl_mac4link_default &pinctrl_mdio4_default>; 115}; 116 117&fmc { 118 status = "okay"; 119 120 pinctrl-names = "default"; 121 pinctrl-0 = <&pinctrl_fmcquad_default>; 122 123 flash@0 { 124 compatible = "spi-flash", "sst,w25q256"; 125 status = "okay"; 126 spi-max-frequency = <50000000>; 127 spi-tx-bus-width = <4>; 128 spi-rx-bus-width = <4>; 129 }; 130 131 flash@1 { 132 compatible = "spi-flash", "sst,w25q256"; 133 status = "okay"; 134 spi-max-frequency = <50000000>; 135 spi-tx-bus-width = <4>; 136 spi-rx-bus-width = <4>; 137 }; 138 139 flash@2 { 140 compatible = "spi-flash", "sst,w25q256"; 141 status = "okay"; 142 spi-max-frequency = <50000000>; 143 spi-tx-bus-width = <4>; 144 spi-rx-bus-width = <4>; 145 }; 146}; 147 148&spi1 { 149 status = "okay"; 150 151 pinctrl-names = "default"; 152 pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default 153 &pinctrl_spi1cs1_default &pinctrl_spi1wp_default 154 &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; 155 156 flash@0 { 157 compatible = "spi-flash", "sst,w25q256"; 158 status = "okay"; 159 spi-max-frequency = <50000000>; 160 spi-tx-bus-width = <4>; 161 spi-rx-bus-width = <4>; 162 }; 163 164 flash@1 { 165 compatible = "spi-flash", "sst,w25q256"; 166 status = "okay"; 167 spi-max-frequency = <50000000>; 168 spi-tx-bus-width = <4>; 169 spi-rx-bus-width = <4>; 170 }; 171}; 172 173&spi2 { 174 status = "okay"; 175 176 pinctrl-names = "default"; 177 pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default 178 &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; 179 180 flash@0 { 181 compatible = "spi-flash", "sst,w25q256"; 182 status = "okay"; 183 spi-max-frequency = <50000000>; 184 spi-tx-bus-width = <4>; 185 spi-rx-bus-width = <4>; 186 }; 187 188 flash@1 { 189 compatible = "spi-flash", "sst,w25q256"; 190 status = "okay"; 191 spi-max-frequency = <50000000>; 192 spi-tx-bus-width = <4>; 193 spi-rx-bus-width = <4>; 194 }; 195 196 flash@2 { 197 compatible = "spi-flash", "sst,w25q256"; 198 status = "okay"; 199 spi-max-frequency = <50000000>; 200 spi-tx-bus-width = <4>; 201 spi-rx-bus-width = <4>; 202 }; 203}; 204 205&emmc_slot0 { 206 status = "okay"; 207 208#if 1 209 bus-width = <4>; 210 pinctrl-names = "default"; 211 pinctrl-0 = <&pinctrl_emmc_default>; 212#else 213 bus-width = <8>; 214 pinctrl-names = "default"; 215 pinctrl-0 = <&pinctrl_emmcg8_default>; 216#endif 217}; 218 219&sdhci_slot0 { 220 status = "okay"; 221 bus-width = <4>; 222 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 223 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 224 pinctrl-names = "default"; 225 pinctrl-0 = <&pinctrl_sd1_default>; 226}; 227 228&sdhci_slot1 { 229 status = "okay"; 230 bus-width = <4>; 231 pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 232 pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 233 pinctrl-names = "default"; 234 pinctrl-0 = <&pinctrl_sd2_default>; 235}; 236 237&i2c4 { 238 status = "okay"; 239 240 pinctrl-names = "default"; 241 pinctrl-0 = <&pinctrl_i2c5_default>; 242}; 243 244&i2c5 { 245 status = "okay"; 246 247 pinctrl-names = "default"; 248 pinctrl-0 = <&pinctrl_i2c6_default>; 249}; 250 251&i2c6 { 252 status = "okay"; 253 254 pinctrl-names = "default"; 255 pinctrl-0 = <&pinctrl_i2c7_default>; 256}; 257 258&i2c7 { 259 status = "okay"; 260 261 pinctrl-names = "default"; 262 pinctrl-0 = <&pinctrl_i2c8_default>; 263}; 264 265&i2c8 { 266 status = "okay"; 267 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_i2c9_default>; 270}; 271 272#if 0 273&pcie_bridge0 { 274 status = "okay"; 275}; 276#endif 277 278&pcie_bridge1 { 279 status = "okay"; 280}; 281 282&h2x { 283 status = "okay"; 284}; 285 286#if 0 287&fsim0 { 288 status = "okay"; 289}; 290 291&fsim1 { 292 status = "okay"; 293}; 294#endif 295 296&ehci1 { 297 status = "okay"; 298}; 299