157efeb04SChia-Wei, Wang/dts-v1/; 257efeb04SChia-Wei, Wang 357efeb04SChia-Wei, Wang#include "ast2600-u-boot.dtsi" 457efeb04SChia-Wei, Wang 557efeb04SChia-Wei, Wang/ { 657efeb04SChia-Wei, Wang memory { 757efeb04SChia-Wei, Wang device_type = "memory"; 857efeb04SChia-Wei, Wang reg = <0x80000000 0x40000000>; 957efeb04SChia-Wei, Wang }; 1057efeb04SChia-Wei, Wang 1157efeb04SChia-Wei, Wang chosen { 1257efeb04SChia-Wei, Wang stdout-path = &uart5; 1357efeb04SChia-Wei, Wang }; 1457efeb04SChia-Wei, Wang 1557efeb04SChia-Wei, Wang aliases { 1657efeb04SChia-Wei, Wang mmc0 = &emmc_slot0; 1757efeb04SChia-Wei, Wang mmc1 = &sdhci_slot0; 1857efeb04SChia-Wei, Wang mmc2 = &sdhci_slot1; 1957efeb04SChia-Wei, Wang spi0 = &fmc; 2057efeb04SChia-Wei, Wang spi1 = &spi1; 2157efeb04SChia-Wei, Wang spi2 = &spi2; 2293b7447cSChia-Wei, Wang ethernet0 = &mac0; 2393b7447cSChia-Wei, Wang ethernet1 = &mac1; 2493b7447cSChia-Wei, Wang ethernet2 = &mac2; 2593b7447cSChia-Wei, Wang ethernet3 = &mac3; 2657efeb04SChia-Wei, Wang }; 2757efeb04SChia-Wei, Wang 2857efeb04SChia-Wei, Wang cpus { 2957efeb04SChia-Wei, Wang cpu@0 { 3057efeb04SChia-Wei, Wang clock-frequency = <800000000>; 3157efeb04SChia-Wei, Wang }; 3257efeb04SChia-Wei, Wang cpu@1 { 3357efeb04SChia-Wei, Wang clock-frequency = <800000000>; 3457efeb04SChia-Wei, Wang }; 3557efeb04SChia-Wei, Wang }; 3657efeb04SChia-Wei, Wang}; 3757efeb04SChia-Wei, Wang 3857efeb04SChia-Wei, Wang&uart5 { 3957efeb04SChia-Wei, Wang u-boot,dm-pre-reloc; 4057efeb04SChia-Wei, Wang status = "okay"; 4157efeb04SChia-Wei, Wang}; 4257efeb04SChia-Wei, Wang 4357efeb04SChia-Wei, Wang&sdrammc { 4457efeb04SChia-Wei, Wang clock-frequency = <400000000>; 4557efeb04SChia-Wei, Wang}; 4657efeb04SChia-Wei, Wang 4757efeb04SChia-Wei, Wang&wdt1 { 4857efeb04SChia-Wei, Wang u-boot,dm-pre-reloc; 4957efeb04SChia-Wei, Wang status = "okay"; 5057efeb04SChia-Wei, Wang}; 5157efeb04SChia-Wei, Wang 5257efeb04SChia-Wei, Wang&wdt2 { 5357efeb04SChia-Wei, Wang u-boot,dm-pre-reloc; 5457efeb04SChia-Wei, Wang status = "okay"; 5557efeb04SChia-Wei, Wang}; 5657efeb04SChia-Wei, Wang 5757efeb04SChia-Wei, Wang&wdt3 { 5857efeb04SChia-Wei, Wang u-boot,dm-pre-reloc; 5957efeb04SChia-Wei, Wang status = "okay"; 6057efeb04SChia-Wei, Wang}; 6157efeb04SChia-Wei, Wang 6257efeb04SChia-Wei, Wang&mdio { 6357efeb04SChia-Wei, Wang status = "okay"; 64*c7c4c2d9SDylan Hung pinctrl-names = "default"; 65*c7c4c2d9SDylan Hung pinctrl-0 = < &pinctrl_mdio1_default &pinctrl_mdio2_default 66*c7c4c2d9SDylan Hung &pinctrl_mdio3_default &pinctrl_mdio4_default>; 6757efeb04SChia-Wei, Wang #address-cells = <1>; 6857efeb04SChia-Wei, Wang #size-cells = <0>; 6957efeb04SChia-Wei, Wang ethphy1: ethernet-phy@1 { 7057efeb04SChia-Wei, Wang reg = <0>; 7157efeb04SChia-Wei, Wang }; 7257efeb04SChia-Wei, Wang 7357efeb04SChia-Wei, Wang ethphy2: ethernet-phy@2 { 7457efeb04SChia-Wei, Wang reg = <0>; 7557efeb04SChia-Wei, Wang }; 7657efeb04SChia-Wei, Wang 7757efeb04SChia-Wei, Wang ethphy3: ethernet-phy@3 { 7857efeb04SChia-Wei, Wang reg = <0>; 7957efeb04SChia-Wei, Wang }; 8057efeb04SChia-Wei, Wang 8157efeb04SChia-Wei, Wang ethphy4: ethernet-phy@4 { 8257efeb04SChia-Wei, Wang reg = <0>; 8357efeb04SChia-Wei, Wang }; 8457efeb04SChia-Wei, Wang}; 8557efeb04SChia-Wei, Wang 8657efeb04SChia-Wei, Wang&mac0 { 8757efeb04SChia-Wei, Wang status = "okay"; 8857efeb04SChia-Wei, Wang phy-mode = "rgmii"; 8957efeb04SChia-Wei, Wang phy-handle = <ðphy1>; 9057efeb04SChia-Wei, Wang pinctrl-names = "default"; 91*c7c4c2d9SDylan Hung pinctrl-0 = <&pinctrl_rgmii1_default>; 9257efeb04SChia-Wei, Wang}; 9357efeb04SChia-Wei, Wang 9457efeb04SChia-Wei, Wang&mac1 { 9557efeb04SChia-Wei, Wang status = "okay"; 9657efeb04SChia-Wei, Wang phy-mode = "rgmii"; 9757efeb04SChia-Wei, Wang phy-handle = <ðphy2>; 9857efeb04SChia-Wei, Wang pinctrl-names = "default"; 99*c7c4c2d9SDylan Hung pinctrl-0 = <&pinctrl_rgmii2_default>; 10057efeb04SChia-Wei, Wang}; 10157efeb04SChia-Wei, Wang 10257efeb04SChia-Wei, Wang&mac2 { 10357efeb04SChia-Wei, Wang status = "okay"; 10457efeb04SChia-Wei, Wang phy-mode = "rgmii"; 10557efeb04SChia-Wei, Wang phy-handle = <ðphy3>; 10657efeb04SChia-Wei, Wang pinctrl-names = "default"; 107*c7c4c2d9SDylan Hung pinctrl-0 = <&pinctrl_rgmii3_default>; 10857efeb04SChia-Wei, Wang}; 10957efeb04SChia-Wei, Wang 11057efeb04SChia-Wei, Wang&mac3 { 11157efeb04SChia-Wei, Wang status = "okay"; 11257efeb04SChia-Wei, Wang phy-mode = "rgmii"; 11357efeb04SChia-Wei, Wang phy-handle = <ðphy4>; 11457efeb04SChia-Wei, Wang pinctrl-names = "default"; 115*c7c4c2d9SDylan Hung pinctrl-0 = <&pinctrl_rgmii4_default>; 11657efeb04SChia-Wei, Wang}; 11757efeb04SChia-Wei, Wang 11857efeb04SChia-Wei, Wang&fmc { 11957efeb04SChia-Wei, Wang status = "okay"; 12057efeb04SChia-Wei, Wang 12157efeb04SChia-Wei, Wang pinctrl-names = "default"; 12257efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_fmcquad_default>; 12357efeb04SChia-Wei, Wang 12457efeb04SChia-Wei, Wang flash@0 { 12557efeb04SChia-Wei, Wang status = "okay"; 12657efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 12757efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 12857efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 12957efeb04SChia-Wei, Wang }; 13057efeb04SChia-Wei, Wang 13157efeb04SChia-Wei, Wang flash@1 { 13257efeb04SChia-Wei, Wang status = "okay"; 13357efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 13457efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 13557efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 13657efeb04SChia-Wei, Wang }; 13757efeb04SChia-Wei, Wang 13857efeb04SChia-Wei, Wang flash@2 { 13957efeb04SChia-Wei, Wang status = "okay"; 14057efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 14157efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 14257efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 14357efeb04SChia-Wei, Wang }; 14457efeb04SChia-Wei, Wang}; 14557efeb04SChia-Wei, Wang 14657efeb04SChia-Wei, Wang&spi1 { 14757efeb04SChia-Wei, Wang status = "okay"; 14857efeb04SChia-Wei, Wang 14957efeb04SChia-Wei, Wang pinctrl-names = "default"; 15057efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default 15157efeb04SChia-Wei, Wang &pinctrl_spi1cs1_default &pinctrl_spi1wp_default 15257efeb04SChia-Wei, Wang &pinctrl_spi1wp_default &pinctrl_spi1quad_default>; 15357efeb04SChia-Wei, Wang 15457efeb04SChia-Wei, Wang flash@0 { 15557efeb04SChia-Wei, Wang status = "okay"; 15657efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 15757efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 15857efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 15957efeb04SChia-Wei, Wang }; 16057efeb04SChia-Wei, Wang 16157efeb04SChia-Wei, Wang flash@1 { 16257efeb04SChia-Wei, Wang status = "okay"; 16357efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 16457efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 16557efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 16657efeb04SChia-Wei, Wang }; 16757efeb04SChia-Wei, Wang}; 16857efeb04SChia-Wei, Wang 16957efeb04SChia-Wei, Wang&spi2 { 17057efeb04SChia-Wei, Wang status = "okay"; 17157efeb04SChia-Wei, Wang 17257efeb04SChia-Wei, Wang pinctrl-names = "default"; 17357efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default 17457efeb04SChia-Wei, Wang &pinctrl_spi2cs2_default &pinctrl_spi2quad_default>; 17557efeb04SChia-Wei, Wang 17657efeb04SChia-Wei, Wang flash@0 { 17757efeb04SChia-Wei, Wang status = "okay"; 17857efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 17957efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 18057efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 18157efeb04SChia-Wei, Wang }; 18257efeb04SChia-Wei, Wang 18357efeb04SChia-Wei, Wang flash@1 { 18457efeb04SChia-Wei, Wang status = "okay"; 18557efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 18657efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 18757efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 18857efeb04SChia-Wei, Wang }; 18957efeb04SChia-Wei, Wang 19057efeb04SChia-Wei, Wang flash@2 { 19157efeb04SChia-Wei, Wang status = "okay"; 19257efeb04SChia-Wei, Wang spi-max-frequency = <50000000>; 19357efeb04SChia-Wei, Wang spi-tx-bus-width = <4>; 19457efeb04SChia-Wei, Wang spi-rx-bus-width = <4>; 19557efeb04SChia-Wei, Wang }; 19657efeb04SChia-Wei, Wang}; 19757efeb04SChia-Wei, Wang 198ef01ed20SChin-Ting Kuo&emmc { 199ef01ed20SChin-Ting Kuo timing-phase = <0x700ff>; 200ef01ed20SChin-Ting Kuo}; 201ef01ed20SChin-Ting Kuo 20257efeb04SChia-Wei, Wang&emmc_slot0 { 20357efeb04SChia-Wei, Wang status = "okay"; 20457efeb04SChia-Wei, Wang bus-width = <4>; 20557efeb04SChia-Wei, Wang pinctrl-names = "default"; 20657efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_emmc_default>; 207ef01ed20SChin-Ting Kuo sdhci-drive-type = <1>; 208ef01ed20SChin-Ting Kuo}; 209ef01ed20SChin-Ting Kuo 210ef01ed20SChin-Ting Kuo&sdhci { 211ef01ed20SChin-Ting Kuo timing-phase = <0xc6ffff>; 21257efeb04SChia-Wei, Wang}; 21357efeb04SChia-Wei, Wang 21457efeb04SChia-Wei, Wang&sdhci_slot0 { 21557efeb04SChia-Wei, Wang status = "okay"; 21657efeb04SChia-Wei, Wang bus-width = <4>; 21757efeb04SChia-Wei, Wang pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>; 21857efeb04SChia-Wei, Wang pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>; 21957efeb04SChia-Wei, Wang pinctrl-names = "default"; 22057efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_sd1_default>; 221ef01ed20SChin-Ting Kuo sdhci-drive-type = <1>; 22257efeb04SChia-Wei, Wang}; 22357efeb04SChia-Wei, Wang 22457efeb04SChia-Wei, Wang&sdhci_slot1 { 22557efeb04SChia-Wei, Wang status = "okay"; 22657efeb04SChia-Wei, Wang bus-width = <4>; 22757efeb04SChia-Wei, Wang pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>; 22857efeb04SChia-Wei, Wang pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 22957efeb04SChia-Wei, Wang pinctrl-names = "default"; 23057efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_sd2_default>; 231ef01ed20SChin-Ting Kuo sdhci-drive-type = <1>; 23257efeb04SChia-Wei, Wang}; 23357efeb04SChia-Wei, Wang 23457efeb04SChia-Wei, Wang&i2c4 { 23557efeb04SChia-Wei, Wang status = "okay"; 23657efeb04SChia-Wei, Wang 23757efeb04SChia-Wei, Wang pinctrl-names = "default"; 23857efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_i2c5_default>; 23957efeb04SChia-Wei, Wang}; 24057efeb04SChia-Wei, Wang 24157efeb04SChia-Wei, Wang&i2c5 { 24257efeb04SChia-Wei, Wang status = "okay"; 24357efeb04SChia-Wei, Wang 24457efeb04SChia-Wei, Wang pinctrl-names = "default"; 24557efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_i2c6_default>; 24657efeb04SChia-Wei, Wang}; 24757efeb04SChia-Wei, Wang 24857efeb04SChia-Wei, Wang&i2c6 { 24957efeb04SChia-Wei, Wang status = "okay"; 25057efeb04SChia-Wei, Wang 25157efeb04SChia-Wei, Wang pinctrl-names = "default"; 25257efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_i2c7_default>; 25357efeb04SChia-Wei, Wang}; 25457efeb04SChia-Wei, Wang 25557efeb04SChia-Wei, Wang&i2c7 { 25657efeb04SChia-Wei, Wang status = "okay"; 25757efeb04SChia-Wei, Wang 25857efeb04SChia-Wei, Wang pinctrl-names = "default"; 25957efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_i2c8_default>; 26057efeb04SChia-Wei, Wang}; 26157efeb04SChia-Wei, Wang 26257efeb04SChia-Wei, Wang&i2c8 { 26357efeb04SChia-Wei, Wang status = "okay"; 26457efeb04SChia-Wei, Wang 26557efeb04SChia-Wei, Wang pinctrl-names = "default"; 26657efeb04SChia-Wei, Wang pinctrl-0 = <&pinctrl_i2c9_default>; 26757efeb04SChia-Wei, Wang}; 26857efeb04SChia-Wei, Wang 26957efeb04SChia-Wei, Wang 27057efeb04SChia-Wei, Wang#if 0 27157efeb04SChia-Wei, Wang&fsim0 { 27257efeb04SChia-Wei, Wang status = "okay"; 27357efeb04SChia-Wei, Wang}; 27457efeb04SChia-Wei, Wang 27557efeb04SChia-Wei, Wang&fsim1 { 27657efeb04SChia-Wei, Wang status = "okay"; 27757efeb04SChia-Wei, Wang}; 27857efeb04SChia-Wei, Wang#endif 27957efeb04SChia-Wei, Wang 28057efeb04SChia-Wei, Wang&ehci1 { 28157efeb04SChia-Wei, Wang status = "okay"; 28257efeb04SChia-Wei, Wang}; 283