xref: /openbmc/u-boot/arch/arm/dts/ast2600-ncsi.dts (revision 3ba98ed8) 
1/dts-v1/;
2
3#include "ast2600-u-boot.dtsi"
4
5/ {
6        model = "AST2600 EVB w/ NCSI";
7        compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
8
9	memory {
10		device_type = "memory";
11		reg = <0x80000000 0x40000000>;
12	};
13
14	chosen {
15		stdout-path = &uart5;
16	};
17
18	aliases {
19		mmc0 = &emmc_slot0;
20		mmc1 = &sdhci_slot0;
21		mmc2 = &sdhci_slot1;
22		spi0 = &fmc;
23		spi1 = &spi1;
24		spi2 = &spi2;
25		ethernet0 = &mac0;
26		ethernet1 = &mac1;
27		ethernet2 = &mac2;
28		ethernet3 = &mac3;
29	};
30
31	cpus {
32		cpu@0 {
33			clock-frequency = <800000000>;
34		};
35		cpu@1 {
36			clock-frequency = <800000000>;
37		};
38	};
39};
40
41&uart5 {
42	u-boot,dm-pre-reloc;
43	status = "okay";
44};
45
46&sdrammc {
47	clock-frequency = <400000000>;
48};
49
50&wdt1 {
51	status = "okay";
52};
53
54&wdt2 {
55	status = "okay";
56};
57
58&wdt3 {
59	status = "okay";
60};
61
62#if 0
63&mdio {
64	status = "okay";
65	pinctrl-names = "default";
66	pinctrl-0 = <	&pinctrl_mdio1_default &pinctrl_mdio2_default
67			&pinctrl_mdio3_default &pinctrl_mdio4_default>;
68	#address-cells = <1>;
69	#size-cells = <0>;
70	ethphy0: ethernet-phy@0 {
71		reg = <0>;
72	};
73
74	ethphy1: ethernet-phy@1 {
75		reg = <0>;
76	};
77
78	ethphy2: ethernet-phy@2 {
79		reg = <0>;
80	};
81
82	ethphy3: ethernet-phy@3 {
83		reg = <0>;
84	};
85};
86
87&mac0 {
88	status = "okay";
89	phy-mode = "rgmii-rxid";
90	phy-handle = <&ethphy0>;
91	pinctrl-names = "default";
92	pinctrl-0 = <&pinctrl_rgmii1_default>;
93};
94
95&mac1 {
96	status = "okay";
97	phy-mode = "rgmii-rxid";
98	phy-handle = <&ethphy1>;
99	pinctrl-names = "default";
100	pinctrl-0 = <&pinctrl_rgmii2_default>;
101};
102#endif
103
104&mac2 {
105	status = "okay";
106	phy-mode = "NC-SI";
107	use-ncsi;
108	pinctrl-names = "default";
109	pinctrl-0 = <&pinctrl_rmii3_default>;
110};
111
112&mac3 {
113	status = "okay";
114	phy-mode = "NC-SI";
115	use-ncsi;
116	pinctrl-names = "default";
117	pinctrl-0 = <&pinctrl_rmii4_default>;
118};
119
120&fmc {
121	status = "okay";
122
123	pinctrl-names = "default";
124	pinctrl-0 = <&pinctrl_fmcquad_default>;
125
126	flash@0 {
127		status = "okay";
128		spi-max-frequency = <50000000>;
129		spi-tx-bus-width = <4>;
130		spi-rx-bus-width = <4>;
131	};
132
133	flash@1 {
134		status = "okay";
135		spi-max-frequency = <50000000>;
136		spi-tx-bus-width = <4>;
137		spi-rx-bus-width = <4>;
138	};
139
140	flash@2 {
141		status = "disabled";
142		spi-max-frequency = <50000000>;
143		spi-tx-bus-width = <4>;
144		spi-rx-bus-width = <4>;
145	};
146};
147
148&spi1 {
149	status = "okay";
150
151	pinctrl-names = "default";
152	pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
153			&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
154			&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
155
156	flash@0 {
157		status = "okay";
158		spi-max-frequency = <50000000>;
159		spi-tx-bus-width = <4>;
160		spi-rx-bus-width = <4>;
161	};
162
163	flash@1 {
164		status = "disabled";
165		spi-max-frequency = <50000000>;
166		spi-tx-bus-width = <4>;
167		spi-rx-bus-width = <4>;
168	};
169};
170
171&spi2 {
172	status = "okay";
173
174	pinctrl-names = "default";
175	pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
176			&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
177
178	flash@0 {
179		status = "okay";
180		spi-max-frequency = <50000000>;
181		spi-tx-bus-width = <4>;
182		spi-rx-bus-width = <4>;
183	};
184
185	flash@1 {
186		status = "disabled";
187		spi-max-frequency = <50000000>;
188		spi-tx-bus-width = <4>;
189		spi-rx-bus-width = <4>;
190	};
191
192	flash@2 {
193		status = "disabled";
194		spi-max-frequency = <50000000>;
195		spi-tx-bus-width = <4>;
196		spi-rx-bus-width = <4>;
197	};
198};
199
200&emmc {
201	u-boot,dm-pre-reloc;
202	timing-phase = <0x700ff>;
203};
204
205&emmc_slot0 {
206	u-boot,dm-pre-reloc;
207	status = "okay";
208	bus-width = <4>;
209	pinctrl-names = "default";
210	pinctrl-0 = <&pinctrl_emmc_default>;
211	sdhci-drive-type = <1>;
212};
213
214&sdhci {
215	timing-phase = <0xc6ffff>;
216};
217
218&sdhci_slot0 {
219	status = "okay";
220	bus-width = <4>;
221	pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
222	pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
223	pinctrl-names = "default";
224	pinctrl-0 = <&pinctrl_sd1_default>;
225	sdhci-drive-type = <1>;
226};
227
228&sdhci_slot1 {
229	status = "okay";
230	bus-width = <4>;
231	pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
232	pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
233	pinctrl-names = "default";
234	pinctrl-0 = <&pinctrl_sd2_default>;
235	sdhci-drive-type = <1>;
236};
237
238&i2c4 {
239	status = "okay";
240
241	pinctrl-names = "default";
242	pinctrl-0 = <&pinctrl_i2c5_default>;
243};
244
245&i2c5 {
246	status = "okay";
247
248	pinctrl-names = "default";
249	pinctrl-0 = <&pinctrl_i2c6_default>;
250};
251
252&i2c6 {
253	status = "okay";
254
255	pinctrl-names = "default";
256	pinctrl-0 = <&pinctrl_i2c7_default>;
257};
258
259&i2c7 {
260	status = "okay";
261
262	pinctrl-names = "default";
263	pinctrl-0 = <&pinctrl_i2c8_default>;
264};
265
266&i2c8 {
267	status = "okay";
268
269	pinctrl-names = "default";
270	pinctrl-0 = <&pinctrl_i2c9_default>;
271};
272
273#if 0
274&fsim0 {
275	status = "okay";
276};
277
278&fsim1 {
279	status = "okay";
280};
281#endif
282
283&ehci1 {
284	status = "okay";
285};
286
287&display_port {
288	status = "okay";
289};
290
291&scu {
292	mac0-clk-delay = <0x10 0x0a
293			  0x10 0x10
294			  0x10 0x10>;
295	mac1-clk-delay = <0x10 0x0a
296			  0x10 0x10
297			  0x10 0x10>;
298	mac2-clk-delay = <0x08 0x04
299			  0x08 0x04
300			  0x08 0x04>;
301	mac3-clk-delay = <0x08 0x04
302			  0x08 0x04
303			  0x08 0x04>;
304};
305
306&hace {
307	u-boot,dm-pre-reloc;
308	status = "okay";
309};
310
311&acry {
312	u-boot,dm-pre-reloc;
313	status = "okay";
314};
315