1/dts-v1/; 2 3#include "ast2600-u-boot.dtsi" 4 5/ { 6 memory { 7 device_type = "memory"; 8 reg = <0x80000000 0x20000000>; 9 }; 10 11 chosen { 12 stdout-path = &uart5; 13 }; 14 15 aliases { 16 spi0 = &fmc; 17 ethernet0 = &mac0; 18#ifndef CONFIG_FPGA_ASPEED 19 ethernet1 = &mac1; 20#endif 21 }; 22}; 23 24&uart5 { 25 u-boot,dm-pre-reloc; 26 status = "okay"; 27}; 28 29&sdrammc { 30 clock-frequency = <400000000>; 31}; 32 33&wdt1 { 34 u-boot,dm-pre-reloc; 35 status = "okay"; 36}; 37 38&wdt2 { 39 u-boot,dm-pre-reloc; 40 status = "okay"; 41}; 42 43&wdt3 { 44 u-boot,dm-pre-reloc; 45 status = "okay"; 46}; 47 48&mdio { 49 status = "okay"; 50}; 51 52&mac0 { 53 status = "okay"; 54 phy-mode = "rgmii"; 55 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_mac1link_default &pinctrl_mdio1_default>; 58}; 59 60#ifndef CONFIG_FPGA_ASPEED 61&mac1 { 62 status = "okay"; 63 phy-mode = "rgmii"; 64 pinctrl-names = "default"; 65 pinctrl-0 = <&pinctrl_mac2link_default &pinctrl_mdio2_default>; 66}; 67 68&mac2 { 69 status = "okay"; 70 phy-mode = "rgmii"; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&pinctrl_mac3link_default &pinctrl_mdio3_default>; 73}; 74 75&mac3 { 76 status = "okay"; 77 phy-mode = "rgmii"; 78 pinctrl-names = "default"; 79 pinctrl-0 = <&pinctrl_mac4link_default &pinctrl_mdio4_default>; 80}; 81#endif 82 83&fmc { 84 status = "okay"; 85 flash@0 { 86 compatible = "spi-flash", "sst,w25q256"; 87 status = "okay"; 88 spi-max-frequency = <50000000>; 89 spi-tx-bus-width = <2>; 90 spi-rx-bus-width = <2>; 91 }; 92 93 flash@1 { 94 compatible = "spi-flash", "sst,w25q256"; 95 status = "okay"; 96 spi-max-frequency = <50000000>; 97 spi-tx-bus-width = <2>; 98 spi-rx-bus-width = <2>; 99 }; 100}; 101 102&sdhci_slot0 { 103 status = "okay"; 104 pinctrl-names = "default"; 105 pinctrl-0 = <&pinctrl_sd1_default>; 106}; 107 108&sdhci_slot1 { 109 status = "okay"; 110 pinctrl-names = "default"; 111 pinctrl-0 = <&pinctrl_sd2_default>; 112}; 113 114&emmc_slot0 { 115 status = "okay"; 116 pinctrl-names = "default"; 117 pinctrl-0 = <&pinctrl_emmc_default>; 118}; 119 120&i2c0 { 121 status = "okay"; 122}; 123 124&i2c3 { 125 status = "okay"; 126 127}; 128 129&i2c7 { 130 status = "okay"; 131 132}; 133