xref: /openbmc/u-boot/arch/arm/dts/ast2600-evb.dts (revision 32b6b914) 
1/dts-v1/;
2
3#include "ast2600-u-boot.dtsi"
4
5/ {
6        model = "AST2600 EVB";
7        compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
8
9	memory {
10		device_type = "memory";
11		reg = <0x80000000 0x40000000>;
12	};
13
14	chosen {
15		stdout-path = &uart5;
16	};
17
18	aliases {
19		mmc0 = &emmc_slot0;
20		mmc1 = &sdhci_slot0;
21		mmc2 = &sdhci_slot1;
22		spi0 = &fmc;
23		spi1 = &spi1;
24		spi2 = &spi2;
25		ethernet0 = &mac0;
26		ethernet1 = &mac1;
27		ethernet2 = &mac2;
28		ethernet3 = &mac3;
29	};
30
31	cpus {
32		cpu@0 {
33			clock-frequency = <800000000>;
34		};
35		cpu@1 {
36			clock-frequency = <800000000>;
37		};
38	};
39};
40
41&uart5 {
42	u-boot,dm-pre-reloc;
43	status = "okay";
44};
45
46&sdrammc {
47	clock-frequency = <400000000>;
48};
49
50&wdt1 {
51	status = "okay";
52};
53
54&wdt2 {
55	status = "okay";
56};
57
58&wdt3 {
59	status = "okay";
60};
61
62&mdio {
63	status = "okay";
64	pinctrl-names = "default";
65	pinctrl-0 = <	&pinctrl_mdio1_default &pinctrl_mdio2_default
66			&pinctrl_mdio3_default &pinctrl_mdio4_default>;
67	#address-cells = <1>;
68	#size-cells = <0>;
69	ethphy0: ethernet-phy@0 {
70		reg = <0>;
71	};
72
73	ethphy1: ethernet-phy@1 {
74		reg = <0>;
75	};
76
77	ethphy2: ethernet-phy@2 {
78		reg = <0>;
79	};
80
81	ethphy3: ethernet-phy@3 {
82		reg = <0>;
83	};
84};
85
86&mac0 {
87	status = "okay";
88	phy-mode = "rgmii-rxid";
89	phy-handle = <&ethphy0>;
90	pinctrl-names = "default";
91	pinctrl-0 = <&pinctrl_rgmii1_default>;
92};
93
94&mac1 {
95	status = "okay";
96	phy-mode = "rgmii-rxid";
97	phy-handle = <&ethphy1>;
98	pinctrl-names = "default";
99	pinctrl-0 = <&pinctrl_rgmii2_default>;
100};
101
102&mac2 {
103	status = "okay";
104	phy-mode = "rgmii";
105	phy-handle = <&ethphy2>;
106	pinctrl-names = "default";
107	pinctrl-0 = <&pinctrl_rgmii3_default>;
108};
109
110&mac3 {
111	status = "okay";
112	phy-mode = "rgmii";
113	phy-handle = <&ethphy3>;
114	pinctrl-names = "default";
115	pinctrl-0 = <&pinctrl_rgmii4_default>;
116};
117
118&fmc {
119	status = "okay";
120
121	pinctrl-names = "default";
122	pinctrl-0 = <&pinctrl_fmcquad_default>;
123
124	flash@0 {
125		status = "okay";
126		spi-max-frequency = <50000000>;
127		spi-tx-bus-width = <4>;
128		spi-rx-bus-width = <4>;
129	};
130
131	flash@1 {
132		status = "okay";
133		spi-max-frequency = <50000000>;
134		spi-tx-bus-width = <4>;
135		spi-rx-bus-width = <4>;
136	};
137
138	flash@2 {
139		status = "disabled";
140		spi-max-frequency = <50000000>;
141		spi-tx-bus-width = <4>;
142		spi-rx-bus-width = <4>;
143	};
144};
145
146&spi1 {
147	status = "okay";
148
149	pinctrl-names = "default";
150	pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
151			&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
152			&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
153
154	flash@0 {
155		status = "okay";
156		spi-max-frequency = <50000000>;
157		spi-tx-bus-width = <4>;
158		spi-rx-bus-width = <4>;
159	};
160
161	flash@1 {
162		status = "disabled";
163		spi-max-frequency = <50000000>;
164		spi-tx-bus-width = <4>;
165		spi-rx-bus-width = <4>;
166	};
167};
168
169&spi2 {
170	status = "okay";
171
172	pinctrl-names = "default";
173	pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
174			&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
175
176	flash@0 {
177		status = "okay";
178		spi-max-frequency = <50000000>;
179		spi-tx-bus-width = <4>;
180		spi-rx-bus-width = <4>;
181	};
182
183	flash@1 {
184		status = "disabled";
185		spi-max-frequency = <50000000>;
186		spi-tx-bus-width = <4>;
187		spi-rx-bus-width = <4>;
188	};
189
190	flash@2 {
191		status = "disabled";
192		spi-max-frequency = <50000000>;
193		spi-tx-bus-width = <4>;
194		spi-rx-bus-width = <4>;
195	};
196};
197
198&emmc {
199	u-boot,dm-pre-reloc;
200	timing-phase = <0x000f0097>;
201};
202
203&emmc_slot0 {
204	u-boot,dm-pre-reloc;
205	status = "okay";
206	bus-width = <4>;
207	pinctrl-names = "default";
208	pinctrl-0 = <&pinctrl_emmc_default>;
209	sdhci-drive-type = <1>;
210};
211
212&sdhci {
213	timing-phase = <0x00c6375f>;
214};
215
216&sdhci_slot0 {
217	status = "okay";
218	bus-width = <4>;
219	pwr-gpios = <&gpio0 ASPEED_GPIO(V, 0) GPIO_ACTIVE_HIGH>;
220	pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
221	pinctrl-names = "default";
222	pinctrl-0 = <&pinctrl_sd1_default>;
223	sdhci-drive-type = <1>;
224};
225
226&sdhci_slot1 {
227	status = "okay";
228	bus-width = <4>;
229	pwr-gpios = <&gpio0 ASPEED_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
230	pwr-sw-gpios = <&gpio0 ASPEED_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
231	pinctrl-names = "default";
232	pinctrl-0 = <&pinctrl_sd2_default>;
233	sdhci-drive-type = <1>;
234};
235
236&i2c4 {
237	status = "okay";
238
239	pinctrl-names = "default";
240	pinctrl-0 = <&pinctrl_i2c5_default>;
241};
242
243&i2c5 {
244	status = "okay";
245
246	pinctrl-names = "default";
247	pinctrl-0 = <&pinctrl_i2c6_default>;
248};
249
250&i2c6 {
251	status = "okay";
252
253	pinctrl-names = "default";
254	pinctrl-0 = <&pinctrl_i2c7_default>;
255};
256
257&i2c7 {
258	status = "okay";
259
260	pinctrl-names = "default";
261	pinctrl-0 = <&pinctrl_i2c8_default>;
262};
263
264&i2c8 {
265	status = "okay";
266
267	pinctrl-names = "default";
268	pinctrl-0 = <&pinctrl_i2c9_default>;
269};
270
271&pcie_phy1 {
272	status = "okay";
273};
274
275&pcie_bridge {
276	status = "okay";
277};
278
279#if 0
280&fsim0 {
281	status = "okay";
282};
283
284&fsim1 {
285	status = "okay";
286};
287#endif
288
289#if 0
290&vhub {
291	status = "okay";
292};
293#endif
294
295&ehci1 {
296	status = "okay";
297};
298
299&display_port {
300	status = "okay";
301};
302
303&scu {
304	mac0-clk-delay = <0x10 0x0a
305			  0x10 0x10
306			  0x10 0x10>;
307	mac1-clk-delay = <0x10 0x0a
308			  0x10 0x10
309			  0x10 0x10>;
310	mac2-clk-delay = <0x08 0x04
311			  0x08 0x04
312			  0x08 0x04>;
313	mac3-clk-delay = <0x08 0x04
314			  0x08 0x04
315			  0x08 0x04>;
316};
317
318&hace {
319	u-boot,dm-pre-reloc;
320	status = "okay";
321};
322
323&acry {
324	u-boot,dm-pre-reloc;
325	status = "okay";
326};
327