xref: /openbmc/u-boot/arch/arm/dts/ast2500.dtsi (revision cbd2fba1) 
1/*
2 * This device tree is copied from
3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
4 */
5#include "skeleton.dtsi"
6
7/ {
8	model = "Aspeed BMC";
9	compatible = "aspeed,ast2500";
10	#address-cells = <1>;
11	#size-cells = <1>;
12	interrupt-parent = <&vic>;
13
14	aliases {
15		i2c0 = &i2c0;
16		i2c1 = &i2c1;
17		i2c2 = &i2c2;
18		i2c3 = &i2c3;
19		i2c4 = &i2c4;
20		i2c5 = &i2c5;
21		i2c6 = &i2c6;
22		i2c7 = &i2c7;
23		i2c8 = &i2c8;
24		i2c9 = &i2c9;
25		i2c10 = &i2c10;
26		i2c11 = &i2c11;
27		i2c12 = &i2c12;
28		i2c13 = &i2c13;
29		serial0 = &uart1;
30		serial1 = &uart2;
31		serial2 = &uart3;
32		serial3 = &uart4;
33		serial4 = &uart5;
34		serial5 = &vuart;
35	};
36
37	cpus {
38		#address-cells = <1>;
39		#size-cells = <0>;
40
41		cpu@0 {
42			compatible = "arm,arm1176jzf-s";
43			device_type = "cpu";
44			reg = <0>;
45		};
46	};
47
48	memory@80000000 {
49		device_type = "memory";
50		reg = <0x80000000 0>;
51	};
52
53	ahb {
54		compatible = "simple-bus";
55		#address-cells = <1>;
56		#size-cells = <1>;
57		ranges;
58
59		fmc: flash-controller@1e620000 {
60			reg = < 0x1e620000 0xc4
61				0x20000000 0x10000000 >;
62			#address-cells = <1>;
63			#size-cells = <0>;
64			compatible = "aspeed,ast2500-fmc";
65			status = "disabled";
66			interrupts = <19>;
67			flash@0 {
68				reg = < 0 >;
69				compatible = "jedec,spi-nor";
70				status = "disabled";
71			};
72			flash@1 {
73				reg = < 1 >;
74				compatible = "jedec,spi-nor";
75				status = "disabled";
76			};
77			flash@2 {
78				reg = < 2 >;
79				compatible = "jedec,spi-nor";
80				status = "disabled";
81			};
82		};
83
84		spi1: flash-controller@1e630000 {
85			reg = < 0x1e630000 0xc4
86				0x30000000 0x08000000 >;
87			#address-cells = <1>;
88			#size-cells = <0>;
89			compatible = "aspeed,ast2500-spi";
90			status = "disabled";
91			flash@0 {
92				reg = < 0 >;
93				compatible = "jedec,spi-nor";
94				status = "disabled";
95			};
96			flash@1 {
97				reg = < 1 >;
98				compatible = "jedec,spi-nor";
99				status = "disabled";
100			};
101		};
102
103		spi2: flash-controller@1e631000 {
104			reg = < 0x1e631000 0xc4
105				0x38000000 0x08000000 >;
106			#address-cells = <1>;
107			#size-cells = <0>;
108			compatible = "aspeed,ast2500-spi";
109			status = "disabled";
110			flash@0 {
111				reg = < 0 >;
112				compatible = "jedec,spi-nor";
113				status = "disabled";
114			};
115			flash@1 {
116				reg = < 1 >;
117				compatible = "jedec,spi-nor";
118				status = "disabled";
119			};
120		};
121
122		vic: interrupt-controller@1e6c0080 {
123			compatible = "aspeed,ast2400-vic";
124			interrupt-controller;
125			#interrupt-cells = <1>;
126			valid-sources = <0xfefff7ff 0x0807ffff>;
127			reg = <0x1e6c0080 0x80>;
128		};
129
130		mac0: ethernet@1e660000 {
131			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
132			reg = <0x1e660000 0x180>;
133			interrupts = <2>;
134			status = "disabled";
135		};
136
137		mac1: ethernet@1e680000 {
138			compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
139			reg = <0x1e680000 0x180>;
140			interrupts = <3>;
141			status = "disabled";
142		};
143
144		ehci0: usb@1e6a1000 {
145			compatible = "aspeed,ast2500-ehci", "generic-ehci";
146			reg = <0x1e6a1000 0x100>;
147			interrupts = <5>;
148			status = "disabled";
149		};
150
151		ehci1: usb@1e6a3000 {
152			compatible = "aspeed,ast2500-ehci", "generic-ehci";
153			reg = <0x1e6a3000 0x100>;
154			interrupts = <13>;
155			status = "disabled";
156		};
157
158		uhci: usb@1e6b0000 {
159			compatible = "aspeed,ast2500-uhci", "generic-uhci";
160			reg = <0x1e6b0000 0x100>;
161			interrupts = <14>;
162			#ports = <2>;
163			status = "disabled";
164		};
165
166		apb {
167			compatible = "simple-bus";
168			#address-cells = <1>;
169			#size-cells = <1>;
170			ranges;
171
172			syscon: syscon@1e6e2000 {
173				compatible = "aspeed,g5-scu", "syscon", "simple-mfd";
174				reg = <0x1e6e2000 0x1a8>;
175				#clock-cells = <1>;
176				#reset-cells = <1>;
177
178				pinctrl: pinctrl {
179					compatible = "aspeed,g5-pinctrl";
180					aspeed,external-nodes = <&gfx &lhc>;
181
182				};
183			};
184
185			rng: hwrng@1e6e2078 {
186				compatible = "timeriomem_rng";
187				reg = <0x1e6e2078 0x4>;
188				period = <1>;
189				quality = <100>;
190			};
191
192			gfx: display@1e6e6000 {
193				compatible = "aspeed,ast2500-gfx", "syscon";
194				reg = <0x1e6e6000 0x1000>;
195				reg-io-width = <4>;
196			};
197
198			adc: adc@1e6e9000 {
199				compatible = "aspeed,ast2500-adc";
200				reg = <0x1e6e9000 0xb0>;
201				#io-channel-cells = <1>;
202				status = "disabled";
203			};
204
205			sram@1e720000 {
206				compatible = "mmio-sram";
207				reg = <0x1e720000 0x9000>;	// 36K
208			};
209
210			gpio: gpio@1e780000 {
211				#gpio-cells = <2>;
212				gpio-controller;
213				compatible = "aspeed,ast2500-gpio";
214				reg = <0x1e780000 0x1000>;
215				interrupts = <20>;
216				gpio-ranges = <&pinctrl 0 0 220>;
217				interrupt-controller;
218			};
219
220			timer: timer@1e782000 {
221				/* This timer is a Faraday FTTMR010 derivative */
222				compatible = "aspeed,ast2400-timer";
223				reg = <0x1e782000 0x90>;
224			};
225
226			uart1: serial@1e783000 {
227				compatible = "ns16550a";
228				reg = <0x1e783000 0x20>;
229				reg-shift = <2>;
230				interrupts = <9>;
231				no-loopback-test;
232				status = "disabled";
233			};
234
235			uart5: serial@1e784000 {
236				compatible = "ns16550a";
237				reg = <0x1e784000 0x20>;
238				reg-shift = <2>;
239				interrupts = <10>;
240				no-loopback-test;
241				status = "disabled";
242			};
243
244			wdt1: watchdog@1e785000 {
245				compatible = "aspeed,wdt";
246				reg = <0x1e785000 0x1c>;
247				interrupts = <27>;
248			};
249
250			wdt2: watchdog@1e785020 {
251				compatible = "aspeed,wdt";
252				reg = <0x1e785020 0x1c>;
253				interrupts = <27>;
254				status = "disabled";
255			};
256
257			wdt3: watchdog@1e785040 {
258				compatible = "aspeed,wdt";
259				reg = <0x1e785040 0x1c>;
260				status = "disabled";
261			};
262
263			pwm_tacho: pwm-tacho-controller@1e786000 {
264				compatible = "aspeed,ast2500-pwm-tacho";
265				#address-cells = <1>;
266				#size-cells = <0>;
267				reg = <0x1e786000 0x1000>;
268				status = "disabled";
269			};
270
271			vuart: serial@1e787000 {
272				compatible = "aspeed,ast2500-vuart";
273				reg = <0x1e787000 0x40>;
274				reg-shift = <2>;
275				interrupts = <8>;
276				no-loopback-test;
277				status = "disabled";
278			};
279
280			lpc: lpc@1e789000 {
281				compatible = "aspeed,ast2500-lpc", "simple-mfd";
282				reg = <0x1e789000 0x1000>;
283
284				#address-cells = <1>;
285				#size-cells = <1>;
286				ranges = <0x0 0x1e789000 0x1000>;
287
288				lpc_bmc: lpc-bmc@0 {
289					compatible = "aspeed,ast2500-lpc-bmc";
290					reg = <0x0 0x80>;
291				};
292
293				lpc_host: lpc-host@80 {
294					compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
295					reg = <0x80 0x1e0>;
296					reg-io-width = <4>;
297
298					#address-cells = <1>;
299					#size-cells = <1>;
300					ranges = <0x0 0x80 0x1e0>;
301
302					lpc_ctrl: lpc-ctrl@0 {
303						compatible = "aspeed,ast2500-lpc-ctrl";
304						reg = <0x0 0x80>;
305						status = "disabled";
306					};
307
308					lpc_snoop: lpc-snoop@0 {
309						compatible = "aspeed,ast2500-lpc-snoop";
310						reg = <0x0 0x80>;
311						interrupts = <8>;
312						status = "disabled";
313					};
314
315					lhc: lhc@20 {
316						compatible = "aspeed,ast2500-lhc";
317						reg = <0x20 0x24 0x48 0x8>;
318					};
319
320					lpc_reset: reset-controller@18 {
321						compatible = "aspeed,ast2500-lpc-reset";
322						reg = <0x18 0x4>;
323						#reset-cells = <1>;
324					};
325
326					ibt: ibt@c0 {
327						compatible = "aspeed,ast2500-ibt-bmc";
328						reg = <0xc0 0x18>;
329						interrupts = <8>;
330						status = "disabled";
331					};
332				};
333			};
334
335			uart2: serial@1e78d000 {
336				compatible = "ns16550a";
337				reg = <0x1e78d000 0x20>;
338				reg-shift = <2>;
339				interrupts = <32>;
340				no-loopback-test;
341				status = "disabled";
342			};
343
344			uart3: serial@1e78e000 {
345				compatible = "ns16550a";
346				reg = <0x1e78e000 0x20>;
347				reg-shift = <2>;
348				interrupts = <33>;
349				no-loopback-test;
350				status = "disabled";
351			};
352
353			uart4: serial@1e78f000 {
354				compatible = "ns16550a";
355				reg = <0x1e78f000 0x20>;
356				reg-shift = <2>;
357				interrupts = <34>;
358				no-loopback-test;
359				status = "disabled";
360			};
361
362			i2c: i2c@1e78a000 {
363				compatible = "simple-bus";
364				#address-cells = <1>;
365				#size-cells = <1>;
366				ranges = <0 0x1e78a000 0x1000>;
367			};
368		};
369	};
370};
371
372&i2c {
373	i2c_ic: interrupt-controller@0 {
374		#interrupt-cells = <1>;
375		compatible = "aspeed,ast2500-i2c-ic";
376		reg = <0x0 0x40>;
377		interrupts = <12>;
378		interrupt-controller;
379	};
380
381	i2c0: i2c-bus@40 {
382		#address-cells = <1>;
383		#size-cells = <0>;
384		#interrupt-cells = <1>;
385
386		reg = <0x40 0x40>;
387		compatible = "aspeed,ast2500-i2c-bus";
388		bus-frequency = <100000>;
389		interrupts = <0>;
390		interrupt-parent = <&i2c_ic>;
391		status = "disabled";
392		/* Does not need pinctrl properties */
393	};
394
395	i2c1: i2c-bus@80 {
396		#address-cells = <1>;
397		#size-cells = <0>;
398		#interrupt-cells = <1>;
399
400		reg = <0x80 0x40>;
401		compatible = "aspeed,ast2500-i2c-bus";
402		bus-frequency = <100000>;
403		interrupts = <1>;
404		interrupt-parent = <&i2c_ic>;
405		status = "disabled";
406		/* Does not need pinctrl properties */
407	};
408
409	i2c2: i2c-bus@c0 {
410		#address-cells = <1>;
411		#size-cells = <0>;
412		#interrupt-cells = <1>;
413
414		reg = <0xc0 0x40>;
415		compatible = "aspeed,ast2500-i2c-bus";
416		bus-frequency = <100000>;
417		interrupts = <2>;
418		interrupt-parent = <&i2c_ic>;
419		pinctrl-names = "default";
420		pinctrl-0 = <&pinctrl_i2c3_default>;
421		status = "disabled";
422	};
423
424	i2c3: i2c-bus@100 {
425		#address-cells = <1>;
426		#size-cells = <0>;
427		#interrupt-cells = <1>;
428
429		reg = <0x100 0x40>;
430		compatible = "aspeed,ast2500-i2c-bus";
431		bus-frequency = <100000>;
432		interrupts = <3>;
433		interrupt-parent = <&i2c_ic>;
434		pinctrl-names = "default";
435		pinctrl-0 = <&pinctrl_i2c4_default>;
436		status = "disabled";
437	};
438
439	i2c4: i2c-bus@140 {
440		#address-cells = <1>;
441		#size-cells = <0>;
442		#interrupt-cells = <1>;
443
444		reg = <0x140 0x40>;
445		compatible = "aspeed,ast2500-i2c-bus";
446		bus-frequency = <100000>;
447		interrupts = <4>;
448		interrupt-parent = <&i2c_ic>;
449		pinctrl-names = "default";
450		pinctrl-0 = <&pinctrl_i2c5_default>;
451		status = "disabled";
452	};
453
454	i2c5: i2c-bus@180 {
455		#address-cells = <1>;
456		#size-cells = <0>;
457		#interrupt-cells = <1>;
458
459		reg = <0x180 0x40>;
460		compatible = "aspeed,ast2500-i2c-bus";
461		bus-frequency = <100000>;
462		interrupts = <5>;
463		interrupt-parent = <&i2c_ic>;
464		pinctrl-names = "default";
465		pinctrl-0 = <&pinctrl_i2c6_default>;
466		status = "disabled";
467	};
468
469	i2c6: i2c-bus@1c0 {
470		#address-cells = <1>;
471		#size-cells = <0>;
472		#interrupt-cells = <1>;
473
474		reg = <0x1c0 0x40>;
475		compatible = "aspeed,ast2500-i2c-bus";
476		bus-frequency = <100000>;
477		interrupts = <6>;
478		interrupt-parent = <&i2c_ic>;
479		pinctrl-names = "default";
480		pinctrl-0 = <&pinctrl_i2c7_default>;
481		status = "disabled";
482	};
483
484	i2c7: i2c-bus@300 {
485		#address-cells = <1>;
486		#size-cells = <0>;
487		#interrupt-cells = <1>;
488
489		reg = <0x300 0x40>;
490		compatible = "aspeed,ast2500-i2c-bus";
491		bus-frequency = <100000>;
492		interrupts = <7>;
493		interrupt-parent = <&i2c_ic>;
494		pinctrl-names = "default";
495		pinctrl-0 = <&pinctrl_i2c8_default>;
496		status = "disabled";
497	};
498
499	i2c8: i2c-bus@340 {
500		#address-cells = <1>;
501		#size-cells = <0>;
502		#interrupt-cells = <1>;
503
504		reg = <0x340 0x40>;
505		compatible = "aspeed,ast2500-i2c-bus";
506		bus-frequency = <100000>;
507		interrupts = <8>;
508		interrupt-parent = <&i2c_ic>;
509		pinctrl-names = "default";
510		pinctrl-0 = <&pinctrl_i2c9_default>;
511		status = "disabled";
512	};
513
514	i2c9: i2c-bus@380 {
515		#address-cells = <1>;
516		#size-cells = <0>;
517		#interrupt-cells = <1>;
518
519		reg = <0x380 0x40>;
520		compatible = "aspeed,ast2500-i2c-bus";
521		bus-frequency = <100000>;
522		interrupts = <9>;
523		interrupt-parent = <&i2c_ic>;
524		pinctrl-names = "default";
525		pinctrl-0 = <&pinctrl_i2c10_default>;
526		status = "disabled";
527	};
528
529	i2c10: i2c-bus@3c0 {
530		#address-cells = <1>;
531		#size-cells = <0>;
532		#interrupt-cells = <1>;
533
534		reg = <0x3c0 0x40>;
535		compatible = "aspeed,ast2500-i2c-bus";
536		bus-frequency = <100000>;
537		interrupts = <10>;
538		interrupt-parent = <&i2c_ic>;
539		pinctrl-names = "default";
540		pinctrl-0 = <&pinctrl_i2c11_default>;
541		status = "disabled";
542	};
543
544	i2c11: i2c-bus@400 {
545		#address-cells = <1>;
546		#size-cells = <0>;
547		#interrupt-cells = <1>;
548
549		reg = <0x400 0x40>;
550		compatible = "aspeed,ast2500-i2c-bus";
551		bus-frequency = <100000>;
552		interrupts = <11>;
553		interrupt-parent = <&i2c_ic>;
554		pinctrl-names = "default";
555		pinctrl-0 = <&pinctrl_i2c12_default>;
556		status = "disabled";
557	};
558
559	i2c12: i2c-bus@440 {
560		#address-cells = <1>;
561		#size-cells = <0>;
562		#interrupt-cells = <1>;
563
564		reg = <0x440 0x40>;
565		compatible = "aspeed,ast2500-i2c-bus";
566		bus-frequency = <100000>;
567		interrupts = <12>;
568		interrupt-parent = <&i2c_ic>;
569		pinctrl-names = "default";
570		pinctrl-0 = <&pinctrl_i2c13_default>;
571		status = "disabled";
572	};
573
574	i2c13: i2c-bus@480 {
575		#address-cells = <1>;
576		#size-cells = <0>;
577		#interrupt-cells = <1>;
578
579		reg = <0x480 0x40>;
580		compatible = "aspeed,ast2500-i2c-bus";
581		bus-frequency = <100000>;
582		interrupts = <13>;
583		interrupt-parent = <&i2c_ic>;
584		pinctrl-names = "default";
585		pinctrl-0 = <&pinctrl_i2c14_default>;
586		status = "disabled";
587	};
588};
589
590&pinctrl {
591	pinctrl_acpi_default: acpi_default {
592		function = "ACPI";
593		groups = "ACPI";
594	};
595
596	pinctrl_adc0_default: adc0_default {
597		function = "ADC0";
598		groups = "ADC0";
599	};
600
601	pinctrl_adc1_default: adc1_default {
602		function = "ADC1";
603		groups = "ADC1";
604	};
605
606	pinctrl_adc10_default: adc10_default {
607		function = "ADC10";
608		groups = "ADC10";
609	};
610
611	pinctrl_adc11_default: adc11_default {
612		function = "ADC11";
613		groups = "ADC11";
614	};
615
616	pinctrl_adc12_default: adc12_default {
617		function = "ADC12";
618		groups = "ADC12";
619	};
620
621	pinctrl_adc13_default: adc13_default {
622		function = "ADC13";
623		groups = "ADC13";
624	};
625
626	pinctrl_adc14_default: adc14_default {
627		function = "ADC14";
628		groups = "ADC14";
629	};
630
631	pinctrl_adc15_default: adc15_default {
632		function = "ADC15";
633		groups = "ADC15";
634	};
635
636	pinctrl_adc2_default: adc2_default {
637		function = "ADC2";
638		groups = "ADC2";
639	};
640
641	pinctrl_adc3_default: adc3_default {
642		function = "ADC3";
643		groups = "ADC3";
644	};
645
646	pinctrl_adc4_default: adc4_default {
647		function = "ADC4";
648		groups = "ADC4";
649	};
650
651	pinctrl_adc5_default: adc5_default {
652		function = "ADC5";
653		groups = "ADC5";
654	};
655
656	pinctrl_adc6_default: adc6_default {
657		function = "ADC6";
658		groups = "ADC6";
659	};
660
661	pinctrl_adc7_default: adc7_default {
662		function = "ADC7";
663		groups = "ADC7";
664	};
665
666	pinctrl_adc8_default: adc8_default {
667		function = "ADC8";
668		groups = "ADC8";
669	};
670
671	pinctrl_adc9_default: adc9_default {
672		function = "ADC9";
673		groups = "ADC9";
674	};
675
676	pinctrl_bmcint_default: bmcint_default {
677		function = "BMCINT";
678		groups = "BMCINT";
679	};
680
681	pinctrl_ddcclk_default: ddcclk_default {
682		function = "DDCCLK";
683		groups = "DDCCLK";
684	};
685
686	pinctrl_ddcdat_default: ddcdat_default {
687		function = "DDCDAT";
688		groups = "DDCDAT";
689	};
690
691	pinctrl_espi_default: espi_default {
692		function = "ESPI";
693		groups = "ESPI";
694	};
695
696	pinctrl_fwspics1_default: fwspics1_default {
697		function = "FWSPICS1";
698		groups = "FWSPICS1";
699	};
700
701	pinctrl_fwspics2_default: fwspics2_default {
702		function = "FWSPICS2";
703		groups = "FWSPICS2";
704	};
705
706	pinctrl_gpid0_default: gpid0_default {
707		function = "GPID0";
708		groups = "GPID0";
709	};
710
711	pinctrl_gpid2_default: gpid2_default {
712		function = "GPID2";
713		groups = "GPID2";
714	};
715
716	pinctrl_gpid4_default: gpid4_default {
717		function = "GPID4";
718		groups = "GPID4";
719	};
720
721	pinctrl_gpid6_default: gpid6_default {
722		function = "GPID6";
723		groups = "GPID6";
724	};
725
726	pinctrl_gpie0_default: gpie0_default {
727		function = "GPIE0";
728		groups = "GPIE0";
729	};
730
731	pinctrl_gpie2_default: gpie2_default {
732		function = "GPIE2";
733		groups = "GPIE2";
734	};
735
736	pinctrl_gpie4_default: gpie4_default {
737		function = "GPIE4";
738		groups = "GPIE4";
739	};
740
741	pinctrl_gpie6_default: gpie6_default {
742		function = "GPIE6";
743		groups = "GPIE6";
744	};
745
746	pinctrl_i2c10_default: i2c10_default {
747		function = "I2C10";
748		groups = "I2C10";
749	};
750
751	pinctrl_i2c11_default: i2c11_default {
752		function = "I2C11";
753		groups = "I2C11";
754	};
755
756	pinctrl_i2c12_default: i2c12_default {
757		function = "I2C12";
758		groups = "I2C12";
759	};
760
761	pinctrl_i2c13_default: i2c13_default {
762		function = "I2C13";
763		groups = "I2C13";
764	};
765
766	pinctrl_i2c14_default: i2c14_default {
767		function = "I2C14";
768		groups = "I2C14";
769	};
770
771	pinctrl_i2c3_default: i2c3_default {
772		function = "I2C3";
773		groups = "I2C3";
774	};
775
776	pinctrl_i2c4_default: i2c4_default {
777		function = "I2C4";
778		groups = "I2C4";
779	};
780
781	pinctrl_i2c5_default: i2c5_default {
782		function = "I2C5";
783		groups = "I2C5";
784	};
785
786	pinctrl_i2c6_default: i2c6_default {
787		function = "I2C6";
788		groups = "I2C6";
789	};
790
791	pinctrl_i2c7_default: i2c7_default {
792		function = "I2C7";
793		groups = "I2C7";
794	};
795
796	pinctrl_i2c8_default: i2c8_default {
797		function = "I2C8";
798		groups = "I2C8";
799	};
800
801	pinctrl_i2c9_default: i2c9_default {
802		function = "I2C9";
803		groups = "I2C9";
804	};
805
806	pinctrl_lad0_default: lad0_default {
807		function = "LAD0";
808		groups = "LAD0";
809	};
810
811	pinctrl_lad1_default: lad1_default {
812		function = "LAD1";
813		groups = "LAD1";
814	};
815
816	pinctrl_lad2_default: lad2_default {
817		function = "LAD2";
818		groups = "LAD2";
819	};
820
821	pinctrl_lad3_default: lad3_default {
822		function = "LAD3";
823		groups = "LAD3";
824	};
825
826	pinctrl_lclk_default: lclk_default {
827		function = "LCLK";
828		groups = "LCLK";
829	};
830
831	pinctrl_lframe_default: lframe_default {
832		function = "LFRAME";
833		groups = "LFRAME";
834	};
835
836	pinctrl_lpchc_default: lpchc_default {
837		function = "LPCHC";
838		groups = "LPCHC";
839	};
840
841	pinctrl_lpcpd_default: lpcpd_default {
842		function = "LPCPD";
843		groups = "LPCPD";
844	};
845
846	pinctrl_lpcplus_default: lpcplus_default {
847		function = "LPCPLUS";
848		groups = "LPCPLUS";
849	};
850
851	pinctrl_lpcpme_default: lpcpme_default {
852		function = "LPCPME";
853		groups = "LPCPME";
854	};
855
856	pinctrl_lpcrst_default: lpcrst_default {
857		function = "LPCRST";
858		groups = "LPCRST";
859	};
860
861	pinctrl_lpcsmi_default: lpcsmi_default {
862		function = "LPCSMI";
863		groups = "LPCSMI";
864	};
865
866	pinctrl_lsirq_default: lsirq_default {
867		function = "LSIRQ";
868		groups = "LSIRQ";
869	};
870
871	pinctrl_mac1link_default: mac1link_default {
872		function = "MAC1LINK";
873		groups = "MAC1LINK";
874	};
875
876	pinctrl_mac2link_default: mac2link_default {
877		function = "MAC2LINK";
878		groups = "MAC2LINK";
879	};
880
881	pinctrl_mdio1_default: mdio1_default {
882		function = "MDIO1";
883		groups = "MDIO1";
884	};
885
886	pinctrl_mdio2_default: mdio2_default {
887		function = "MDIO2";
888		groups = "MDIO2";
889	};
890
891	pinctrl_ncts1_default: ncts1_default {
892		function = "NCTS1";
893		groups = "NCTS1";
894	};
895
896	pinctrl_ncts2_default: ncts2_default {
897		function = "NCTS2";
898		groups = "NCTS2";
899	};
900
901	pinctrl_ncts3_default: ncts3_default {
902		function = "NCTS3";
903		groups = "NCTS3";
904	};
905
906	pinctrl_ncts4_default: ncts4_default {
907		function = "NCTS4";
908		groups = "NCTS4";
909	};
910
911	pinctrl_ndcd1_default: ndcd1_default {
912		function = "NDCD1";
913		groups = "NDCD1";
914	};
915
916	pinctrl_ndcd2_default: ndcd2_default {
917		function = "NDCD2";
918		groups = "NDCD2";
919	};
920
921	pinctrl_ndcd3_default: ndcd3_default {
922		function = "NDCD3";
923		groups = "NDCD3";
924	};
925
926	pinctrl_ndcd4_default: ndcd4_default {
927		function = "NDCD4";
928		groups = "NDCD4";
929	};
930
931	pinctrl_ndsr1_default: ndsr1_default {
932		function = "NDSR1";
933		groups = "NDSR1";
934	};
935
936	pinctrl_ndsr2_default: ndsr2_default {
937		function = "NDSR2";
938		groups = "NDSR2";
939	};
940
941	pinctrl_ndsr3_default: ndsr3_default {
942		function = "NDSR3";
943		groups = "NDSR3";
944	};
945
946	pinctrl_ndsr4_default: ndsr4_default {
947		function = "NDSR4";
948		groups = "NDSR4";
949	};
950
951	pinctrl_ndtr1_default: ndtr1_default {
952		function = "NDTR1";
953		groups = "NDTR1";
954	};
955
956	pinctrl_ndtr2_default: ndtr2_default {
957		function = "NDTR2";
958		groups = "NDTR2";
959	};
960
961	pinctrl_ndtr3_default: ndtr3_default {
962		function = "NDTR3";
963		groups = "NDTR3";
964	};
965
966	pinctrl_ndtr4_default: ndtr4_default {
967		function = "NDTR4";
968		groups = "NDTR4";
969	};
970
971	pinctrl_nri1_default: nri1_default {
972		function = "NRI1";
973		groups = "NRI1";
974	};
975
976	pinctrl_nri2_default: nri2_default {
977		function = "NRI2";
978		groups = "NRI2";
979	};
980
981	pinctrl_nri3_default: nri3_default {
982		function = "NRI3";
983		groups = "NRI3";
984	};
985
986	pinctrl_nri4_default: nri4_default {
987		function = "NRI4";
988		groups = "NRI4";
989	};
990
991	pinctrl_nrts1_default: nrts1_default {
992		function = "NRTS1";
993		groups = "NRTS1";
994	};
995
996	pinctrl_nrts2_default: nrts2_default {
997		function = "NRTS2";
998		groups = "NRTS2";
999	};
1000
1001	pinctrl_nrts3_default: nrts3_default {
1002		function = "NRTS3";
1003		groups = "NRTS3";
1004	};
1005
1006	pinctrl_nrts4_default: nrts4_default {
1007		function = "NRTS4";
1008		groups = "NRTS4";
1009	};
1010
1011	pinctrl_oscclk_default: oscclk_default {
1012		function = "OSCCLK";
1013		groups = "OSCCLK";
1014	};
1015
1016	pinctrl_pewake_default: pewake_default {
1017		function = "PEWAKE";
1018		groups = "PEWAKE";
1019	};
1020
1021	pinctrl_pnor_default: pnor_default {
1022		function = "PNOR";
1023		groups = "PNOR";
1024	};
1025
1026	pinctrl_pwm0_default: pwm0_default {
1027		function = "PWM0";
1028		groups = "PWM0";
1029	};
1030
1031	pinctrl_pwm1_default: pwm1_default {
1032		function = "PWM1";
1033		groups = "PWM1";
1034	};
1035
1036	pinctrl_pwm2_default: pwm2_default {
1037		function = "PWM2";
1038		groups = "PWM2";
1039	};
1040
1041	pinctrl_pwm3_default: pwm3_default {
1042		function = "PWM3";
1043		groups = "PWM3";
1044	};
1045
1046	pinctrl_pwm4_default: pwm4_default {
1047		function = "PWM4";
1048		groups = "PWM4";
1049	};
1050
1051	pinctrl_pwm5_default: pwm5_default {
1052		function = "PWM5";
1053		groups = "PWM5";
1054	};
1055
1056	pinctrl_pwm6_default: pwm6_default {
1057		function = "PWM6";
1058		groups = "PWM6";
1059	};
1060
1061	pinctrl_pwm7_default: pwm7_default {
1062		function = "PWM7";
1063		groups = "PWM7";
1064	};
1065
1066	pinctrl_rgmii1_default: rgmii1_default {
1067		function = "RGMII1";
1068		groups = "RGMII1";
1069	};
1070
1071	pinctrl_rgmii2_default: rgmii2_default {
1072		function = "RGMII2";
1073		groups = "RGMII2";
1074	};
1075
1076	pinctrl_rmii1_default: rmii1_default {
1077		function = "RMII1";
1078		groups = "RMII1";
1079	};
1080
1081	pinctrl_rmii2_default: rmii2_default {
1082		function = "RMII2";
1083		groups = "RMII2";
1084	};
1085
1086	pinctrl_rxd1_default: rxd1_default {
1087		function = "RXD1";
1088		groups = "RXD1";
1089	};
1090
1091	pinctrl_rxd2_default: rxd2_default {
1092		function = "RXD2";
1093		groups = "RXD2";
1094	};
1095
1096	pinctrl_rxd3_default: rxd3_default {
1097		function = "RXD3";
1098		groups = "RXD3";
1099	};
1100
1101	pinctrl_rxd4_default: rxd4_default {
1102		function = "RXD4";
1103		groups = "RXD4";
1104	};
1105
1106	pinctrl_salt1_default: salt1_default {
1107		function = "SALT1";
1108		groups = "SALT1";
1109	};
1110
1111	pinctrl_salt10_default: salt10_default {
1112		function = "SALT10";
1113		groups = "SALT10";
1114	};
1115
1116	pinctrl_salt11_default: salt11_default {
1117		function = "SALT11";
1118		groups = "SALT11";
1119	};
1120
1121	pinctrl_salt12_default: salt12_default {
1122		function = "SALT12";
1123		groups = "SALT12";
1124	};
1125
1126	pinctrl_salt13_default: salt13_default {
1127		function = "SALT13";
1128		groups = "SALT13";
1129	};
1130
1131	pinctrl_salt14_default: salt14_default {
1132		function = "SALT14";
1133		groups = "SALT14";
1134	};
1135
1136	pinctrl_salt2_default: salt2_default {
1137		function = "SALT2";
1138		groups = "SALT2";
1139	};
1140
1141	pinctrl_salt3_default: salt3_default {
1142		function = "SALT3";
1143		groups = "SALT3";
1144	};
1145
1146	pinctrl_salt4_default: salt4_default {
1147		function = "SALT4";
1148		groups = "SALT4";
1149	};
1150
1151	pinctrl_salt5_default: salt5_default {
1152		function = "SALT5";
1153		groups = "SALT5";
1154	};
1155
1156	pinctrl_salt6_default: salt6_default {
1157		function = "SALT6";
1158		groups = "SALT6";
1159	};
1160
1161	pinctrl_salt7_default: salt7_default {
1162		function = "SALT7";
1163		groups = "SALT7";
1164	};
1165
1166	pinctrl_salt8_default: salt8_default {
1167		function = "SALT8";
1168		groups = "SALT8";
1169	};
1170
1171	pinctrl_salt9_default: salt9_default {
1172		function = "SALT9";
1173		groups = "SALT9";
1174	};
1175
1176	pinctrl_scl1_default: scl1_default {
1177		function = "SCL1";
1178		groups = "SCL1";
1179	};
1180
1181	pinctrl_scl2_default: scl2_default {
1182		function = "SCL2";
1183		groups = "SCL2";
1184	};
1185
1186	pinctrl_sd1_default: sd1_default {
1187		function = "SD1";
1188		groups = "SD1";
1189	};
1190
1191	pinctrl_sd2_default: sd2_default {
1192		function = "SD2";
1193		groups = "SD2";
1194	};
1195
1196	pinctrl_sda1_default: sda1_default {
1197		function = "SDA1";
1198		groups = "SDA1";
1199	};
1200
1201	pinctrl_sda2_default: sda2_default {
1202		function = "SDA2";
1203		groups = "SDA2";
1204	};
1205
1206	pinctrl_sgps1_default: sgps1_default {
1207		function = "SGPS1";
1208		groups = "SGPS1";
1209	};
1210
1211	pinctrl_sgps2_default: sgps2_default {
1212		function = "SGPS2";
1213		groups = "SGPS2";
1214	};
1215
1216	pinctrl_sioonctrl_default: sioonctrl_default {
1217		function = "SIOONCTRL";
1218		groups = "SIOONCTRL";
1219	};
1220
1221	pinctrl_siopbi_default: siopbi_default {
1222		function = "SIOPBI";
1223		groups = "SIOPBI";
1224	};
1225
1226	pinctrl_siopbo_default: siopbo_default {
1227		function = "SIOPBO";
1228		groups = "SIOPBO";
1229	};
1230
1231	pinctrl_siopwreq_default: siopwreq_default {
1232		function = "SIOPWREQ";
1233		groups = "SIOPWREQ";
1234	};
1235
1236	pinctrl_siopwrgd_default: siopwrgd_default {
1237		function = "SIOPWRGD";
1238		groups = "SIOPWRGD";
1239	};
1240
1241	pinctrl_sios3_default: sios3_default {
1242		function = "SIOS3";
1243		groups = "SIOS3";
1244	};
1245
1246	pinctrl_sios5_default: sios5_default {
1247		function = "SIOS5";
1248		groups = "SIOS5";
1249	};
1250
1251	pinctrl_siosci_default: siosci_default {
1252		function = "SIOSCI";
1253		groups = "SIOSCI";
1254	};
1255
1256	pinctrl_spi1_default: spi1_default {
1257		function = "SPI1";
1258		groups = "SPI1";
1259	};
1260
1261	pinctrl_spi1cs1_default: spi1cs1_default {
1262		function = "SPI1CS1";
1263		groups = "SPI1CS1";
1264	};
1265
1266	pinctrl_spi1debug_default: spi1debug_default {
1267		function = "SPI1DEBUG";
1268		groups = "SPI1DEBUG";
1269	};
1270
1271	pinctrl_spi1passthru_default: spi1passthru_default {
1272		function = "SPI1PASSTHRU";
1273		groups = "SPI1PASSTHRU";
1274	};
1275
1276	pinctrl_spi2ck_default: spi2ck_default {
1277		function = "SPI2CK";
1278		groups = "SPI2CK";
1279	};
1280
1281	pinctrl_spi2cs0_default: spi2cs0_default {
1282		function = "SPI2CS0";
1283		groups = "SPI2CS0";
1284	};
1285
1286	pinctrl_spi2cs1_default: spi2cs1_default {
1287		function = "SPI2CS1";
1288		groups = "SPI2CS1";
1289	};
1290
1291	pinctrl_spi2miso_default: spi2miso_default {
1292		function = "SPI2MISO";
1293		groups = "SPI2MISO";
1294	};
1295
1296	pinctrl_spi2mosi_default: spi2mosi_default {
1297		function = "SPI2MOSI";
1298		groups = "SPI2MOSI";
1299	};
1300
1301	pinctrl_timer3_default: timer3_default {
1302		function = "TIMER3";
1303		groups = "TIMER3";
1304	};
1305
1306	pinctrl_timer4_default: timer4_default {
1307		function = "TIMER4";
1308		groups = "TIMER4";
1309	};
1310
1311	pinctrl_timer5_default: timer5_default {
1312		function = "TIMER5";
1313		groups = "TIMER5";
1314	};
1315
1316	pinctrl_timer6_default: timer6_default {
1317		function = "TIMER6";
1318		groups = "TIMER6";
1319	};
1320
1321	pinctrl_timer7_default: timer7_default {
1322		function = "TIMER7";
1323		groups = "TIMER7";
1324	};
1325
1326	pinctrl_timer8_default: timer8_default {
1327		function = "TIMER8";
1328		groups = "TIMER8";
1329	};
1330
1331	pinctrl_txd1_default: txd1_default {
1332		function = "TXD1";
1333		groups = "TXD1";
1334	};
1335
1336	pinctrl_txd2_default: txd2_default {
1337		function = "TXD2";
1338		groups = "TXD2";
1339	};
1340
1341	pinctrl_txd3_default: txd3_default {
1342		function = "TXD3";
1343		groups = "TXD3";
1344	};
1345
1346	pinctrl_txd4_default: txd4_default {
1347		function = "TXD4";
1348		groups = "TXD4";
1349	};
1350
1351	pinctrl_uart6_default: uart6_default {
1352		function = "UART6";
1353		groups = "UART6";
1354	};
1355
1356	pinctrl_usbcki_default: usbcki_default {
1357		function = "USBCKI";
1358		groups = "USBCKI";
1359	};
1360
1361	pinctrl_usb2ah_default: usb2ah_default {
1362		function = "USB2AH";
1363		groups = "USB2AH";
1364	};
1365
1366	pinctrl_usb11bhid_default: usb11bhid_default {
1367		function = "USB11BHID";
1368		groups = "USB11BHID";
1369	};
1370
1371	pinctrl_usb2bh_default: usb2bh_default {
1372		function = "USB2BH";
1373		groups = "USB2BH";
1374	};
1375
1376	pinctrl_vgabiosrom_default: vgabiosrom_default {
1377		function = "VGABIOSROM";
1378		groups = "VGABIOSROM";
1379	};
1380
1381	pinctrl_vgahs_default: vgahs_default {
1382		function = "VGAHS";
1383		groups = "VGAHS";
1384	};
1385
1386	pinctrl_vgavs_default: vgavs_default {
1387		function = "VGAVS";
1388		groups = "VGAVS";
1389	};
1390
1391	pinctrl_vpi24_default: vpi24_default {
1392		function = "VPI24";
1393		groups = "VPI24";
1394	};
1395
1396	pinctrl_vpo_default: vpo_default {
1397		function = "VPO";
1398		groups = "VPO";
1399	};
1400
1401	pinctrl_wdtrst1_default: wdtrst1_default {
1402		function = "WDTRST1";
1403		groups = "WDTRST1";
1404	};
1405
1406	pinctrl_wdtrst2_default: wdtrst2_default {
1407		function = "WDTRST2";
1408		groups = "WDTRST2";
1409	};
1410};
1411