1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 *  a) This library is free software; you can redistribute it and/or
10 *     modify it under the terms of the GNU General Public License as
11 *     published by the Free Software Foundation; either version 2 of the
12 *     License, or (at your option) any later version.
13 *
14 *     This library is distributed in the hope that it will be useful,
15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 *     GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 *  b) Permission is hereby granted, free of charge, to any person
22 *     obtaining a copy of this software and associated documentation
23 *     files (the "Software"), to deal in the Software without
24 *     restriction, including without limitation the rights to use,
25 *     copy, modify, merge, publish, distribute, sublicense, and/or
26 *     sell copies of the Software, and to permit persons to whom the
27 *     Software is furnished to do so, subject to the following
28 *     conditions:
29 *
30 *     The above copyright notice and this permission notice shall be
31 *     included in all copies or substantial portions of the Software.
32 *
33 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 *     OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada CP110 Master.
45 */
46
47#include <dt-bindings/comphy/comphy_data.h>
48
49/ {
50	cp110-master {
51		#address-cells = <2>;
52		#size-cells = <2>;
53		compatible = "simple-bus";
54		interrupt-parent = <&gic>;
55		ranges;
56
57		config-space {
58			#address-cells = <1>;
59			#size-cells = <1>;
60			compatible = "simple-bus";
61			interrupt-parent = <&gic>;
62			ranges = <0x0 0x0 0xf2000000 0x2000000>;
63
64			cpm_syscon0: system-controller@440000 {
65				compatible = "marvell,cp110-system-controller0",
66					     "syscon";
67				reg = <0x440000 0x1000>;
68				#clock-cells = <2>;
69				core-clock-output-names =
70					"cpm-apll", "cpm-ppv2-core", "cpm-eip",
71					"cpm-core", "cpm-nand-core";
72				gate-clock-output-names =
73					"cpm-audio", "cpm-communit", "cpm-nand",
74					"cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
75					"cpm-mg-core", "cpm-xor1", "cpm-xor0",
76					"cpm-gop-dp", "none", "cpm-pcie_x10",
77					"cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
78					"cpm-sata", "cpm-sata-usb", "cpm-main",
79					"cpm-sd-mmc", "none", "none",
80					"cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
81					"cpm-usb3dev", "cpm-eip150", "cpm-eip197";
82			};
83
84			cpm_sata0: sata@540000 {
85				compatible = "marvell,armada-8k-ahci";
86				reg = <0x540000 0x30000>;
87				interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
88				clocks = <&cpm_syscon0 1 15>;
89				status = "disabled";
90			};
91
92			cpm_usb3_0: usb3@500000 {
93				compatible = "marvell,armada-8k-xhci",
94					     "generic-xhci";
95				reg = <0x500000 0x4000>;
96				dma-coherent;
97				interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
98				clocks = <&cpm_syscon0 1 22>;
99				status = "disabled";
100			};
101
102			cpm_usb3_1: usb3@510000 {
103				compatible = "marvell,armada-8k-xhci",
104					     "generic-xhci";
105				reg = <0x510000 0x4000>;
106				dma-coherent;
107				interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
108				clocks = <&cpm_syscon0 1 23>;
109				status = "disabled";
110			};
111
112			cpm_spi0: spi@700600 {
113				compatible = "marvell,armada-380-spi";
114				reg = <0x700600 0x50>;
115				#address-cells = <0x1>;
116				#size-cells = <0x0>;
117				cell-index = <1>;
118				clocks = <&cpm_syscon0 0 3>;
119				status = "disabled";
120			};
121
122			cpm_spi1: spi@700680 {
123				compatible = "marvell,armada-380-spi";
124				reg = <0x700680 0x50>;
125				#address-cells = <1>;
126				#size-cells = <0>;
127				cell-index = <2>;
128				clocks = <&cpm_syscon0 1 21>;
129				status = "disabled";
130			};
131
132			cpm_i2c0: i2c@701000 {
133				compatible = "marvell,mv78230-i2c";
134				reg = <0x701000 0x20>;
135				#address-cells = <1>;
136				#size-cells = <0>;
137				interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
138				clocks = <&cpm_syscon0 1 21>;
139				status = "disabled";
140			};
141
142			cpm_i2c1: i2c@701100 {
143				compatible = "marvell,mv78230-i2c";
144				reg = <0x701100 0x20>;
145				#address-cells = <1>;
146				#size-cells = <0>;
147				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
148				clocks = <&cpm_syscon0 1 21>;
149				status = "disabled";
150			};
151
152			comphy_cp110: comphy@441000 {
153				compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
154				reg = <0x441000 0x8>,
155				      <0x120000 0x8>;
156				mux-bitcount = <4>;
157				max-lanes = <6>;
158			};
159
160			utmi0: utmi@580000 {
161				compatible = "marvell,mvebu-utmi-2.6.0";
162				reg = <0x580000 0x1000>,	/* utmi-unit */
163				      <0x440420 0x4>,		/* usb-cfg */
164				      <0x440440 0x4>;		/* utmi-cfg */
165				utmi-port = <UTMI_PHY_TO_USB_HOST0>;
166				status = "disabled";
167			};
168
169			utmi1: utmi@581000 {
170				compatible = "marvell,mvebu-utmi-2.6.0";
171				reg = <0x581000 0x1000>,	/* utmi-unit */
172				      <0x440420 0x4>,		/* usb-cfg */
173				      <0x440444 0x4>;		/* utmi-cfg */
174				utmi-port = <UTMI_PHY_TO_USB_HOST1>;
175				status = "disabled";
176			};
177		};
178
179		cpm_pcie0: pcie@f2600000 {
180			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
181			reg = <0 0xf2600000 0 0x10000>,
182			      <0 0xf6f00000 0 0x80000>;
183			reg-names = "ctrl", "config";
184			#address-cells = <3>;
185			#size-cells = <2>;
186			#interrupt-cells = <1>;
187			device_type = "pci";
188			dma-coherent;
189
190			bus-range = <0 0xff>;
191			ranges =
192				/* downstream I/O */
193				<0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000
194				/* non-prefetchable memory */
195				0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
196			interrupt-map-mask = <0 0 0 0>;
197			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
198			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
199			num-lanes = <1>;
200			clocks = <&cpm_syscon0 1 13>;
201			status = "disabled";
202		};
203
204		cpm_pcie1: pcie@f2620000 {
205			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
206			reg = <0 0xf2620000 0 0x10000>,
207			      <0 0xf7f00000 0 0x80000>;
208			reg-names = "ctrl", "config";
209			#address-cells = <3>;
210			#size-cells = <2>;
211			#interrupt-cells = <1>;
212			device_type = "pci";
213			dma-coherent;
214
215			bus-range = <0 0xff>;
216			ranges =
217				/* downstream I/O */
218				<0x81000000 0 0xf9010000 0  0xf9010000 0 0x10000
219				/* non-prefetchable memory */
220				0x82000000 0 0xf7000000 0  0xf7000000 0 0xf00000>;
221			interrupt-map-mask = <0 0 0 0>;
222			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
223			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
224
225			num-lanes = <1>;
226			clocks = <&cpm_syscon0 1 11>;
227			status = "disabled";
228		};
229
230		cpm_pcie2: pcie@f2640000 {
231			compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
232			reg = <0 0xf2640000 0 0x10000>,
233			      <0 0xf8f00000 0 0x80000>;
234			reg-names = "ctrl", "config";
235			#address-cells = <3>;
236			#size-cells = <2>;
237			#interrupt-cells = <1>;
238			device_type = "pci";
239			dma-coherent;
240
241			bus-range = <0 0xff>;
242			ranges =
243				/* downstream I/O */
244				<0x81000000 0 0xf9020000 0  0xf9020000 0 0x10000
245				/* non-prefetchable memory */
246				0x82000000 0 0xf8000000 0  0xf8000000 0 0xf00000>;
247			interrupt-map-mask = <0 0 0 0>;
248			interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
249			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
250
251			num-lanes = <1>;
252			clocks = <&cpm_syscon0 1 12>;
253			status = "disabled";
254		};
255	};
256};
257