11335483aSStefan Roese/* 21335483aSStefan Roese * Copyright (C) 2016 Marvell Technology Group Ltd. 31335483aSStefan Roese * 41335483aSStefan Roese * This file is dual-licensed: you can use it either under the terms 51335483aSStefan Roese * of the GPLv2 or the X11 license, at your option. Note that this dual 61335483aSStefan Roese * licensing only applies to this file, and not this project as a 71335483aSStefan Roese * whole. 81335483aSStefan Roese * 91335483aSStefan Roese * a) This library is free software; you can redistribute it and/or 101335483aSStefan Roese * modify it under the terms of the GNU General Public License as 111335483aSStefan Roese * published by the Free Software Foundation; either version 2 of the 121335483aSStefan Roese * License, or (at your option) any later version. 131335483aSStefan Roese * 141335483aSStefan Roese * This library is distributed in the hope that it will be useful, 151335483aSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 161335483aSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 171335483aSStefan Roese * GNU General Public License for more details. 181335483aSStefan Roese * 191335483aSStefan Roese * Or, alternatively, 201335483aSStefan Roese * 211335483aSStefan Roese * b) Permission is hereby granted, free of charge, to any person 221335483aSStefan Roese * obtaining a copy of this software and associated documentation 231335483aSStefan Roese * files (the "Software"), to deal in the Software without 241335483aSStefan Roese * restriction, including without limitation the rights to use, 251335483aSStefan Roese * copy, modify, merge, publish, distribute, sublicense, and/or 261335483aSStefan Roese * sell copies of the Software, and to permit persons to whom the 271335483aSStefan Roese * Software is furnished to do so, subject to the following 281335483aSStefan Roese * conditions: 291335483aSStefan Roese * 301335483aSStefan Roese * The above copyright notice and this permission notice shall be 311335483aSStefan Roese * included in all copies or substantial portions of the Software. 321335483aSStefan Roese * 331335483aSStefan Roese * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 341335483aSStefan Roese * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 351335483aSStefan Roese * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 361335483aSStefan Roese * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 371335483aSStefan Roese * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 381335483aSStefan Roese * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 391335483aSStefan Roese * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 401335483aSStefan Roese * OTHER DEALINGS IN THE SOFTWARE. 411335483aSStefan Roese */ 421335483aSStefan Roese 431335483aSStefan Roese/* 441335483aSStefan Roese * Device Tree file for Marvell Armada 7040 Development board platform 4550eacd8eSKonstantin Porotchkin * Boot device: SPI NOR, 0x32 (SW3) 461335483aSStefan Roese */ 471335483aSStefan Roese 481335483aSStefan Roese#include "armada-7040.dtsi" 491335483aSStefan Roese 501335483aSStefan Roese/ { 511335483aSStefan Roese model = "Marvell Armada 7040 DB board"; 521335483aSStefan Roese compatible = "marvell,armada7040-db", "marvell,armada7040", 531335483aSStefan Roese "marvell,armada-ap806-quad", "marvell,armada-ap806"; 541335483aSStefan Roese 551335483aSStefan Roese chosen { 561335483aSStefan Roese stdout-path = "serial0:115200n8"; 571335483aSStefan Roese }; 581335483aSStefan Roese 59b28d29f7SStefan Roese aliases { 60b28d29f7SStefan Roese i2c0 = &cpm_i2c0; 61b28d29f7SStefan Roese spi0 = &cpm_spi1; 62b28d29f7SStefan Roese }; 63b28d29f7SStefan Roese 641335483aSStefan Roese memory@00000000 { 651335483aSStefan Roese device_type = "memory"; 661335483aSStefan Roese reg = <0x0 0x0 0x0 0x80000000>; 671335483aSStefan Roese }; 681335483aSStefan Roese}; 691335483aSStefan Roese 70f99386c5SKonstantin Porotchkin&ap_pinctl { 71f99386c5SKonstantin Porotchkin /* MPP Bus: 72f99386c5SKonstantin Porotchkin * SDIO [0-5] 73f99386c5SKonstantin Porotchkin * UART0 [11,19] 74f99386c5SKonstantin Porotchkin */ 75f99386c5SKonstantin Porotchkin /* 0 1 2 3 4 5 6 7 8 9 */ 76f99386c5SKonstantin Porotchkin pin-func = < 1 1 1 1 1 1 0 0 0 0 77f99386c5SKonstantin Porotchkin 0 3 0 0 0 0 0 0 0 3 >; 78f99386c5SKonstantin Porotchkin}; 79f99386c5SKonstantin Porotchkin 801335483aSStefan Roese&uart0 { 811335483aSStefan Roese status = "okay"; 821335483aSStefan Roese}; 831335483aSStefan Roese 841335483aSStefan Roese 851335483aSStefan Roese&cpm_pcie2 { 861335483aSStefan Roese status = "okay"; 871335483aSStefan Roese}; 881335483aSStefan Roese 891335483aSStefan Roese&cpm_i2c0 { 90f99386c5SKonstantin Porotchkin pinctrl-names = "default"; 91f99386c5SKonstantin Porotchkin pinctrl-0 = <&cpm_i2c0_pins>; 921335483aSStefan Roese status = "okay"; 931335483aSStefan Roese clock-frequency = <100000>; 941335483aSStefan Roese}; 951335483aSStefan Roese 96f99386c5SKonstantin Porotchkin&cpm_pinctl { 97f99386c5SKonstantin Porotchkin /* MPP Bus: 98f99386c5SKonstantin Porotchkin * TDM [0-11] 99f99386c5SKonstantin Porotchkin * SPI [13-16] 100f99386c5SKonstantin Porotchkin * SATA1 [28] 101f99386c5SKonstantin Porotchkin * UART0 [29-30] 102f99386c5SKonstantin Porotchkin * SMI [32,34] 103f99386c5SKonstantin Porotchkin * XSMI [35-36] 104f99386c5SKonstantin Porotchkin * I2C [37-38] 105f99386c5SKonstantin Porotchkin * RGMII1[44-55] 106f99386c5SKonstantin Porotchkin * SD [56-62] 107f99386c5SKonstantin Porotchkin */ 108f99386c5SKonstantin Porotchkin /* 0 1 2 3 4 5 6 7 8 9 */ 109f99386c5SKonstantin Porotchkin pin-func = < 4 4 4 4 4 4 4 4 4 4 110f99386c5SKonstantin Porotchkin 4 4 0 3 3 3 3 0 0 0 111f99386c5SKonstantin Porotchkin 0 0 0 0 0 0 0 0 9 0xA 112f99386c5SKonstantin Porotchkin 0xA 0 7 0 7 7 7 2 2 0 113f99386c5SKonstantin Porotchkin 0 0 0 0 1 1 1 1 1 1 114f99386c5SKonstantin Porotchkin 1 1 1 1 1 1 0xE 0xE 0xE 0xE 115f99386c5SKonstantin Porotchkin 0xE 0xE 0xE >; 116f99386c5SKonstantin Porotchkin}; 117f99386c5SKonstantin Porotchkin 1181335483aSStefan Roese&cpm_spi1 { 119f99386c5SKonstantin Porotchkin pinctrl-names = "default"; 120f99386c5SKonstantin Porotchkin pinctrl-0 = <&cpm_spi0_pins>; 1211335483aSStefan Roese status = "okay"; 1221335483aSStefan Roese 1231335483aSStefan Roese spi-flash@0 { 1241335483aSStefan Roese #address-cells = <0x1>; 1251335483aSStefan Roese #size-cells = <0x1>; 1261335483aSStefan Roese compatible = "jedec,spi-nor"; 1271335483aSStefan Roese reg = <0x0>; 1281335483aSStefan Roese spi-max-frequency = <20000000>; 1291335483aSStefan Roese 1301335483aSStefan Roese partitions { 1311335483aSStefan Roese compatible = "fixed-partitions"; 1321335483aSStefan Roese #address-cells = <1>; 1331335483aSStefan Roese #size-cells = <1>; 1341335483aSStefan Roese 1351335483aSStefan Roese partition@0 { 1361335483aSStefan Roese label = "U-Boot"; 1371335483aSStefan Roese reg = <0x0 0x200000>; 1381335483aSStefan Roese }; 1391335483aSStefan Roese 1401335483aSStefan Roese partition@400000 { 1411335483aSStefan Roese label = "Filesystem"; 1421335483aSStefan Roese reg = <0x200000 0xe00000>; 1431335483aSStefan Roese }; 1441335483aSStefan Roese }; 1451335483aSStefan Roese }; 1461335483aSStefan Roese}; 1471335483aSStefan Roese 1481335483aSStefan Roese&cpm_sata0 { 1491335483aSStefan Roese status = "okay"; 1501335483aSStefan Roese}; 1511335483aSStefan Roese 1521335483aSStefan Roese&cpm_usb3_0 { 1531335483aSStefan Roese status = "okay"; 1541335483aSStefan Roese}; 1551335483aSStefan Roese 1561335483aSStefan Roese&cpm_usb3_1 { 1571335483aSStefan Roese status = "okay"; 1581335483aSStefan Roese}; 15978806891SStefan Roese 160a12c92e3SStefan Roese&cpm_comphy { 16178806891SStefan Roese phy0 { 162*fdc9e880SStefan Roese phy-type = <PHY_TYPE_SGMII1>; 163d74238aeSStefan Roese phy-speed = <PHY_SPEED_1_25G>; 16478806891SStefan Roese }; 16578806891SStefan Roese 16678806891SStefan Roese phy1 { 16778806891SStefan Roese phy-type = <PHY_TYPE_USB3_HOST0>; 16878806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 16978806891SStefan Roese }; 17078806891SStefan Roese 17178806891SStefan Roese phy2 { 17278806891SStefan Roese phy-type = <PHY_TYPE_SGMII0>; 17378806891SStefan Roese phy-speed = <PHY_SPEED_1_25G>; 17478806891SStefan Roese }; 17578806891SStefan Roese 17678806891SStefan Roese phy3 { 17778806891SStefan Roese phy-type = <PHY_TYPE_SATA1>; 17878806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 17978806891SStefan Roese }; 18078806891SStefan Roese 18178806891SStefan Roese phy4 { 18278806891SStefan Roese phy-type = <PHY_TYPE_USB3_HOST1>; 18378806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 18478806891SStefan Roese }; 18578806891SStefan Roese 18678806891SStefan Roese phy5 { 18778806891SStefan Roese phy-type = <PHY_TYPE_PEX2>; 18878806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 18978806891SStefan Roese }; 19078806891SStefan Roese}; 19178806891SStefan Roese 192a12c92e3SStefan Roese&cpm_utmi0 { 19378806891SStefan Roese status = "okay"; 19478806891SStefan Roese}; 19578806891SStefan Roese 196a12c92e3SStefan Roese&cpm_utmi1 { 19778806891SStefan Roese status = "okay"; 19878806891SStefan Roese}; 19927090324SStefan Roese 20027090324SStefan Roese&ap_sdhci0 { 20127090324SStefan Roese status = "okay"; 20227090324SStefan Roese bus-width = <4>; 20327090324SStefan Roese no-1-8-v; 20427090324SStefan Roese non-removable; 20527090324SStefan Roese}; 20627090324SStefan Roese 20727090324SStefan Roese&cpm_sdhci0 { 20827090324SStefan Roese status = "okay"; 20927090324SStefan Roese bus-width = <4>; 21027090324SStefan Roese no-1-8-v; 21127090324SStefan Roese non-removable; 21227090324SStefan Roese}; 213a6555ebeSThomas Petazzoni 214a6555ebeSThomas Petazzoni&cpm_mdio { 215a6555ebeSThomas Petazzoni phy0: ethernet-phy@0 { 216a6555ebeSThomas Petazzoni reg = <0>; 217a6555ebeSThomas Petazzoni }; 218a6555ebeSThomas Petazzoni phy1: ethernet-phy@1 { 219a6555ebeSThomas Petazzoni reg = <1>; 220a6555ebeSThomas Petazzoni }; 221a6555ebeSThomas Petazzoni}; 222a6555ebeSThomas Petazzoni 223a6555ebeSThomas Petazzoni&cpm_ethernet { 224a6555ebeSThomas Petazzoni status = "okay"; 225a6555ebeSThomas Petazzoni}; 226a6555ebeSThomas Petazzoni 227a6555ebeSThomas Petazzoni&cpm_eth1 { 228a6555ebeSThomas Petazzoni status = "okay"; 229a6555ebeSThomas Petazzoni phy = <&phy0>; 230a6555ebeSThomas Petazzoni phy-mode = "sgmii"; 231a6555ebeSThomas Petazzoni}; 232a6555ebeSThomas Petazzoni 233a6555ebeSThomas Petazzoni&cpm_eth2 { 234a6555ebeSThomas Petazzoni status = "okay"; 235a6555ebeSThomas Petazzoni phy = <&phy1>; 236a6555ebeSThomas Petazzoni phy-mode = "rgmii-id"; 237a6555ebeSThomas Petazzoni}; 238