11335483aSStefan Roese/* 21335483aSStefan Roese * Copyright (C) 2016 Marvell Technology Group Ltd. 31335483aSStefan Roese * 41335483aSStefan Roese * This file is dual-licensed: you can use it either under the terms 51335483aSStefan Roese * of the GPLv2 or the X11 license, at your option. Note that this dual 61335483aSStefan Roese * licensing only applies to this file, and not this project as a 71335483aSStefan Roese * whole. 81335483aSStefan Roese * 91335483aSStefan Roese * a) This library is free software; you can redistribute it and/or 101335483aSStefan Roese * modify it under the terms of the GNU General Public License as 111335483aSStefan Roese * published by the Free Software Foundation; either version 2 of the 121335483aSStefan Roese * License, or (at your option) any later version. 131335483aSStefan Roese * 141335483aSStefan Roese * This library is distributed in the hope that it will be useful, 151335483aSStefan Roese * but WITHOUT ANY WARRANTY; without even the implied warranty of 161335483aSStefan Roese * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 171335483aSStefan Roese * GNU General Public License for more details. 181335483aSStefan Roese * 191335483aSStefan Roese * Or, alternatively, 201335483aSStefan Roese * 211335483aSStefan Roese * b) Permission is hereby granted, free of charge, to any person 221335483aSStefan Roese * obtaining a copy of this software and associated documentation 231335483aSStefan Roese * files (the "Software"), to deal in the Software without 241335483aSStefan Roese * restriction, including without limitation the rights to use, 251335483aSStefan Roese * copy, modify, merge, publish, distribute, sublicense, and/or 261335483aSStefan Roese * sell copies of the Software, and to permit persons to whom the 271335483aSStefan Roese * Software is furnished to do so, subject to the following 281335483aSStefan Roese * conditions: 291335483aSStefan Roese * 301335483aSStefan Roese * The above copyright notice and this permission notice shall be 311335483aSStefan Roese * included in all copies or substantial portions of the Software. 321335483aSStefan Roese * 331335483aSStefan Roese * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 341335483aSStefan Roese * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 351335483aSStefan Roese * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 361335483aSStefan Roese * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 371335483aSStefan Roese * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 381335483aSStefan Roese * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 391335483aSStefan Roese * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 401335483aSStefan Roese * OTHER DEALINGS IN THE SOFTWARE. 411335483aSStefan Roese */ 421335483aSStefan Roese 431335483aSStefan Roese/* 441335483aSStefan Roese * Device Tree file for Marvell Armada 7040 Development board platform 451335483aSStefan Roese */ 461335483aSStefan Roese 471335483aSStefan Roese#include "armada-7040.dtsi" 481335483aSStefan Roese 491335483aSStefan Roese/ { 501335483aSStefan Roese model = "Marvell Armada 7040 DB board"; 511335483aSStefan Roese compatible = "marvell,armada7040-db", "marvell,armada7040", 521335483aSStefan Roese "marvell,armada-ap806-quad", "marvell,armada-ap806"; 531335483aSStefan Roese 541335483aSStefan Roese chosen { 551335483aSStefan Roese stdout-path = "serial0:115200n8"; 561335483aSStefan Roese }; 571335483aSStefan Roese 58b28d29f7SStefan Roese aliases { 59b28d29f7SStefan Roese i2c0 = &cpm_i2c0; 60b28d29f7SStefan Roese spi0 = &cpm_spi1; 61b28d29f7SStefan Roese }; 62b28d29f7SStefan Roese 631335483aSStefan Roese memory@00000000 { 641335483aSStefan Roese device_type = "memory"; 651335483aSStefan Roese reg = <0x0 0x0 0x0 0x80000000>; 661335483aSStefan Roese }; 671335483aSStefan Roese}; 681335483aSStefan Roese 691335483aSStefan Roese&i2c0 { 701335483aSStefan Roese status = "okay"; 711335483aSStefan Roese clock-frequency = <100000>; 721335483aSStefan Roese}; 731335483aSStefan Roese 741335483aSStefan Roese&spi0 { 751335483aSStefan Roese status = "okay"; 761335483aSStefan Roese 771335483aSStefan Roese spi-flash@0 { 781335483aSStefan Roese #address-cells = <1>; 791335483aSStefan Roese #size-cells = <1>; 801335483aSStefan Roese compatible = "jedec,spi-nor"; 811335483aSStefan Roese reg = <0>; 821335483aSStefan Roese spi-max-frequency = <10000000>; 831335483aSStefan Roese 841335483aSStefan Roese partitions { 851335483aSStefan Roese compatible = "fixed-partitions"; 861335483aSStefan Roese #address-cells = <1>; 871335483aSStefan Roese #size-cells = <1>; 881335483aSStefan Roese 891335483aSStefan Roese partition@0 { 901335483aSStefan Roese label = "U-Boot"; 911335483aSStefan Roese reg = <0 0x200000>; 921335483aSStefan Roese }; 931335483aSStefan Roese partition@400000 { 941335483aSStefan Roese label = "Filesystem"; 951335483aSStefan Roese reg = <0x200000 0xce0000>; 961335483aSStefan Roese }; 971335483aSStefan Roese }; 981335483aSStefan Roese }; 991335483aSStefan Roese}; 1001335483aSStefan Roese 1011335483aSStefan Roese&uart0 { 1021335483aSStefan Roese status = "okay"; 1031335483aSStefan Roese}; 1041335483aSStefan Roese 1051335483aSStefan Roese 1061335483aSStefan Roese&cpm_pcie2 { 1071335483aSStefan Roese status = "okay"; 1081335483aSStefan Roese}; 1091335483aSStefan Roese 1101335483aSStefan Roese&cpm_i2c0 { 1111335483aSStefan Roese status = "okay"; 1121335483aSStefan Roese clock-frequency = <100000>; 1131335483aSStefan Roese}; 1141335483aSStefan Roese 1151335483aSStefan Roese&cpm_spi1 { 1161335483aSStefan Roese status = "okay"; 1171335483aSStefan Roese 1181335483aSStefan Roese spi-flash@0 { 1191335483aSStefan Roese #address-cells = <0x1>; 1201335483aSStefan Roese #size-cells = <0x1>; 1211335483aSStefan Roese compatible = "jedec,spi-nor"; 1221335483aSStefan Roese reg = <0x0>; 1231335483aSStefan Roese spi-max-frequency = <20000000>; 1241335483aSStefan Roese 1251335483aSStefan Roese partitions { 1261335483aSStefan Roese compatible = "fixed-partitions"; 1271335483aSStefan Roese #address-cells = <1>; 1281335483aSStefan Roese #size-cells = <1>; 1291335483aSStefan Roese 1301335483aSStefan Roese partition@0 { 1311335483aSStefan Roese label = "U-Boot"; 1321335483aSStefan Roese reg = <0x0 0x200000>; 1331335483aSStefan Roese }; 1341335483aSStefan Roese 1351335483aSStefan Roese partition@400000 { 1361335483aSStefan Roese label = "Filesystem"; 1371335483aSStefan Roese reg = <0x200000 0xe00000>; 1381335483aSStefan Roese }; 1391335483aSStefan Roese }; 1401335483aSStefan Roese }; 1411335483aSStefan Roese}; 1421335483aSStefan Roese 1431335483aSStefan Roese&cpm_sata0 { 1441335483aSStefan Roese status = "okay"; 1451335483aSStefan Roese}; 1461335483aSStefan Roese 1471335483aSStefan Roese&cpm_usb3_0 { 1481335483aSStefan Roese status = "okay"; 1491335483aSStefan Roese}; 1501335483aSStefan Roese 1511335483aSStefan Roese&cpm_usb3_1 { 1521335483aSStefan Roese status = "okay"; 1531335483aSStefan Roese}; 15478806891SStefan Roese 155*a12c92e3SStefan Roese&cpm_comphy { 15678806891SStefan Roese phy0 { 15778806891SStefan Roese phy-type = <PHY_TYPE_SGMII2>; 15878806891SStefan Roese phy-speed = <PHY_SPEED_3_125G>; 15978806891SStefan Roese }; 16078806891SStefan Roese 16178806891SStefan Roese phy1 { 16278806891SStefan Roese phy-type = <PHY_TYPE_USB3_HOST0>; 16378806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 16478806891SStefan Roese }; 16578806891SStefan Roese 16678806891SStefan Roese phy2 { 16778806891SStefan Roese phy-type = <PHY_TYPE_SGMII0>; 16878806891SStefan Roese phy-speed = <PHY_SPEED_1_25G>; 16978806891SStefan Roese }; 17078806891SStefan Roese 17178806891SStefan Roese phy3 { 17278806891SStefan Roese phy-type = <PHY_TYPE_SATA1>; 17378806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 17478806891SStefan Roese }; 17578806891SStefan Roese 17678806891SStefan Roese phy4 { 17778806891SStefan Roese phy-type = <PHY_TYPE_USB3_HOST1>; 17878806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 17978806891SStefan Roese }; 18078806891SStefan Roese 18178806891SStefan Roese phy5 { 18278806891SStefan Roese phy-type = <PHY_TYPE_PEX2>; 18378806891SStefan Roese phy-speed = <PHY_SPEED_5G>; 18478806891SStefan Roese }; 18578806891SStefan Roese}; 18678806891SStefan Roese 187*a12c92e3SStefan Roese&cpm_utmi0 { 18878806891SStefan Roese status = "okay"; 18978806891SStefan Roese}; 19078806891SStefan Roese 191*a12c92e3SStefan Roese&cpm_utmi1 { 19278806891SStefan Roese status = "okay"; 19378806891SStefan Roese}; 194