xref: /openbmc/u-boot/arch/arm/dts/armada-7040-db.dts (revision 78806891)
11335483aSStefan Roese/*
21335483aSStefan Roese * Copyright (C) 2016 Marvell Technology Group Ltd.
31335483aSStefan Roese *
41335483aSStefan Roese * This file is dual-licensed: you can use it either under the terms
51335483aSStefan Roese * of the GPLv2 or the X11 license, at your option. Note that this dual
61335483aSStefan Roese * licensing only applies to this file, and not this project as a
71335483aSStefan Roese * whole.
81335483aSStefan Roese *
91335483aSStefan Roese *  a) This library is free software; you can redistribute it and/or
101335483aSStefan Roese *     modify it under the terms of the GNU General Public License as
111335483aSStefan Roese *     published by the Free Software Foundation; either version 2 of the
121335483aSStefan Roese *     License, or (at your option) any later version.
131335483aSStefan Roese *
141335483aSStefan Roese *     This library is distributed in the hope that it will be useful,
151335483aSStefan Roese *     but WITHOUT ANY WARRANTY; without even the implied warranty of
161335483aSStefan Roese *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
171335483aSStefan Roese *     GNU General Public License for more details.
181335483aSStefan Roese *
191335483aSStefan Roese * Or, alternatively,
201335483aSStefan Roese *
211335483aSStefan Roese *  b) Permission is hereby granted, free of charge, to any person
221335483aSStefan Roese *     obtaining a copy of this software and associated documentation
231335483aSStefan Roese *     files (the "Software"), to deal in the Software without
241335483aSStefan Roese *     restriction, including without limitation the rights to use,
251335483aSStefan Roese *     copy, modify, merge, publish, distribute, sublicense, and/or
261335483aSStefan Roese *     sell copies of the Software, and to permit persons to whom the
271335483aSStefan Roese *     Software is furnished to do so, subject to the following
281335483aSStefan Roese *     conditions:
291335483aSStefan Roese *
301335483aSStefan Roese *     The above copyright notice and this permission notice shall be
311335483aSStefan Roese *     included in all copies or substantial portions of the Software.
321335483aSStefan Roese *
331335483aSStefan Roese *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
341335483aSStefan Roese *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
351335483aSStefan Roese *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
361335483aSStefan Roese *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
371335483aSStefan Roese *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
381335483aSStefan Roese *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
391335483aSStefan Roese *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
401335483aSStefan Roese *     OTHER DEALINGS IN THE SOFTWARE.
411335483aSStefan Roese */
421335483aSStefan Roese
431335483aSStefan Roese/*
441335483aSStefan Roese * Device Tree file for Marvell Armada 7040 Development board platform
451335483aSStefan Roese */
461335483aSStefan Roese
471335483aSStefan Roese#include "armada-7040.dtsi"
481335483aSStefan Roese
491335483aSStefan Roese/ {
501335483aSStefan Roese	model = "Marvell Armada 7040 DB board";
511335483aSStefan Roese	compatible = "marvell,armada7040-db", "marvell,armada7040",
521335483aSStefan Roese		     "marvell,armada-ap806-quad", "marvell,armada-ap806";
531335483aSStefan Roese
541335483aSStefan Roese	chosen {
551335483aSStefan Roese		stdout-path = "serial0:115200n8";
561335483aSStefan Roese	};
571335483aSStefan Roese
581335483aSStefan Roese	memory@00000000 {
591335483aSStefan Roese		device_type = "memory";
601335483aSStefan Roese		reg = <0x0 0x0 0x0 0x80000000>;
611335483aSStefan Roese	};
621335483aSStefan Roese};
631335483aSStefan Roese
641335483aSStefan Roese&i2c0 {
651335483aSStefan Roese	status = "okay";
661335483aSStefan Roese	clock-frequency = <100000>;
671335483aSStefan Roese};
681335483aSStefan Roese
691335483aSStefan Roese&spi0 {
701335483aSStefan Roese	status = "okay";
711335483aSStefan Roese
721335483aSStefan Roese	spi-flash@0 {
731335483aSStefan Roese		#address-cells = <1>;
741335483aSStefan Roese		#size-cells = <1>;
751335483aSStefan Roese		compatible = "jedec,spi-nor";
761335483aSStefan Roese		reg = <0>;
771335483aSStefan Roese		spi-max-frequency = <10000000>;
781335483aSStefan Roese
791335483aSStefan Roese		partitions {
801335483aSStefan Roese			compatible = "fixed-partitions";
811335483aSStefan Roese			#address-cells = <1>;
821335483aSStefan Roese			#size-cells = <1>;
831335483aSStefan Roese
841335483aSStefan Roese			partition@0 {
851335483aSStefan Roese				label = "U-Boot";
861335483aSStefan Roese				reg = <0 0x200000>;
871335483aSStefan Roese			};
881335483aSStefan Roese			partition@400000 {
891335483aSStefan Roese				label = "Filesystem";
901335483aSStefan Roese				reg = <0x200000 0xce0000>;
911335483aSStefan Roese			};
921335483aSStefan Roese		};
931335483aSStefan Roese	};
941335483aSStefan Roese};
951335483aSStefan Roese
961335483aSStefan Roese&uart0 {
971335483aSStefan Roese	status = "okay";
981335483aSStefan Roese};
991335483aSStefan Roese
1001335483aSStefan Roese
1011335483aSStefan Roese&cpm_pcie2 {
1021335483aSStefan Roese	status = "okay";
1031335483aSStefan Roese};
1041335483aSStefan Roese
1051335483aSStefan Roese&cpm_i2c0 {
1061335483aSStefan Roese	status = "okay";
1071335483aSStefan Roese	clock-frequency = <100000>;
1081335483aSStefan Roese};
1091335483aSStefan Roese
1101335483aSStefan Roese&cpm_spi1 {
1111335483aSStefan Roese	status = "okay";
1121335483aSStefan Roese
1131335483aSStefan Roese	spi-flash@0 {
1141335483aSStefan Roese		#address-cells = <0x1>;
1151335483aSStefan Roese		#size-cells = <0x1>;
1161335483aSStefan Roese		compatible = "jedec,spi-nor";
1171335483aSStefan Roese		reg = <0x0>;
1181335483aSStefan Roese		spi-max-frequency = <20000000>;
1191335483aSStefan Roese
1201335483aSStefan Roese		partitions {
1211335483aSStefan Roese			compatible = "fixed-partitions";
1221335483aSStefan Roese			#address-cells = <1>;
1231335483aSStefan Roese			#size-cells = <1>;
1241335483aSStefan Roese
1251335483aSStefan Roese			partition@0 {
1261335483aSStefan Roese				label = "U-Boot";
1271335483aSStefan Roese				reg = <0x0 0x200000>;
1281335483aSStefan Roese			};
1291335483aSStefan Roese
1301335483aSStefan Roese			partition@400000 {
1311335483aSStefan Roese				label = "Filesystem";
1321335483aSStefan Roese				reg = <0x200000 0xe00000>;
1331335483aSStefan Roese			};
1341335483aSStefan Roese		};
1351335483aSStefan Roese	};
1361335483aSStefan Roese};
1371335483aSStefan Roese
1381335483aSStefan Roese&cpm_sata0 {
1391335483aSStefan Roese	status = "okay";
1401335483aSStefan Roese};
1411335483aSStefan Roese
1421335483aSStefan Roese&cpm_usb3_0 {
1431335483aSStefan Roese	status = "okay";
1441335483aSStefan Roese};
1451335483aSStefan Roese
1461335483aSStefan Roese&cpm_usb3_1 {
1471335483aSStefan Roese	status = "okay";
1481335483aSStefan Roese};
149*78806891SStefan Roese
150*78806891SStefan Roese&comphy_cp110 {
151*78806891SStefan Roese	phy0 {
152*78806891SStefan Roese		phy-type = <PHY_TYPE_SGMII2>;
153*78806891SStefan Roese		phy-speed = <PHY_SPEED_3_125G>;
154*78806891SStefan Roese	};
155*78806891SStefan Roese
156*78806891SStefan Roese	phy1 {
157*78806891SStefan Roese		phy-type = <PHY_TYPE_USB3_HOST0>;
158*78806891SStefan Roese		phy-speed = <PHY_SPEED_5G>;
159*78806891SStefan Roese	};
160*78806891SStefan Roese
161*78806891SStefan Roese	phy2 {
162*78806891SStefan Roese		phy-type = <PHY_TYPE_SGMII0>;
163*78806891SStefan Roese		phy-speed = <PHY_SPEED_1_25G>;
164*78806891SStefan Roese	};
165*78806891SStefan Roese
166*78806891SStefan Roese	phy3 {
167*78806891SStefan Roese		phy-type = <PHY_TYPE_SATA1>;
168*78806891SStefan Roese		phy-speed = <PHY_SPEED_5G>;
169*78806891SStefan Roese	};
170*78806891SStefan Roese
171*78806891SStefan Roese	phy4 {
172*78806891SStefan Roese		phy-type = <PHY_TYPE_USB3_HOST1>;
173*78806891SStefan Roese		phy-speed = <PHY_SPEED_5G>;
174*78806891SStefan Roese	};
175*78806891SStefan Roese
176*78806891SStefan Roese	phy5 {
177*78806891SStefan Roese		phy-type = <PHY_TYPE_PEX2>;
178*78806891SStefan Roese		phy-speed = <PHY_SPEED_5G>;
179*78806891SStefan Roese	};
180*78806891SStefan Roese};
181*78806891SStefan Roese
182*78806891SStefan Roese&utmi0 {
183*78806891SStefan Roese	status = "okay";
184*78806891SStefan Roese};
185*78806891SStefan Roese
186*78806891SStefan Roese&utmi1 {
187*78806891SStefan Roese	status = "okay";
188*78806891SStefan Roese};
189