xref: /openbmc/u-boot/arch/arm/dts/armada-388-gp.dts (revision 09a54c00)
139a230aaSStefan Roese/*
239a230aaSStefan Roese * Device Tree file for Marvell Armada 385 development board
339a230aaSStefan Roese * (RD-88F6820-GP)
439a230aaSStefan Roese *
539a230aaSStefan Roese * Copyright (C) 2014 Marvell
639a230aaSStefan Roese *
739a230aaSStefan Roese * Gregory CLEMENT <gregory.clement@free-electrons.com>
839a230aaSStefan Roese *
939a230aaSStefan Roese * This file is dual-licensed: you can use it either under the terms
1039a230aaSStefan Roese * of the GPL or the X11 license, at your option. Note that this dual
1139a230aaSStefan Roese * licensing only applies to this file, and not this project as a
1239a230aaSStefan Roese * whole.
1339a230aaSStefan Roese *
1439a230aaSStefan Roese *  a) This file is licensed under the terms of the GNU General Public
1539a230aaSStefan Roese *     License version 2.  This program is licensed "as is" without
1639a230aaSStefan Roese *     any warranty of any kind, whether express or implied.
1739a230aaSStefan Roese *
1839a230aaSStefan Roese * Or, alternatively,
1939a230aaSStefan Roese *
2039a230aaSStefan Roese *  b) Permission is hereby granted, free of charge, to any person
2139a230aaSStefan Roese *     obtaining a copy of this software and associated documentation
2239a230aaSStefan Roese *     files (the "Software"), to deal in the Software without
2339a230aaSStefan Roese *     restriction, including without limitation the rights to use,
2439a230aaSStefan Roese *     copy, modify, merge, publish, distribute, sublicense, and/or
2539a230aaSStefan Roese *     sell copies of the Software, and to permit persons to whom the
2639a230aaSStefan Roese *     Software is furnished to do so, subject to the following
2739a230aaSStefan Roese *     conditions:
2839a230aaSStefan Roese *
2939a230aaSStefan Roese *     The above copyright notice and this permission notice shall be
3039a230aaSStefan Roese *     included in all copies or substantial portions of the Software.
3139a230aaSStefan Roese *
3239a230aaSStefan Roese *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
3339a230aaSStefan Roese *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
3439a230aaSStefan Roese *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
3539a230aaSStefan Roese *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
3639a230aaSStefan Roese *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
3739a230aaSStefan Roese *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
3839a230aaSStefan Roese *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
3939a230aaSStefan Roese *     OTHER DEALINGS IN THE SOFTWARE.
4039a230aaSStefan Roese */
4139a230aaSStefan Roese
4239a230aaSStefan Roese/dts-v1/;
4339a230aaSStefan Roese#include "armada-388.dtsi"
4439a230aaSStefan Roese#include <dt-bindings/gpio/gpio.h>
4539a230aaSStefan Roese
4639a230aaSStefan Roese/ {
4739a230aaSStefan Roese	model = "Marvell Armada 385 GP";
4839a230aaSStefan Roese	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
4939a230aaSStefan Roese
5039a230aaSStefan Roese	chosen {
5139a230aaSStefan Roese		stdout-path = "serial0:115200n8";
5239a230aaSStefan Roese	};
5339a230aaSStefan Roese
54*09a54c00SStefan Roese	aliases {
55*09a54c00SStefan Roese		spi0 = &spi0;
56*09a54c00SStefan Roese	};
57*09a54c00SStefan Roese
5839a230aaSStefan Roese	memory {
5939a230aaSStefan Roese		device_type = "memory";
6039a230aaSStefan Roese		reg = <0x00000000 0x80000000>; /* 2 GB */
6139a230aaSStefan Roese	};
6239a230aaSStefan Roese
6339a230aaSStefan Roese	soc {
6439a230aaSStefan Roese		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
6539a230aaSStefan Roese			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
6639a230aaSStefan Roese
6739a230aaSStefan Roese		internal-regs {
6839a230aaSStefan Roese			spi@10600 {
6939a230aaSStefan Roese				pinctrl-names = "default";
7039a230aaSStefan Roese				pinctrl-0 = <&spi0_pins>;
7139a230aaSStefan Roese				status = "okay";
72*09a54c00SStefan Roese				u-boot,dm-pre-reloc;
7339a230aaSStefan Roese
7439a230aaSStefan Roese				spi-flash@0 {
75*09a54c00SStefan Roese					u-boot,dm-pre-reloc;
7639a230aaSStefan Roese					#address-cells = <1>;
7739a230aaSStefan Roese					#size-cells = <1>;
7839a230aaSStefan Roese					compatible = "st,m25p128", "jedec,spi-nor";
7939a230aaSStefan Roese					reg = <0>; /* Chip select 0 */
8039a230aaSStefan Roese					spi-max-frequency = <50000000>;
8139a230aaSStefan Roese					m25p,fast-read;
8239a230aaSStefan Roese				};
8339a230aaSStefan Roese			};
8439a230aaSStefan Roese
8539a230aaSStefan Roese			i2c@11000 {
8639a230aaSStefan Roese				pinctrl-names = "default";
8739a230aaSStefan Roese				pinctrl-0 = <&i2c0_pins>;
8839a230aaSStefan Roese				status = "okay";
8939a230aaSStefan Roese				clock-frequency = <100000>;
9039a230aaSStefan Roese				/*
9139a230aaSStefan Roese				 * The EEPROM located at adresse 54 is needed
9239a230aaSStefan Roese				 * for the boot - DO NOT ERASE IT -
9339a230aaSStefan Roese				 */
9439a230aaSStefan Roese
9539a230aaSStefan Roese				expander0: pca9555@20 {
9639a230aaSStefan Roese					compatible = "nxp,pca9555";
9739a230aaSStefan Roese					pinctrl-names = "default";
9839a230aaSStefan Roese					pinctrl-0 = <&pca0_pins>;
9939a230aaSStefan Roese					interrupt-parent = <&gpio0>;
10039a230aaSStefan Roese					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
10139a230aaSStefan Roese					gpio-controller;
10239a230aaSStefan Roese					#gpio-cells = <2>;
10339a230aaSStefan Roese					interrupt-controller;
10439a230aaSStefan Roese					#interrupt-cells = <2>;
10539a230aaSStefan Roese					reg = <0x20>;
10639a230aaSStefan Roese				};
10739a230aaSStefan Roese
10839a230aaSStefan Roese				expander1: pca9555@21 {
10939a230aaSStefan Roese					compatible = "nxp,pca9555";
11039a230aaSStefan Roese					pinctrl-names = "default";
11139a230aaSStefan Roese					interrupt-parent = <&gpio0>;
11239a230aaSStefan Roese					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
11339a230aaSStefan Roese					gpio-controller;
11439a230aaSStefan Roese					#gpio-cells = <2>;
11539a230aaSStefan Roese					interrupt-controller;
11639a230aaSStefan Roese					#interrupt-cells = <2>;
11739a230aaSStefan Roese					reg = <0x21>;
11839a230aaSStefan Roese				};
11939a230aaSStefan Roese
12039a230aaSStefan Roese			};
12139a230aaSStefan Roese
12239a230aaSStefan Roese			serial@12000 {
12339a230aaSStefan Roese				/*
12439a230aaSStefan Roese				 * Exported on the micro USB connector CON16
12539a230aaSStefan Roese				 * through an FTDI
12639a230aaSStefan Roese				 */
12739a230aaSStefan Roese
12839a230aaSStefan Roese				pinctrl-names = "default";
12939a230aaSStefan Roese				pinctrl-0 = <&uart0_pins>;
13039a230aaSStefan Roese				status = "okay";
1316451223aSStefan Roese				u-boot,dm-pre-reloc;
13239a230aaSStefan Roese			};
13339a230aaSStefan Roese
13439a230aaSStefan Roese			/* GE1 CON15 */
13539a230aaSStefan Roese			ethernet@30000 {
13639a230aaSStefan Roese				pinctrl-names = "default";
13739a230aaSStefan Roese				pinctrl-0 = <&ge1_rgmii_pins>;
13839a230aaSStefan Roese				status = "okay";
13939a230aaSStefan Roese				phy = <&phy1>;
14039a230aaSStefan Roese				phy-mode = "rgmii-id";
14139a230aaSStefan Roese			};
14239a230aaSStefan Roese
14339a230aaSStefan Roese			/* CON4 */
14439a230aaSStefan Roese			usb@58000 {
14539a230aaSStefan Roese				vcc-supply = <&reg_usb2_0_vbus>;
14639a230aaSStefan Roese				status = "okay";
14739a230aaSStefan Roese			};
14839a230aaSStefan Roese
14939a230aaSStefan Roese			/* GE0 CON1 */
15039a230aaSStefan Roese			ethernet@70000 {
15139a230aaSStefan Roese				pinctrl-names = "default";
15239a230aaSStefan Roese				/*
15339a230aaSStefan Roese				 * The Reference Clock 0 is used to provide a
15439a230aaSStefan Roese				 * clock to the PHY
15539a230aaSStefan Roese				 */
15639a230aaSStefan Roese				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
15739a230aaSStefan Roese				status = "okay";
15839a230aaSStefan Roese				phy = <&phy0>;
15939a230aaSStefan Roese				phy-mode = "rgmii-id";
16039a230aaSStefan Roese			};
16139a230aaSStefan Roese
16239a230aaSStefan Roese
16339a230aaSStefan Roese			mdio@72004 {
16439a230aaSStefan Roese				pinctrl-names = "default";
16539a230aaSStefan Roese				pinctrl-0 = <&mdio_pins>;
16639a230aaSStefan Roese
16739a230aaSStefan Roese				phy0: ethernet-phy@1 {
16839a230aaSStefan Roese					reg = <1>;
16939a230aaSStefan Roese				};
17039a230aaSStefan Roese
17139a230aaSStefan Roese				phy1: ethernet-phy@0 {
17239a230aaSStefan Roese					reg = <0>;
17339a230aaSStefan Roese				};
17439a230aaSStefan Roese			};
17539a230aaSStefan Roese
17639a230aaSStefan Roese			sata@a8000 {
17739a230aaSStefan Roese				pinctrl-names = "default";
17839a230aaSStefan Roese				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
17939a230aaSStefan Roese				status = "okay";
18039a230aaSStefan Roese				#address-cells = <1>;
18139a230aaSStefan Roese				#size-cells = <0>;
18239a230aaSStefan Roese
18339a230aaSStefan Roese				sata0: sata-port@0 {
18439a230aaSStefan Roese					reg = <0>;
18539a230aaSStefan Roese					target-supply = <&reg_5v_sata0>;
18639a230aaSStefan Roese				};
18739a230aaSStefan Roese
18839a230aaSStefan Roese				sata1: sata-port@1 {
18939a230aaSStefan Roese					reg = <1>;
19039a230aaSStefan Roese					target-supply = <&reg_5v_sata1>;
19139a230aaSStefan Roese				};
19239a230aaSStefan Roese			};
19339a230aaSStefan Roese
19439a230aaSStefan Roese			sata@e0000 {
19539a230aaSStefan Roese				pinctrl-names = "default";
19639a230aaSStefan Roese				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
19739a230aaSStefan Roese				status = "okay";
19839a230aaSStefan Roese				#address-cells = <1>;
19939a230aaSStefan Roese				#size-cells = <0>;
20039a230aaSStefan Roese
20139a230aaSStefan Roese				sata2: sata-port@0 {
20239a230aaSStefan Roese					reg = <0>;
20339a230aaSStefan Roese					target-supply = <&reg_5v_sata2>;
20439a230aaSStefan Roese				};
20539a230aaSStefan Roese
20639a230aaSStefan Roese				sata3: sata-port@1 {
20739a230aaSStefan Roese					reg = <1>;
20839a230aaSStefan Roese					target-supply = <&reg_5v_sata3>;
20939a230aaSStefan Roese				};
21039a230aaSStefan Roese			};
21139a230aaSStefan Roese
21239a230aaSStefan Roese			sdhci@d8000 {
21339a230aaSStefan Roese				pinctrl-names = "default";
21439a230aaSStefan Roese				pinctrl-0 = <&sdhci_pins>;
21539a230aaSStefan Roese				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
21639a230aaSStefan Roese				no-1-8-v;
21739a230aaSStefan Roese				wp-inverted;
21839a230aaSStefan Roese				bus-width = <8>;
21939a230aaSStefan Roese				status = "okay";
22039a230aaSStefan Roese			};
22139a230aaSStefan Roese
22239a230aaSStefan Roese			/* CON5 */
22339a230aaSStefan Roese			usb3@f0000 {
22439a230aaSStefan Roese				vcc-supply = <&reg_usb2_1_vbus>;
22539a230aaSStefan Roese				status = "okay";
22639a230aaSStefan Roese			};
22739a230aaSStefan Roese
22839a230aaSStefan Roese			/* CON7 */
22939a230aaSStefan Roese			usb3@f8000 {
23039a230aaSStefan Roese				vcc-supply = <&reg_usb3_vbus>;
23139a230aaSStefan Roese				status = "okay";
23239a230aaSStefan Roese			};
23339a230aaSStefan Roese		};
23439a230aaSStefan Roese
23539a230aaSStefan Roese		pcie-controller {
23639a230aaSStefan Roese			status = "okay";
23739a230aaSStefan Roese			/*
23839a230aaSStefan Roese			 * One PCIe units is accessible through
23939a230aaSStefan Roese			 * standard PCIe slot on the board.
24039a230aaSStefan Roese			 */
24139a230aaSStefan Roese			pcie@1,0 {
24239a230aaSStefan Roese				/* Port 0, Lane 0 */
24339a230aaSStefan Roese				status = "okay";
24439a230aaSStefan Roese			};
24539a230aaSStefan Roese
24639a230aaSStefan Roese			/*
24739a230aaSStefan Roese			 * The two other PCIe units are accessible
24839a230aaSStefan Roese			 * through mini PCIe slot on the board.
24939a230aaSStefan Roese			 */
25039a230aaSStefan Roese			pcie@2,0 {
25139a230aaSStefan Roese				/* Port 1, Lane 0 */
25239a230aaSStefan Roese				status = "okay";
25339a230aaSStefan Roese			};
25439a230aaSStefan Roese			pcie@3,0 {
25539a230aaSStefan Roese				/* Port 2, Lane 0 */
25639a230aaSStefan Roese				status = "okay";
25739a230aaSStefan Roese			};
25839a230aaSStefan Roese		};
25939a230aaSStefan Roese
26039a230aaSStefan Roese		gpio-fan {
26139a230aaSStefan Roese			compatible = "gpio-fan";
26239a230aaSStefan Roese			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
26339a230aaSStefan Roese			gpio-fan,speed-map = <	 0 0
26439a230aaSStefan Roese					      3000 1>;
26539a230aaSStefan Roese		};
26639a230aaSStefan Roese	};
26739a230aaSStefan Roese
26839a230aaSStefan Roese	reg_usb3_vbus: usb3-vbus {
26939a230aaSStefan Roese		compatible = "regulator-fixed";
27039a230aaSStefan Roese		regulator-name = "usb3-vbus";
27139a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
27239a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
27339a230aaSStefan Roese		enable-active-high;
27439a230aaSStefan Roese		regulator-always-on;
27539a230aaSStefan Roese		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
27639a230aaSStefan Roese	};
27739a230aaSStefan Roese
27839a230aaSStefan Roese	reg_usb2_0_vbus: v5-vbus0 {
27939a230aaSStefan Roese		compatible = "regulator-fixed";
28039a230aaSStefan Roese		regulator-name = "v5.0-vbus0";
28139a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
28239a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
28339a230aaSStefan Roese		enable-active-high;
28439a230aaSStefan Roese		regulator-always-on;
28539a230aaSStefan Roese		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
28639a230aaSStefan Roese	};
28739a230aaSStefan Roese
28839a230aaSStefan Roese	reg_usb2_1_vbus: v5-vbus1 {
28939a230aaSStefan Roese		compatible = "regulator-fixed";
29039a230aaSStefan Roese		regulator-name = "v5.0-vbus1";
29139a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
29239a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
29339a230aaSStefan Roese		enable-active-high;
29439a230aaSStefan Roese		regulator-always-on;
29539a230aaSStefan Roese		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
29639a230aaSStefan Roese	};
29739a230aaSStefan Roese
29839a230aaSStefan Roese	reg_usb2_1_vbus: v5-vbus1 {
29939a230aaSStefan Roese		compatible = "regulator-fixed";
30039a230aaSStefan Roese		regulator-name = "v5.0-vbus1";
30139a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
30239a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
30339a230aaSStefan Roese		enable-active-high;
30439a230aaSStefan Roese		regulator-always-on;
30539a230aaSStefan Roese		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
30639a230aaSStefan Roese	};
30739a230aaSStefan Roese
30839a230aaSStefan Roese	reg_sata0: pwr-sata0 {
30939a230aaSStefan Roese		compatible = "regulator-fixed";
31039a230aaSStefan Roese		regulator-name = "pwr_en_sata0";
31139a230aaSStefan Roese		enable-active-high;
31239a230aaSStefan Roese		regulator-always-on;
31339a230aaSStefan Roese
31439a230aaSStefan Roese	};
31539a230aaSStefan Roese
31639a230aaSStefan Roese	reg_5v_sata0: v5-sata0 {
31739a230aaSStefan Roese		compatible = "regulator-fixed";
31839a230aaSStefan Roese		regulator-name = "v5.0-sata0";
31939a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
32039a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
32139a230aaSStefan Roese		regulator-always-on;
32239a230aaSStefan Roese		vin-supply = <&reg_sata0>;
32339a230aaSStefan Roese	};
32439a230aaSStefan Roese
32539a230aaSStefan Roese	reg_12v_sata0: v12-sata0 {
32639a230aaSStefan Roese		compatible = "regulator-fixed";
32739a230aaSStefan Roese		regulator-name = "v12.0-sata0";
32839a230aaSStefan Roese		regulator-min-microvolt = <12000000>;
32939a230aaSStefan Roese		regulator-max-microvolt = <12000000>;
33039a230aaSStefan Roese		regulator-always-on;
33139a230aaSStefan Roese		vin-supply = <&reg_sata0>;
33239a230aaSStefan Roese	};
33339a230aaSStefan Roese
33439a230aaSStefan Roese	reg_sata1: pwr-sata1 {
33539a230aaSStefan Roese		regulator-name = "pwr_en_sata1";
33639a230aaSStefan Roese		compatible = "regulator-fixed";
33739a230aaSStefan Roese		regulator-min-microvolt = <12000000>;
33839a230aaSStefan Roese		regulator-max-microvolt = <12000000>;
33939a230aaSStefan Roese		enable-active-high;
34039a230aaSStefan Roese		regulator-always-on;
34139a230aaSStefan Roese		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
34239a230aaSStefan Roese	};
34339a230aaSStefan Roese
34439a230aaSStefan Roese	reg_5v_sata1: v5-sata1 {
34539a230aaSStefan Roese		compatible = "regulator-fixed";
34639a230aaSStefan Roese		regulator-name = "v5.0-sata1";
34739a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
34839a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
34939a230aaSStefan Roese		regulator-always-on;
35039a230aaSStefan Roese		vin-supply = <&reg_sata1>;
35139a230aaSStefan Roese	};
35239a230aaSStefan Roese
35339a230aaSStefan Roese	reg_12v_sata1: v12-sata1 {
35439a230aaSStefan Roese		compatible = "regulator-fixed";
35539a230aaSStefan Roese		regulator-name = "v12.0-sata1";
35639a230aaSStefan Roese		regulator-min-microvolt = <12000000>;
35739a230aaSStefan Roese		regulator-max-microvolt = <12000000>;
35839a230aaSStefan Roese		regulator-always-on;
35939a230aaSStefan Roese		vin-supply = <&reg_sata1>;
36039a230aaSStefan Roese	};
36139a230aaSStefan Roese
36239a230aaSStefan Roese	reg_sata2: pwr-sata2 {
36339a230aaSStefan Roese		compatible = "regulator-fixed";
36439a230aaSStefan Roese		regulator-name = "pwr_en_sata2";
36539a230aaSStefan Roese		enable-active-high;
36639a230aaSStefan Roese		regulator-always-on;
36739a230aaSStefan Roese		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
36839a230aaSStefan Roese	};
36939a230aaSStefan Roese
37039a230aaSStefan Roese	reg_5v_sata2: v5-sata2 {
37139a230aaSStefan Roese		compatible = "regulator-fixed";
37239a230aaSStefan Roese		regulator-name = "v5.0-sata2";
37339a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
37439a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
37539a230aaSStefan Roese		regulator-always-on;
37639a230aaSStefan Roese		vin-supply = <&reg_sata2>;
37739a230aaSStefan Roese	};
37839a230aaSStefan Roese
37939a230aaSStefan Roese	reg_12v_sata2: v12-sata2 {
38039a230aaSStefan Roese		compatible = "regulator-fixed";
38139a230aaSStefan Roese		regulator-name = "v12.0-sata2";
38239a230aaSStefan Roese		regulator-min-microvolt = <12000000>;
38339a230aaSStefan Roese		regulator-max-microvolt = <12000000>;
38439a230aaSStefan Roese		regulator-always-on;
38539a230aaSStefan Roese		vin-supply = <&reg_sata2>;
38639a230aaSStefan Roese	};
38739a230aaSStefan Roese
38839a230aaSStefan Roese	reg_sata3: pwr-sata3 {
38939a230aaSStefan Roese		compatible = "regulator-fixed";
39039a230aaSStefan Roese		regulator-name = "pwr_en_sata3";
39139a230aaSStefan Roese		enable-active-high;
39239a230aaSStefan Roese		regulator-always-on;
39339a230aaSStefan Roese		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
39439a230aaSStefan Roese	};
39539a230aaSStefan Roese
39639a230aaSStefan Roese	reg_5v_sata3: v5-sata3 {
39739a230aaSStefan Roese		compatible = "regulator-fixed";
39839a230aaSStefan Roese		regulator-name = "v5.0-sata3";
39939a230aaSStefan Roese		regulator-min-microvolt = <5000000>;
40039a230aaSStefan Roese		regulator-max-microvolt = <5000000>;
40139a230aaSStefan Roese		regulator-always-on;
40239a230aaSStefan Roese		vin-supply = <&reg_sata3>;
40339a230aaSStefan Roese	};
40439a230aaSStefan Roese
40539a230aaSStefan Roese	reg_12v_sata3: v12-sata3 {
40639a230aaSStefan Roese		compatible = "regulator-fixed";
40739a230aaSStefan Roese		regulator-name = "v12.0-sata3";
40839a230aaSStefan Roese		regulator-min-microvolt = <12000000>;
40939a230aaSStefan Roese		regulator-max-microvolt = <12000000>;
41039a230aaSStefan Roese		regulator-always-on;
41139a230aaSStefan Roese		vin-supply = <&reg_sata3>;
41239a230aaSStefan Roese	};
41339a230aaSStefan Roese};
41439a230aaSStefan Roese
41539a230aaSStefan Roese&pinctrl {
41639a230aaSStefan Roese	pca0_pins: pca0_pins {
41739a230aaSStefan Roese		marvell,pins = "mpp18";
41839a230aaSStefan Roese		marvell,function = "gpio";
41939a230aaSStefan Roese	};
42039a230aaSStefan Roese};
421