xref: /openbmc/u-boot/arch/arm/dts/armada-3720-db.dts (revision d66ff4ba)
1/*
2 * Device Tree file for Marvell Armada 3720 development board
3 * (DB-88F3720-DDR3)
4 * Copyright (C) 2016 Marvell
5 *
6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
7 *
8 * This file is dual-licensed: you can use it either under the terms
9 * of the GPL or the X11 license, at your option. Note that this dual
10 * licensing only applies to this file, and not this project as a
11 * whole.
12 *
13 *  a) This file is free software; you can redistribute it and/or
14 *     modify it under the terms of the GNU General Public License as
15 *     published by the Free Software Foundation; either version 2 of the
16 *     License, or (at your option) any later version.
17 *
18 *     This file is distributed in the hope that it will be useful
19 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
20 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21 *     GNU General Public License for more details.
22 *
23 * Or, alternatively
24 *
25 *  b) Permission is hereby granted, free of charge, to any person
26 *     obtaining a copy of this software and associated documentation
27 *     files (the "Software"), to deal in the Software without
28 *     restriction, including without limitation the rights to use
29 *     copy, modify, merge, publish, distribute, sublicense, and/or
30 *     sell copies of the Software, and to permit persons to whom the
31 *     Software is furnished to do so, subject to the following
32 *     conditions:
33 *
34 *     The above copyright notice and this permission notice shall be
35 *     included in all copies or substantial portions of the Software.
36 *
37 *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
38 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
39 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
41 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
42 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
43 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
44 *     OTHER DEALINGS IN THE SOFTWARE.
45 */
46
47/dts-v1/;
48
49#include "armada-372x.dtsi"
50
51/ {
52	model = "Marvell Armada 3720 Development Board DB-88F3720-DDR3";
53	compatible = "marvell,armada-3720-db", "marvell,armada3720", "marvell,armada3710";
54
55	chosen {
56		stdout-path = "serial0:115200n8";
57	};
58
59	aliases {
60		ethernet0 = &eth0;
61		i2c0 = &i2c0;
62		spi0 = &spi0;
63	};
64
65	memory {
66		device_type = "memory";
67		reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
68	};
69};
70
71&comphy {
72	phy0 {
73		phy-type = <PHY_TYPE_PEX0>;
74		phy-speed = <PHY_SPEED_2_5G>;
75	};
76
77	phy1 {
78		phy-type = <PHY_TYPE_USB3_HOST0>;
79		phy-speed = <PHY_SPEED_5G>;
80	};
81};
82
83&eth0 {
84	pinctrl-names = "default";
85	pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
86	status = "okay";
87	phy-mode = "rgmii";
88};
89
90&i2c0 {
91	pinctrl-names = "default";
92	pinctrl-0 = <&i2c1_pins>;
93	status = "okay";
94};
95
96/* CON3 */
97&sata {
98	status = "okay";
99};
100
101&sdhci0 {
102	bus-width = <4>;
103	pinctrl-names = "default";
104	pinctrl-0 = <&sdio_pins>;
105	status = "okay";
106};
107
108&sdhci1 {
109	non-removable;
110	bus-width = <8>;
111	mmc-ddr-1_8v;
112	mmc-hs400-1_8v;
113	marvell,pad-type = "fixed-1-8v";
114	pinctrl-names = "default";
115	pinctrl-0 = <&mmc_pins>;
116	status = "okay";
117
118	#address-cells = <1>;
119	#size-cells = <0>;
120	mmccard: mmccard@0 {
121		compatible = "mmc-card";
122		reg = <0>;
123	};
124};
125
126&spi0 {
127	status = "okay";
128	pinctrl-names = "default";
129	pinctrl-0 = <&spi_quad_pins>;
130
131	spi-flash@0 {
132		#address-cells = <1>;
133		#size-cells = <1>;
134		compatible = "st,m25p128", "spi-flash";
135		reg = <0>; /* Chip select 0 */
136		spi-max-frequency = <50000000>;
137		m25p,fast-read;
138	};
139};
140
141/* Exported on the micro USB connector CON32 through an FTDI */
142&uart0 {
143	pinctrl-names = "default";
144	pinctrl-0 = <&uart1_pins>;
145	status = "okay";
146};
147
148/* CON29 */
149&usb2 {
150	status = "okay";
151};
152
153/* CON31 */
154&usb3 {
155	status = "okay";
156};
157
158/* CON17 */
159&pcie0 {
160	pinctrl-names = "default";
161	pinctrl-0 = <&pcie_pins>;
162	reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
163	status = "okay";
164};
165