1/* 2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License version 2 as 6 * published by the Free Software Foundation. 7 */ 8 9/* AM437x SK EVM */ 10 11/dts-v1/; 12 13#include "am4372.dtsi" 14#include <dt-bindings/pinctrl/am43xx.h> 15#include <dt-bindings/pwm/pwm.h> 16#include <dt-bindings/gpio/gpio.h> 17#include <dt-bindings/input/input.h> 18 19/ { 20 model = "TI AM437x SK EVM"; 21 compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43"; 22 23 aliases { 24 display0 = &lcd0; 25 }; 26 27 chosen { 28 stdout-path = &uart0; 29 }; 30 31 backlight { 32 compatible = "pwm-backlight"; 33 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>; 34 brightness-levels = <0 51 53 56 62 75 101 152 255>; 35 default-brightness-level = <8>; 36 }; 37 38 sound { 39 compatible = "ti,da830-evm-audio"; 40 ti,model = "AM437x-SK-EVM"; 41 ti,audio-codec = <&tlv320aic3106>; 42 ti,mcasp-controller = <&mcasp1>; 43 ti,codec-clock-rate = <24000000>; 44 ti,audio-routing = 45 "Headphone Jack", "HPLOUT", 46 "Headphone Jack", "HPROUT"; 47 }; 48 49 matrix_keypad: matrix_keypad@0 { 50 compatible = "gpio-matrix-keypad"; 51 52 pinctrl-names = "default"; 53 pinctrl-0 = <&matrix_keypad_pins>; 54 55 debounce-delay-ms = <5>; 56 col-scan-delay-us = <5>; 57 58 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH /* Bank5, pin5 */ 59 &gpio5 6 GPIO_ACTIVE_HIGH>; /* Bank5, pin6 */ 60 61 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH /* Bank5, pin13 */ 62 &gpio5 4 GPIO_ACTIVE_HIGH>; /* Bank5, pin4 */ 63 64 linux,keymap = < 65 MATRIX_KEY(0, 0, KEY_DOWN) 66 MATRIX_KEY(0, 1, KEY_RIGHT) 67 MATRIX_KEY(1, 0, KEY_LEFT) 68 MATRIX_KEY(1, 1, KEY_UP) 69 >; 70 }; 71 72 leds { 73 compatible = "gpio-leds"; 74 75 pinctrl-names = "default"; 76 pinctrl-0 = <&leds_pins>; 77 78 led@0 { 79 label = "am437x-sk:red:heartbeat"; 80 gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 0 */ 81 linux,default-trigger = "heartbeat"; 82 default-state = "off"; 83 }; 84 85 led@1 { 86 label = "am437x-sk:green:mmc1"; 87 gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 1 */ 88 linux,default-trigger = "mmc0"; 89 default-state = "off"; 90 }; 91 92 led@2 { 93 label = "am437x-sk:blue:cpu0"; 94 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 2 */ 95 linux,default-trigger = "cpu0"; 96 default-state = "off"; 97 }; 98 99 led@3 { 100 label = "am437x-sk:blue:usr3"; 101 gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>; /* Bank 5, pin 3 */ 102 default-state = "off"; 103 }; 104 }; 105 106 lcd0: display { 107 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; 108 label = "lcd"; 109 110 pinctrl-names = "default"; 111 pinctrl-0 = <&lcd_pins>; 112 113 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 114 115 panel-timing { 116 clock-frequency = <9000000>; 117 hactive = <480>; 118 vactive = <272>; 119 hfront-porch = <2>; 120 hback-porch = <2>; 121 hsync-len = <41>; 122 vfront-porch = <2>; 123 vback-porch = <2>; 124 vsync-len = <10>; 125 hsync-active = <0>; 126 vsync-active = <0>; 127 de-active = <1>; 128 pixelclk-active = <1>; 129 }; 130 131 port { 132 lcd_in: endpoint { 133 remote-endpoint = <&dpi_out>; 134 }; 135 }; 136 }; 137}; 138 139&am43xx_pinmux { 140 matrix_keypad_pins: matrix_keypad_pins { 141 pinctrl-single,pins = < 142 0x24c (PIN_OUTPUT | MUX_MODE7) /* gpio5_13.gpio5_13 */ 143 0x250 (PIN_OUTPUT | MUX_MODE7) /* spi4_sclk.gpio5_4 */ 144 0x254 (PIN_INPUT | MUX_MODE7) /* spi4_d0.gpio5_5 */ 145 0x258 (PIN_INPUT | MUX_MODE7) /* spi4_d1.gpio5_5 */ 146 >; 147 }; 148 149 leds_pins: leds_pins { 150 pinctrl-single,pins = < 151 0x228 (PIN_OUTPUT | MUX_MODE7) /* uart3_rxd.gpio5_2 */ 152 0x22c (PIN_OUTPUT | MUX_MODE7) /* uart3_txd.gpio5_3 */ 153 0x230 (PIN_OUTPUT | MUX_MODE7) /* uart3_ctsn.gpio5_0 */ 154 0x234 (PIN_OUTPUT | MUX_MODE7) /* uart3_rtsn.gpio5_1 */ 155 >; 156 }; 157 158 i2c0_pins: i2c0_pins { 159 pinctrl-single,pins = < 160 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ 161 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ 162 >; 163 }; 164 165 i2c1_pins: i2c1_pins { 166 pinctrl-single,pins = < 167 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */ 168 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */ 169 >; 170 }; 171 172 mmc1_pins: pinmux_mmc1_pins { 173 pinctrl-single,pins = < 174 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ 175 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ 176 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ 177 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ 178 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 179 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ 180 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ 181 >; 182 }; 183 184 ecap0_pins: backlight_pins { 185 pinctrl-single,pins = < 186 0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */ 187 >; 188 }; 189 190 edt_ft5306_ts_pins: edt_ft5306_ts_pins { 191 pinctrl-single,pins = < 192 0x74 (PIN_INPUT | MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 193 0x78 (PIN_OUTPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ 194 >; 195 }; 196 197 vpfe0_pins_default: vpfe0_pins_default { 198 pinctrl-single,pins = < 199 0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/ 200 0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/ 201 0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/ 202 0x1bc (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/ 203 0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/ 204 0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/ 205 0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/ 206 0x208 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/ 207 0x20c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/ 208 0x210 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/ 209 0x214 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/ 210 0x218 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/ 211 0x21c (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/ 212 0x220 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/ 213 0x224 (PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/ 214 >; 215 }; 216 217 vpfe0_pins_sleep: vpfe0_pins_sleep { 218 pinctrl-single,pins = < 219 0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 220 0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 221 0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 222 0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 223 0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 224 0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 225 0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 226 0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 227 0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 228 0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 229 0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 230 0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 231 0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 232 0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 233 0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) 234 >; 235 }; 236 237 cpsw_default: cpsw_default { 238 pinctrl-single,pins = < 239 /* Slave 1 */ 240 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ 241 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ 242 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ 243 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ 244 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ 245 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ 246 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ 247 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ 248 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ 249 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ 250 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ 251 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ 252 253 /* Slave 2 */ 254 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 255 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 256 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 257 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 258 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 259 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 260 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 261 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ 262 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 263 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 264 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 265 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 266 >; 267 }; 268 269 cpsw_sleep: cpsw_sleep { 270 pinctrl-single,pins = < 271 /* Slave 1 reset value */ 272 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) 273 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 274 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 275 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 276 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) 277 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) 278 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) 279 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) 280 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 281 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 282 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) 283 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) 284 285 /* Slave 2 reset value */ 286 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 287 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 288 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 289 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 290 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 291 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 292 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 293 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 294 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 295 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 296 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 297 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 298 >; 299 }; 300 301 davinci_mdio_default: davinci_mdio_default { 302 pinctrl-single,pins = < 303 /* MDIO */ 304 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 305 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ 306 >; 307 }; 308 309 davinci_mdio_sleep: davinci_mdio_sleep { 310 pinctrl-single,pins = < 311 /* MDIO reset value */ 312 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 313 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 314 >; 315 }; 316 317 dss_pins: dss_pins { 318 pinctrl-single,pins = < 319 0x020 (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 8 -> DSS DATA 23 */ 320 0x024 (PIN_OUTPUT | MUX_MODE1) 321 0x028 (PIN_OUTPUT | MUX_MODE1) 322 0x02c (PIN_OUTPUT | MUX_MODE1) 323 0x030 (PIN_OUTPUT | MUX_MODE1) 324 0x034 (PIN_OUTPUT | MUX_MODE1) 325 0x038 (PIN_OUTPUT | MUX_MODE1) 326 0x03c (PIN_OUTPUT | MUX_MODE1) /* gpmc ad 15 -> DSS DATA 16 */ 327 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ 328 0x0a4 (PIN_OUTPUT | MUX_MODE0) 329 0x0a8 (PIN_OUTPUT | MUX_MODE0) 330 0x0ac (PIN_OUTPUT | MUX_MODE0) 331 0x0b0 (PIN_OUTPUT | MUX_MODE0) 332 0x0b4 (PIN_OUTPUT | MUX_MODE0) 333 0x0b8 (PIN_OUTPUT | MUX_MODE0) 334 0x0bc (PIN_OUTPUT | MUX_MODE0) 335 0x0c0 (PIN_OUTPUT | MUX_MODE0) 336 0x0c4 (PIN_OUTPUT | MUX_MODE0) 337 0x0c8 (PIN_OUTPUT | MUX_MODE0) 338 0x0cc (PIN_OUTPUT | MUX_MODE0) 339 0x0d0 (PIN_OUTPUT | MUX_MODE0) 340 0x0d4 (PIN_OUTPUT | MUX_MODE0) 341 0x0d8 (PIN_OUTPUT | MUX_MODE0) 342 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ 343 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ 344 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ 345 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ 346 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ 347 348 >; 349 }; 350 351 qspi_pins: qspi_pins { 352 pinctrl-single,pins = < 353 0x7c (PIN_OUTPUT | MUX_MODE3) /* gpmc_csn0.qspi_csn */ 354 0x88 (PIN_OUTPUT | MUX_MODE2) /* gpmc_csn3.qspi_clk */ 355 0x90 (PIN_INPUT | MUX_MODE3) /* gpmc_advn_ale.qspi_d0 */ 356 0x94 (PIN_INPUT | MUX_MODE3) /* gpmc_oen_ren.qspi_d1 */ 357 0x98 (PIN_INPUT | MUX_MODE3) /* gpmc_wen.qspi_d2 */ 358 0x9c (PIN_INPUT | MUX_MODE3) /* gpmc_be0n_cle.qspi_d3 */ 359 >; 360 }; 361 362 mcasp1_pins: mcasp1_pins { 363 pinctrl-single,pins = < 364 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */ 365 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */ 366 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */ 367 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */ 368 >; 369 }; 370 371 lcd_pins: lcd_pins { 372 pinctrl-single,pins = < 373 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ 374 >; 375 }; 376 377 usb1_pins: usb1_pins { 378 pinctrl-single,pins = < 379 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 380 >; 381 }; 382 383 usb2_pins: usb2_pins { 384 pinctrl-single,pins = < 385 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ 386 >; 387 }; 388}; 389 390&i2c0 { 391 status = "okay"; 392 pinctrl-names = "default"; 393 pinctrl-0 = <&i2c0_pins>; 394 clock-frequency = <400000>; 395 396 tps@24 { 397 compatible = "ti,tps65218"; 398 reg = <0x24>; 399 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 400 interrupt-controller; 401 #interrupt-cells = <2>; 402 403 dcdc1: regulator-dcdc1 { 404 compatible = "ti,tps65218-dcdc1"; 405 /* VDD_CORE limits min of OPP50 and max of OPP100 */ 406 regulator-name = "vdd_core"; 407 regulator-min-microvolt = <912000>; 408 regulator-max-microvolt = <1144000>; 409 regulator-boot-on; 410 regulator-always-on; 411 }; 412 413 dcdc2: regulator-dcdc2 { 414 compatible = "ti,tps65218-dcdc2"; 415 /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ 416 regulator-name = "vdd_mpu"; 417 regulator-min-microvolt = <912000>; 418 regulator-max-microvolt = <1378000>; 419 regulator-boot-on; 420 regulator-always-on; 421 }; 422 423 dcdc3: regulator-dcdc3 { 424 compatible = "ti,tps65218-dcdc3"; 425 regulator-name = "vdds_ddr"; 426 regulator-min-microvolt = <1500000>; 427 regulator-max-microvolt = <1500000>; 428 regulator-boot-on; 429 regulator-always-on; 430 }; 431 432 dcdc4: regulator-dcdc4 { 433 compatible = "ti,tps65218-dcdc4"; 434 regulator-name = "v3_3d"; 435 regulator-min-microvolt = <3300000>; 436 regulator-max-microvolt = <3300000>; 437 regulator-boot-on; 438 regulator-always-on; 439 }; 440 441 ldo1: regulator-ldo1 { 442 compatible = "ti,tps65218-ldo1"; 443 regulator-name = "v1_8d"; 444 regulator-min-microvolt = <1800000>; 445 regulator-max-microvolt = <1800000>; 446 regulator-boot-on; 447 regulator-always-on; 448 }; 449 450 power-button { 451 compatible = "ti,tps65218-pwrbutton"; 452 status = "okay"; 453 interrupts = <3 IRQ_TYPE_EDGE_BOTH>; 454 }; 455 }; 456 457 at24@50 { 458 compatible = "at24,24c256"; 459 pagesize = <64>; 460 reg = <0x50>; 461 }; 462}; 463 464&i2c1 { 465 status = "okay"; 466 pinctrl-names = "default"; 467 pinctrl-0 = <&i2c1_pins>; 468 clock-frequency = <400000>; 469 470 edt-ft5306@38 { 471 status = "okay"; 472 compatible = "edt,edt-ft5306", "edt,edt-ft5x06"; 473 pinctrl-names = "default"; 474 pinctrl-0 = <&edt_ft5306_ts_pins>; 475 476 reg = <0x38>; 477 interrupt-parent = <&gpio0>; 478 interrupts = <31 0>; 479 480 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>; 481 482 touchscreen-size-x = <480>; 483 touchscreen-size-y = <272>; 484 }; 485 486 tlv320aic3106: tlv320aic3106@1b { 487 compatible = "ti,tlv320aic3106"; 488 reg = <0x1b>; 489 status = "okay"; 490 491 /* Regulators */ 492 AVDD-supply = <&dcdc4>; 493 IOVDD-supply = <&dcdc4>; 494 DRVDD-supply = <&dcdc4>; 495 DVDD-supply = <&ldo1>; 496 }; 497 498 lis331dlh@18 { 499 compatible = "st,lis331dlh"; 500 reg = <0x18>; 501 status = "okay"; 502 503 Vdd-supply = <&dcdc4>; 504 Vdd_IO-supply = <&dcdc4>; 505 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>; 506 }; 507}; 508 509&epwmss0 { 510 status = "okay"; 511}; 512 513&ecap0 { 514 status = "okay"; 515 pinctrl-names = "default"; 516 pinctrl-0 = <&ecap0_pins>; 517}; 518 519&gpio0 { 520 status = "okay"; 521}; 522 523&gpio1 { 524 status = "okay"; 525}; 526 527&gpio5 { 528 status = "okay"; 529}; 530 531&mmc1 { 532 status = "okay"; 533 pinctrl-names = "default"; 534 pinctrl-0 = <&mmc1_pins>; 535 536 vmmc-supply = <&dcdc4>; 537 bus-width = <4>; 538 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 539}; 540 541&usb2_phy1 { 542 status = "okay"; 543}; 544 545&usb1 { 546 dr_mode = "peripheral"; 547 status = "okay"; 548 pinctrl-names = "default"; 549 pinctrl-0 = <&usb1_pins>; 550}; 551 552&usb2_phy2 { 553 status = "okay"; 554}; 555 556&usb2 { 557 dr_mode = "host"; 558 status = "okay"; 559 pinctrl-names = "default"; 560 pinctrl-0 = <&usb2_pins>; 561}; 562 563&qspi { 564 status = "okay"; 565 pinctrl-names = "default"; 566 pinctrl-0 = <&qspi_pins>; 567 568 spi-max-frequency = <48000000>; 569 m25p80@0 { 570 compatible = "mx66l51235l","spi-flash"; 571 spi-max-frequency = <48000000>; 572 reg = <0>; 573 spi-cpol; 574 spi-cpha; 575 spi-tx-bus-width = <1>; 576 spi-rx-bus-width = <4>; 577 #address-cells = <1>; 578 #size-cells = <1>; 579 580 /* MTD partition table. 581 * The ROM checks the first 512KiB 582 * for a valid file to boot(XIP). 583 */ 584 partition@0 { 585 label = "QSPI.U_BOOT"; 586 reg = <0x00000000 0x000080000>; 587 }; 588 partition@1 { 589 label = "QSPI.U_BOOT.backup"; 590 reg = <0x00080000 0x00080000>; 591 }; 592 partition@2 { 593 label = "QSPI.U-BOOT-SPL_OS"; 594 reg = <0x00100000 0x00010000>; 595 }; 596 partition@3 { 597 label = "QSPI.U_BOOT_ENV"; 598 reg = <0x00110000 0x00010000>; 599 }; 600 partition@4 { 601 label = "QSPI.U-BOOT-ENV.backup"; 602 reg = <0x00120000 0x00010000>; 603 }; 604 partition@5 { 605 label = "QSPI.KERNEL"; 606 reg = <0x00130000 0x0800000>; 607 }; 608 partition@6 { 609 label = "QSPI.FILESYSTEM"; 610 reg = <0x00930000 0x36D0000>; 611 }; 612 }; 613}; 614 615&mac { 616 pinctrl-names = "default", "sleep"; 617 pinctrl-0 = <&cpsw_default>; 618 pinctrl-1 = <&cpsw_sleep>; 619 dual_emac = <1>; 620 status = "okay"; 621}; 622 623&davinci_mdio { 624 pinctrl-names = "default", "sleep"; 625 pinctrl-0 = <&davinci_mdio_default>; 626 pinctrl-1 = <&davinci_mdio_sleep>; 627 status = "okay"; 628}; 629 630&cpsw_emac0 { 631 phy_id = <&davinci_mdio>, <4>; 632 phy-mode = "rgmii"; 633 dual_emac_res_vlan = <1>; 634}; 635 636&cpsw_emac1 { 637 phy_id = <&davinci_mdio>, <5>; 638 phy-mode = "rgmii"; 639 dual_emac_res_vlan = <2>; 640}; 641 642&elm { 643 status = "okay"; 644}; 645 646&mcasp1 { 647 pinctrl-names = "default"; 648 pinctrl-0 = <&mcasp1_pins>; 649 650 status = "okay"; 651 652 op-mode = <0>; 653 tdm-slots = <2>; 654 serial-dir = < 655 0 0 1 2 656 >; 657 658 tx-num-evt = <1>; 659 rx-num-evt = <1>; 660}; 661 662&dss { 663 status = "okay"; 664 665 pinctrl-names = "default"; 666 pinctrl-0 = <&dss_pins>; 667 668 port { 669 dpi_out: endpoint@0 { 670 remote-endpoint = <&lcd_in>; 671 data-lines = <24>; 672 }; 673 }; 674}; 675 676&rtc { 677 status = "okay"; 678}; 679 680&wdt { 681 status = "okay"; 682}; 683 684&cpu { 685 cpu0-supply = <&dcdc2>; 686}; 687 688&vpfe0 { 689 status = "okay"; 690 pinctrl-names = "default", "sleep"; 691 pinctrl-0 = <&vpfe0_pins_default>; 692 pinctrl-1 = <&vpfe0_pins_sleep>; 693 694 /* Camera port */ 695 port { 696 vpfe0_ep: endpoint { 697 /* remote-endpoint = <&sensor>; add once we have it */ 698 ti,am437x-vpfe-interface = <0>; 699 bus-width = <8>; 700 hsync-active = <0>; 701 vsync-active = <0>; 702 }; 703 }; 704}; 705