xref: /openbmc/u-boot/arch/arm/dts/am437x-sk-evm.dts (revision 20c700f8)
1/*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/* AM437x SK EVM */
10
11/dts-v1/;
12
13#include "am4372.dtsi"
14#include <dt-bindings/pinctrl/am43xx.h>
15#include <dt-bindings/pwm/pwm.h>
16#include <dt-bindings/gpio/gpio.h>
17#include <dt-bindings/input/input.h>
18
19/ {
20	model = "TI AM437x SK EVM";
21	compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
22
23	aliases {
24		display0 = &lcd0;
25	};
26
27	chosen {
28		stdout-path = &uart0;
29		tick-timer = &timer2;
30	};
31
32	backlight {
33		compatible = "pwm-backlight";
34		pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
35		brightness-levels = <0 51 53 56 62 75 101 152 255>;
36		default-brightness-level = <8>;
37	};
38
39	sound {
40		compatible = "ti,da830-evm-audio";
41		ti,model = "AM437x-SK-EVM";
42		ti,audio-codec = <&tlv320aic3106>;
43		ti,mcasp-controller = <&mcasp1>;
44		ti,codec-clock-rate = <24000000>;
45		ti,audio-routing =
46			"Headphone Jack",       "HPLOUT",
47			"Headphone Jack",       "HPROUT";
48	};
49
50	matrix_keypad: matrix_keypad@0 {
51		compatible = "gpio-matrix-keypad";
52
53		pinctrl-names = "default";
54		pinctrl-0 = <&matrix_keypad_pins>;
55
56		debounce-delay-ms = <5>;
57		col-scan-delay-us = <5>;
58
59		row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH		/* Bank5, pin5 */
60				&gpio5 6 GPIO_ACTIVE_HIGH>;	/* Bank5, pin6 */
61
62		col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH		/* Bank5, pin13 */
63				&gpio5 4 GPIO_ACTIVE_HIGH>;	/* Bank5, pin4 */
64
65		linux,keymap = <
66				MATRIX_KEY(0, 0, KEY_DOWN)
67				MATRIX_KEY(0, 1, KEY_RIGHT)
68				MATRIX_KEY(1, 0, KEY_LEFT)
69				MATRIX_KEY(1, 1, KEY_UP)
70			>;
71	};
72
73	leds {
74		compatible = "gpio-leds";
75
76		pinctrl-names = "default";
77		pinctrl-0 = <&leds_pins>;
78
79		led@0 {
80			label = "am437x-sk:red:heartbeat";
81			gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 0 */
82			linux,default-trigger = "heartbeat";
83			default-state = "off";
84		};
85
86		led@1 {
87			label = "am437x-sk:green:mmc1";
88			gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 1 */
89			linux,default-trigger = "mmc0";
90			default-state = "off";
91		};
92
93		led@2 {
94			label = "am437x-sk:blue:cpu0";
95			gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 2 */
96			linux,default-trigger = "cpu0";
97			default-state = "off";
98		};
99
100		led@3 {
101			label = "am437x-sk:blue:usr3";
102			gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;	/* Bank 5, pin 3 */
103			default-state = "off";
104		};
105	};
106
107	lcd0: display {
108		compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
109		label = "lcd";
110
111		pinctrl-names = "default";
112		pinctrl-0 = <&lcd_pins>;
113
114		enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
115
116		panel-timing {
117			clock-frequency = <9000000>;
118			hactive = <480>;
119			vactive = <272>;
120			hfront-porch = <2>;
121			hback-porch = <2>;
122			hsync-len = <41>;
123			vfront-porch = <2>;
124			vback-porch = <2>;
125			vsync-len = <10>;
126			hsync-active = <0>;
127			vsync-active = <0>;
128			de-active = <1>;
129			pixelclk-active = <1>;
130		};
131
132		port {
133			lcd_in: endpoint {
134				remote-endpoint = <&dpi_out>;
135			};
136		};
137	};
138};
139
140&am43xx_pinmux {
141	matrix_keypad_pins: matrix_keypad_pins {
142		pinctrl-single,pins = <
143			0x24c (PIN_OUTPUT | MUX_MODE7)	/* gpio5_13.gpio5_13 */
144			0x250 (PIN_OUTPUT | MUX_MODE7)	/* spi4_sclk.gpio5_4 */
145			0x254 (PIN_INPUT | MUX_MODE7)	/* spi4_d0.gpio5_5 */
146			0x258 (PIN_INPUT | MUX_MODE7)	/* spi4_d1.gpio5_5 */
147		>;
148	};
149
150	leds_pins: leds_pins {
151		pinctrl-single,pins = <
152			0x228 (PIN_OUTPUT | MUX_MODE7)	/* uart3_rxd.gpio5_2 */
153			0x22c (PIN_OUTPUT | MUX_MODE7)	/* uart3_txd.gpio5_3 */
154			0x230 (PIN_OUTPUT | MUX_MODE7)	/* uart3_ctsn.gpio5_0 */
155			0x234 (PIN_OUTPUT | MUX_MODE7)	/* uart3_rtsn.gpio5_1 */
156		>;
157	};
158
159	i2c0_pins: i2c0_pins {
160		pinctrl-single,pins = <
161			0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
162			0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
163		>;
164	};
165
166	i2c1_pins: i2c1_pins {
167		pinctrl-single,pins = <
168			0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
169			0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
170		>;
171	};
172
173	mmc1_pins: pinmux_mmc1_pins {
174		pinctrl-single,pins = <
175			0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
176			0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
177			0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
178			0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
179			0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
180			0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
181			0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
182		>;
183	};
184
185	ecap0_pins: backlight_pins {
186		pinctrl-single,pins = <
187			0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
188		>;
189	};
190
191	edt_ft5306_ts_pins: edt_ft5306_ts_pins {
192		pinctrl-single,pins = <
193			0x74 (PIN_INPUT | MUX_MODE7)	/* gpmc_wpn.gpio0_31 */
194			0x78 (PIN_OUTPUT | MUX_MODE7)	/* gpmc_be1n.gpio1_28 */
195		>;
196	};
197
198	vpfe0_pins_default: vpfe0_pins_default {
199		pinctrl-single,pins = <
200			0x1b0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
201			0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
202			0x1b8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_field mode 0*/
203			0x1bc (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_wen mode 0*/
204			0x1c0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
205			0x1c4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
206			0x1c8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
207			0x208 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
208			0x20c (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
209			0x210 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
210			0x214 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
211			0x218 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
212			0x21c (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
213			0x220 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
214			0x224 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
215		>;
216	};
217
218	vpfe0_pins_sleep: vpfe0_pins_sleep {
219		pinctrl-single,pins = <
220			0x1b0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
221			0x1b4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
222			0x1b8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
223			0x1bc (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
224			0x1c0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
225			0x1c4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
226			0x1c8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
227			0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
228			0x20c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
229			0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
230			0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
231			0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
232			0x21c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
233			0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
234			0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
235		>;
236	};
237
238	cpsw_default: cpsw_default {
239		pinctrl-single,pins = <
240			/* Slave 1 */
241			0x12c (PIN_OUTPUT | MUX_MODE2)	/* mii1_txclk.rmii1_tclk */
242			0x114 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
243			0x128 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
244			0x124 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
245			0x120 (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd0.rgmii1_td2 */
246			0x11c (PIN_OUTPUT | MUX_MODE2)	/* mii1_txd1.rgmii1_td3 */
247			0x130 (PIN_INPUT | MUX_MODE2)	/* mii1_rxclk.rmii1_rclk */
248			0x118 (PIN_INPUT | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
249			0x140 (PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
250			0x13c (PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
251			0x138 (PIN_INPUT | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd2 */
252			0x134 (PIN_INPUT | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd3 */
253
254			/* Slave 2 */
255			0x58 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
256			0x40 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
257			0x54 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
258			0x50 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
259			0x4c (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
260			0x48 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
261			0x5c (PIN_INPUT | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
262			0x44 (PIN_INPUT | MUX_MODE2)	/* gpmc_a1.rgmii2_rtcl */
263			0x6c (PIN_INPUT | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
264			0x68 (PIN_INPUT | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
265			0x64 (PIN_INPUT | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
266			0x60 (PIN_INPUT | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
267		>;
268	};
269
270	cpsw_sleep: cpsw_sleep {
271		pinctrl-single,pins = <
272			/* Slave 1 reset value */
273			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
274			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
275			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
276			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
277			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
278			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
279			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
280			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
281			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
282			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
283			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
284			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
285
286			/* Slave 2 reset value */
287			0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
288			0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
289			0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
290			0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
291			0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
292			0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
293			0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
294			0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
295			0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
296			0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
297			0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
298			0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
299		>;
300	};
301
302	davinci_mdio_default: davinci_mdio_default {
303		pinctrl-single,pins = <
304			/* MDIO */
305			0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
306			0x14c (PIN_OUTPUT | MUX_MODE0)			/* mdio_clk.mdio_clk */
307		>;
308	};
309
310	davinci_mdio_sleep: davinci_mdio_sleep {
311		pinctrl-single,pins = <
312			/* MDIO reset value */
313			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
314			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
315		>;
316	};
317
318	dss_pins: dss_pins {
319		pinctrl-single,pins = <
320			0x020 (PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 8 -> DSS DATA 23 */
321			0x024 (PIN_OUTPUT | MUX_MODE1)
322			0x028 (PIN_OUTPUT | MUX_MODE1)
323			0x02c (PIN_OUTPUT | MUX_MODE1)
324			0x030 (PIN_OUTPUT | MUX_MODE1)
325			0x034 (PIN_OUTPUT | MUX_MODE1)
326			0x038 (PIN_OUTPUT | MUX_MODE1)
327			0x03c (PIN_OUTPUT | MUX_MODE1)	/* gpmc ad 15 -> DSS DATA 16 */
328			0x0a0 (PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 0 */
329			0x0a4 (PIN_OUTPUT | MUX_MODE0)
330			0x0a8 (PIN_OUTPUT | MUX_MODE0)
331			0x0ac (PIN_OUTPUT | MUX_MODE0)
332			0x0b0 (PIN_OUTPUT | MUX_MODE0)
333			0x0b4 (PIN_OUTPUT | MUX_MODE0)
334			0x0b8 (PIN_OUTPUT | MUX_MODE0)
335			0x0bc (PIN_OUTPUT | MUX_MODE0)
336			0x0c0 (PIN_OUTPUT | MUX_MODE0)
337			0x0c4 (PIN_OUTPUT | MUX_MODE0)
338			0x0c8 (PIN_OUTPUT | MUX_MODE0)
339			0x0cc (PIN_OUTPUT | MUX_MODE0)
340			0x0d0 (PIN_OUTPUT | MUX_MODE0)
341			0x0d4 (PIN_OUTPUT | MUX_MODE0)
342			0x0d8 (PIN_OUTPUT | MUX_MODE0)
343			0x0dc (PIN_OUTPUT | MUX_MODE0)	/* DSS DATA 15 */
344			0x0e0 (PIN_OUTPUT | MUX_MODE0)	/* DSS VSYNC */
345			0x0e4 (PIN_OUTPUT | MUX_MODE0)	/* DSS HSYNC */
346			0x0e8 (PIN_OUTPUT | MUX_MODE0)	/* DSS PCLK */
347			0x0ec (PIN_OUTPUT | MUX_MODE0)	/* DSS AC BIAS EN */
348
349		>;
350	};
351
352	qspi_pins: qspi_pins {
353		pinctrl-single,pins = <
354			0x7c (PIN_OUTPUT | MUX_MODE3)	/* gpmc_csn0.qspi_csn */
355			0x88 (PIN_OUTPUT | MUX_MODE2)	/* gpmc_csn3.qspi_clk */
356			0x90 (PIN_INPUT | MUX_MODE3)	/* gpmc_advn_ale.qspi_d0 */
357			0x94 (PIN_INPUT | MUX_MODE3)	/* gpmc_oen_ren.qspi_d1 */
358			0x98 (PIN_INPUT | MUX_MODE3)	/* gpmc_wen.qspi_d2 */
359			0x9c (PIN_INPUT | MUX_MODE3)	/* gpmc_be0n_cle.qspi_d3 */
360		>;
361	};
362
363	mcasp1_pins: mcasp1_pins {
364		pinctrl-single,pins = <
365			0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_crs.mcasp1_aclkx */
366			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4)	/* mii1_rxerr.mcasp1_fsx */
367			0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4)	/* mii1_col.mcasp1_axr2 */
368			0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4)	/* rmii1_ref_clk.mcasp1_axr3 */
369		>;
370	};
371
372	lcd_pins: lcd_pins {
373		pinctrl-single,pins = <
374			0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
375		>;
376	};
377
378	usb1_pins: usb1_pins {
379		pinctrl-single,pins = <
380			0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
381		>;
382	};
383
384	usb2_pins: usb2_pins {
385		pinctrl-single,pins = <
386			0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */
387		>;
388	};
389};
390
391&i2c0 {
392	status = "okay";
393	pinctrl-names = "default";
394	pinctrl-0 = <&i2c0_pins>;
395	clock-frequency = <400000>;
396
397	tps@24 {
398		compatible = "ti,tps65218";
399		reg = <0x24>;
400		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
401		interrupt-controller;
402		#interrupt-cells = <2>;
403
404		dcdc1: regulator-dcdc1 {
405			compatible = "ti,tps65218-dcdc1";
406			/* VDD_CORE limits min of OPP50 and max of OPP100 */
407			regulator-name = "vdd_core";
408			regulator-min-microvolt = <912000>;
409			regulator-max-microvolt = <1144000>;
410			regulator-boot-on;
411			regulator-always-on;
412		};
413
414		dcdc2: regulator-dcdc2 {
415			compatible = "ti,tps65218-dcdc2";
416			/* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
417			regulator-name = "vdd_mpu";
418			regulator-min-microvolt = <912000>;
419			regulator-max-microvolt = <1378000>;
420			regulator-boot-on;
421			regulator-always-on;
422		};
423
424		dcdc3: regulator-dcdc3 {
425			compatible = "ti,tps65218-dcdc3";
426			regulator-name = "vdds_ddr";
427			regulator-min-microvolt = <1500000>;
428			regulator-max-microvolt = <1500000>;
429			regulator-boot-on;
430			regulator-always-on;
431		};
432
433		dcdc4: regulator-dcdc4 {
434			compatible = "ti,tps65218-dcdc4";
435			regulator-name = "v3_3d";
436			regulator-min-microvolt = <3300000>;
437			regulator-max-microvolt = <3300000>;
438			regulator-boot-on;
439			regulator-always-on;
440		};
441
442		ldo1: regulator-ldo1 {
443			compatible = "ti,tps65218-ldo1";
444			regulator-name = "v1_8d";
445			regulator-min-microvolt = <1800000>;
446			regulator-max-microvolt = <1800000>;
447			regulator-boot-on;
448			regulator-always-on;
449		};
450
451		power-button {
452			compatible = "ti,tps65218-pwrbutton";
453			status = "okay";
454			interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
455		};
456	};
457
458	at24@50 {
459		compatible = "at24,24c256";
460		pagesize = <64>;
461		reg = <0x50>;
462	};
463};
464
465&i2c1 {
466	status = "okay";
467	pinctrl-names = "default";
468	pinctrl-0 = <&i2c1_pins>;
469	clock-frequency = <400000>;
470
471	edt-ft5306@38 {
472		status = "okay";
473		compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
474		pinctrl-names = "default";
475		pinctrl-0 = <&edt_ft5306_ts_pins>;
476
477		reg = <0x38>;
478		interrupt-parent = <&gpio0>;
479		interrupts = <31 0>;
480
481		reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
482
483		touchscreen-size-x = <480>;
484		touchscreen-size-y = <272>;
485	};
486
487	tlv320aic3106: tlv320aic3106@1b {
488		compatible = "ti,tlv320aic3106";
489		reg = <0x1b>;
490		status = "okay";
491
492		/* Regulators */
493		AVDD-supply = <&dcdc4>;
494		IOVDD-supply = <&dcdc4>;
495		DRVDD-supply = <&dcdc4>;
496		DVDD-supply = <&ldo1>;
497	};
498
499	lis331dlh@18 {
500		compatible = "st,lis331dlh";
501		reg = <0x18>;
502		status = "okay";
503
504		Vdd-supply = <&dcdc4>;
505		Vdd_IO-supply = <&dcdc4>;
506		interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
507	};
508};
509
510&epwmss0 {
511	status = "okay";
512};
513
514&ecap0 {
515	status = "okay";
516	pinctrl-names = "default";
517	pinctrl-0 = <&ecap0_pins>;
518};
519
520&gpio0 {
521	status = "okay";
522};
523
524&gpio1 {
525	status = "okay";
526};
527
528&gpio5 {
529	status = "okay";
530};
531
532&mmc1 {
533	status = "okay";
534	pinctrl-names = "default";
535	pinctrl-0 = <&mmc1_pins>;
536
537	vmmc-supply = <&dcdc4>;
538	bus-width = <4>;
539	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
540};
541
542&usb2_phy1 {
543	status = "okay";
544};
545
546&usb1 {
547	dr_mode = "peripheral";
548	status = "okay";
549	pinctrl-names = "default";
550	pinctrl-0 = <&usb1_pins>;
551};
552
553&usb2_phy2 {
554	status = "okay";
555};
556
557&usb2 {
558	dr_mode = "host";
559	status = "okay";
560	pinctrl-names = "default";
561	pinctrl-0 = <&usb2_pins>;
562};
563
564&qspi {
565	status = "okay";
566	pinctrl-names = "default";
567	pinctrl-0 = <&qspi_pins>;
568
569	spi-max-frequency = <48000000>;
570	m25p80@0 {
571		compatible = "mx66l51235l","spi-flash";
572		spi-max-frequency = <48000000>;
573		reg = <0>;
574		spi-cpol;
575		spi-cpha;
576		spi-tx-bus-width = <1>;
577		spi-rx-bus-width = <4>;
578		#address-cells = <1>;
579		#size-cells = <1>;
580
581		/* MTD partition table.
582		 * The ROM checks the first 512KiB
583		 * for a valid file to boot(XIP).
584		 */
585		partition@0 {
586			label = "QSPI.U_BOOT";
587			reg = <0x00000000 0x000080000>;
588		};
589		partition@1 {
590			label = "QSPI.U_BOOT.backup";
591			reg = <0x00080000 0x00080000>;
592		};
593		partition@2 {
594			label = "QSPI.U-BOOT-SPL_OS";
595			reg = <0x00100000 0x00010000>;
596		};
597		partition@3 {
598			label = "QSPI.U_BOOT_ENV";
599			reg = <0x00110000 0x00010000>;
600		};
601		partition@4 {
602			label = "QSPI.U-BOOT-ENV.backup";
603			reg = <0x00120000 0x00010000>;
604		};
605		partition@5 {
606			label = "QSPI.KERNEL";
607			reg = <0x00130000 0x0800000>;
608		};
609		partition@6 {
610			label = "QSPI.FILESYSTEM";
611			reg = <0x00930000 0x36D0000>;
612		};
613	};
614};
615
616&mac {
617	pinctrl-names = "default", "sleep";
618	pinctrl-0 = <&cpsw_default>;
619	pinctrl-1 = <&cpsw_sleep>;
620	dual_emac = <1>;
621	status = "okay";
622};
623
624&davinci_mdio {
625	pinctrl-names = "default", "sleep";
626	pinctrl-0 = <&davinci_mdio_default>;
627	pinctrl-1 = <&davinci_mdio_sleep>;
628	status = "okay";
629};
630
631&cpsw_emac0 {
632	phy_id = <&davinci_mdio>, <4>;
633	phy-mode = "rgmii";
634	dual_emac_res_vlan = <1>;
635};
636
637&cpsw_emac1 {
638	phy_id = <&davinci_mdio>, <5>;
639	phy-mode = "rgmii";
640	dual_emac_res_vlan = <2>;
641};
642
643&elm {
644	status = "okay";
645};
646
647&mcasp1 {
648	pinctrl-names = "default";
649	pinctrl-0 = <&mcasp1_pins>;
650
651	status = "okay";
652
653	op-mode = <0>;
654	tdm-slots = <2>;
655	serial-dir = <
656		0 0 1 2
657	>;
658
659	tx-num-evt = <1>;
660	rx-num-evt = <1>;
661};
662
663&dss {
664	status = "okay";
665
666	pinctrl-names = "default";
667	pinctrl-0 = <&dss_pins>;
668
669	port {
670		dpi_out: endpoint@0 {
671			remote-endpoint = <&lcd_in>;
672			data-lines = <24>;
673		};
674	};
675};
676
677&rtc {
678	status = "okay";
679};
680
681&wdt {
682	status = "okay";
683};
684
685&cpu {
686	cpu0-supply = <&dcdc2>;
687};
688
689&vpfe0 {
690	status = "okay";
691	pinctrl-names = "default", "sleep";
692	pinctrl-0 = <&vpfe0_pins_default>;
693	pinctrl-1 = <&vpfe0_pins_sleep>;
694
695	/* Camera port */
696	port {
697		vpfe0_ep: endpoint {
698			/* remote-endpoint = <&sensor>; add once we have it */
699			ti,am437x-vpfe-interface = <0>;
700			bus-width = <8>;
701			hsync-active = <0>;
702			vsync-active = <0>;
703		};
704	};
705};
706