1/* 2 * Device Tree Source for AM4372 SoC 3 * 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13 14#include "skeleton.dtsi" 15 16/ { 17 compatible = "ti,am4372", "ti,am43"; 18 interrupt-parent = <&wakeupgen>; 19 20 21 aliases { 22 i2c0 = &i2c0; 23 i2c1 = &i2c1; 24 i2c2 = &i2c2; 25 serial0 = &uart0; 26 ethernet0 = &cpsw_emac0; 27 ethernet1 = &cpsw_emac1; 28 spi0 = &qspi; 29 }; 30 31 cpus { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 cpu: cpu@0 { 35 compatible = "arm,cortex-a9"; 36 device_type = "cpu"; 37 reg = <0>; 38 39 clocks = <&dpll_mpu_ck>; 40 clock-names = "cpu"; 41 42 clock-latency = <300000>; /* From omap-cpufreq driver */ 43 }; 44 }; 45 46 gic: interrupt-controller@48241000 { 47 compatible = "arm,cortex-a9-gic"; 48 interrupt-controller; 49 #interrupt-cells = <3>; 50 reg = <0x48241000 0x1000>, 51 <0x48240100 0x0100>; 52 interrupt-parent = <&gic>; 53 }; 54 55 wakeupgen: interrupt-controller@48281000 { 56 compatible = "ti,omap4-wugen-mpu"; 57 interrupt-controller; 58 #interrupt-cells = <3>; 59 reg = <0x48281000 0x1000>; 60 interrupt-parent = <&gic>; 61 }; 62 63 l2-cache-controller@48242000 { 64 compatible = "arm,pl310-cache"; 65 reg = <0x48242000 0x1000>; 66 cache-unified; 67 cache-level = <2>; 68 }; 69 70 ocp { 71 compatible = "ti,am4372-l3-noc", "simple-bus"; 72 #address-cells = <1>; 73 #size-cells = <1>; 74 ranges; 75 ti,hwmods = "l3_main"; 76 reg = <0x44000000 0x400000 77 0x44800000 0x400000>; 78 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 79 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 80 81 l4_wkup: l4_wkup@44c00000 { 82 compatible = "ti,am4-l4-wkup", "simple-bus"; 83 #address-cells = <1>; 84 #size-cells = <1>; 85 ranges = <0 0x44c00000 0x287000>; 86 87 prcm: prcm@1f0000 { 88 compatible = "ti,am4-prcm"; 89 reg = <0x1f0000 0x11000>; 90 91 prcm_clocks: clocks { 92 #address-cells = <1>; 93 #size-cells = <0>; 94 }; 95 96 prcm_clockdomains: clockdomains { 97 }; 98 }; 99 100 scm: scm@210000 { 101 compatible = "ti,am4-scm", "simple-bus"; 102 reg = <0x210000 0x4000>; 103 #address-cells = <1>; 104 #size-cells = <1>; 105 ranges = <0 0x210000 0x4000>; 106 107 am43xx_pinmux: pinmux@800 { 108 compatible = "ti,am437-padconf", 109 "pinctrl-single"; 110 reg = <0x800 0x31c>; 111 #address-cells = <1>; 112 #size-cells = <0>; 113 #interrupt-cells = <1>; 114 interrupt-controller; 115 pinctrl-single,register-width = <32>; 116 pinctrl-single,function-mask = <0xffffffff>; 117 }; 118 119 scm_conf: scm_conf@0 { 120 compatible = "syscon"; 121 reg = <0x0 0x800>; 122 #address-cells = <1>; 123 #size-cells = <1>; 124 125 scm_clocks: clocks { 126 #address-cells = <1>; 127 #size-cells = <0>; 128 }; 129 }; 130 131 scm_clockdomains: clockdomains { 132 }; 133 }; 134 }; 135 136 emif: emif@4c000000 { 137 compatible = "ti,emif-am4372"; 138 reg = <0x4c000000 0x1000000>; 139 ti,hwmods = "emif"; 140 }; 141 142 edma: edma@49000000 { 143 compatible = "ti,edma3"; 144 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; 145 reg = <0x49000000 0x10000>, 146 <0x44e10f90 0x10>; 147 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 148 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 149 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 150 #dma-cells = <1>; 151 }; 152 153 uart0: serial@44e09000 { 154 compatible = "ti,am4372-uart","ti,omap2-uart"; 155 reg = <0x44e09000 0x2000>; 156 reg-shift = <2>; 157 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 158 ti,hwmods = "uart1"; 159 }; 160 161 uart1: serial@48022000 { 162 compatible = "ti,am4372-uart","ti,omap2-uart"; 163 reg = <0x48022000 0x2000>; 164 reg-shift = <2>; 165 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 166 ti,hwmods = "uart2"; 167 status = "disabled"; 168 }; 169 170 uart2: serial@48024000 { 171 compatible = "ti,am4372-uart","ti,omap2-uart"; 172 reg = <0x48024000 0x2000>; 173 reg-shift = <2>; 174 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 175 ti,hwmods = "uart3"; 176 status = "disabled"; 177 }; 178 179 uart3: serial@481a6000 { 180 compatible = "ti,am4372-uart","ti,omap2-uart"; 181 reg = <0x481a6000 0x2000>; 182 reg-shift = <2>; 183 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 184 ti,hwmods = "uart4"; 185 status = "disabled"; 186 }; 187 188 uart4: serial@481a8000 { 189 compatible = "ti,am4372-uart","ti,omap2-uart"; 190 reg = <0x481a8000 0x2000>; 191 reg-shift = <2>; 192 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 193 ti,hwmods = "uart5"; 194 status = "disabled"; 195 }; 196 197 uart5: serial@481aa000 { 198 compatible = "ti,am4372-uart","ti,omap2-uart"; 199 reg = <0x481aa000 0x2000>; 200 reg-shift = <2>; 201 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 202 ti,hwmods = "uart6"; 203 status = "disabled"; 204 }; 205 206 mailbox: mailbox@480C8000 { 207 compatible = "ti,omap4-mailbox"; 208 reg = <0x480C8000 0x200>; 209 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 210 ti,hwmods = "mailbox"; 211 #mbox-cells = <1>; 212 ti,mbox-num-users = <4>; 213 ti,mbox-num-fifos = <8>; 214 mbox_wkupm3: wkup_m3 { 215 ti,mbox-tx = <0 0 0>; 216 ti,mbox-rx = <0 0 3>; 217 }; 218 }; 219 220 timer1: timer@44e31000 { 221 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 222 reg = <0x44e31000 0x400>; 223 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 224 ti,timer-alwon; 225 ti,hwmods = "timer1"; 226 }; 227 228 timer2: timer@48040000 { 229 compatible = "ti,am4372-timer","ti,am335x-timer"; 230 reg = <0x48040000 0x400>; 231 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 232 ti,hwmods = "timer2"; 233 }; 234 235 timer3: timer@48042000 { 236 compatible = "ti,am4372-timer","ti,am335x-timer"; 237 reg = <0x48042000 0x400>; 238 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 239 ti,hwmods = "timer3"; 240 status = "disabled"; 241 }; 242 243 timer4: timer@48044000 { 244 compatible = "ti,am4372-timer","ti,am335x-timer"; 245 reg = <0x48044000 0x400>; 246 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 247 ti,timer-pwm; 248 ti,hwmods = "timer4"; 249 status = "disabled"; 250 }; 251 252 timer5: timer@48046000 { 253 compatible = "ti,am4372-timer","ti,am335x-timer"; 254 reg = <0x48046000 0x400>; 255 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 256 ti,timer-pwm; 257 ti,hwmods = "timer5"; 258 status = "disabled"; 259 }; 260 261 timer6: timer@48048000 { 262 compatible = "ti,am4372-timer","ti,am335x-timer"; 263 reg = <0x48048000 0x400>; 264 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 265 ti,timer-pwm; 266 ti,hwmods = "timer6"; 267 status = "disabled"; 268 }; 269 270 timer7: timer@4804a000 { 271 compatible = "ti,am4372-timer","ti,am335x-timer"; 272 reg = <0x4804a000 0x400>; 273 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 274 ti,timer-pwm; 275 ti,hwmods = "timer7"; 276 status = "disabled"; 277 }; 278 279 timer8: timer@481c1000 { 280 compatible = "ti,am4372-timer","ti,am335x-timer"; 281 reg = <0x481c1000 0x400>; 282 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 283 ti,hwmods = "timer8"; 284 status = "disabled"; 285 }; 286 287 timer9: timer@4833d000 { 288 compatible = "ti,am4372-timer","ti,am335x-timer"; 289 reg = <0x4833d000 0x400>; 290 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 291 ti,hwmods = "timer9"; 292 status = "disabled"; 293 }; 294 295 timer10: timer@4833f000 { 296 compatible = "ti,am4372-timer","ti,am335x-timer"; 297 reg = <0x4833f000 0x400>; 298 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 299 ti,hwmods = "timer10"; 300 status = "disabled"; 301 }; 302 303 timer11: timer@48341000 { 304 compatible = "ti,am4372-timer","ti,am335x-timer"; 305 reg = <0x48341000 0x400>; 306 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 307 ti,hwmods = "timer11"; 308 status = "disabled"; 309 }; 310 311 counter32k: counter@44e86000 { 312 compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 313 reg = <0x44e86000 0x40>; 314 ti,hwmods = "counter_32k"; 315 }; 316 317 rtc: rtc@44e3e000 { 318 compatible = "ti,am4372-rtc","ti,da830-rtc"; 319 reg = <0x44e3e000 0x1000>; 320 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 321 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 322 ti,hwmods = "rtc"; 323 status = "disabled"; 324 }; 325 326 wdt: wdt@44e35000 { 327 compatible = "ti,am4372-wdt","ti,omap3-wdt"; 328 reg = <0x44e35000 0x1000>; 329 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 330 ti,hwmods = "wd_timer2"; 331 }; 332 333 gpio0: gpio@44e07000 { 334 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 335 reg = <0x44e07000 0x1000>; 336 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 337 gpio-controller; 338 #gpio-cells = <2>; 339 interrupt-controller; 340 #interrupt-cells = <2>; 341 ti,hwmods = "gpio1"; 342 status = "disabled"; 343 }; 344 345 gpio1: gpio@4804c000 { 346 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 347 reg = <0x4804c000 0x1000>; 348 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 349 gpio-controller; 350 #gpio-cells = <2>; 351 interrupt-controller; 352 #interrupt-cells = <2>; 353 ti,hwmods = "gpio2"; 354 status = "disabled"; 355 }; 356 357 gpio2: gpio@481ac000 { 358 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 359 reg = <0x481ac000 0x1000>; 360 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 361 gpio-controller; 362 #gpio-cells = <2>; 363 interrupt-controller; 364 #interrupt-cells = <2>; 365 ti,hwmods = "gpio3"; 366 status = "disabled"; 367 }; 368 369 gpio3: gpio@481ae000 { 370 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 371 reg = <0x481ae000 0x1000>; 372 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 373 gpio-controller; 374 #gpio-cells = <2>; 375 interrupt-controller; 376 #interrupt-cells = <2>; 377 ti,hwmods = "gpio4"; 378 status = "disabled"; 379 }; 380 381 gpio4: gpio@48320000 { 382 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 383 reg = <0x48320000 0x1000>; 384 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 385 gpio-controller; 386 #gpio-cells = <2>; 387 interrupt-controller; 388 #interrupt-cells = <2>; 389 ti,hwmods = "gpio5"; 390 status = "disabled"; 391 }; 392 393 gpio5: gpio@48322000 { 394 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 395 reg = <0x48322000 0x1000>; 396 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 397 gpio-controller; 398 #gpio-cells = <2>; 399 interrupt-controller; 400 #interrupt-cells = <2>; 401 ti,hwmods = "gpio6"; 402 status = "disabled"; 403 }; 404 405 hwspinlock: spinlock@480ca000 { 406 compatible = "ti,omap4-hwspinlock"; 407 reg = <0x480ca000 0x1000>; 408 ti,hwmods = "spinlock"; 409 #hwlock-cells = <1>; 410 }; 411 412 i2c0: i2c@44e0b000 { 413 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 414 reg = <0x44e0b000 0x1000>; 415 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 416 ti,hwmods = "i2c1"; 417 #address-cells = <1>; 418 #size-cells = <0>; 419 status = "disabled"; 420 }; 421 422 i2c1: i2c@4802a000 { 423 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 424 reg = <0x4802a000 0x1000>; 425 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 426 ti,hwmods = "i2c2"; 427 #address-cells = <1>; 428 #size-cells = <0>; 429 status = "disabled"; 430 }; 431 432 i2c2: i2c@4819c000 { 433 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 434 reg = <0x4819c000 0x1000>; 435 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 436 ti,hwmods = "i2c3"; 437 #address-cells = <1>; 438 #size-cells = <0>; 439 status = "disabled"; 440 }; 441 442 spi0: spi@48030000 { 443 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 444 reg = <0x48030000 0x400>; 445 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 446 ti,hwmods = "spi0"; 447 #address-cells = <1>; 448 #size-cells = <0>; 449 status = "disabled"; 450 }; 451 452 mmc1: mmc@48060000 { 453 compatible = "ti,omap4-hsmmc"; 454 reg = <0x48060000 0x1000>; 455 ti,hwmods = "mmc1"; 456 ti,dual-volt; 457 ti,needs-special-reset; 458 dmas = <&edma 24 459 &edma 25>; 460 dma-names = "tx", "rx"; 461 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 462 status = "disabled"; 463 }; 464 465 mmc2: mmc@481d8000 { 466 compatible = "ti,omap4-hsmmc"; 467 reg = <0x481d8000 0x1000>; 468 ti,hwmods = "mmc2"; 469 ti,needs-special-reset; 470 dmas = <&edma 2 471 &edma 3>; 472 dma-names = "tx", "rx"; 473 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 474 status = "disabled"; 475 }; 476 477 mmc3: mmc@47810000 { 478 compatible = "ti,omap4-hsmmc"; 479 reg = <0x47810000 0x1000>; 480 ti,hwmods = "mmc3"; 481 ti,needs-special-reset; 482 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 483 status = "disabled"; 484 }; 485 486 spi1: spi@481a0000 { 487 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 488 reg = <0x481a0000 0x400>; 489 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 490 ti,hwmods = "spi1"; 491 #address-cells = <1>; 492 #size-cells = <0>; 493 status = "disabled"; 494 }; 495 496 spi2: spi@481a2000 { 497 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 498 reg = <0x481a2000 0x400>; 499 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 500 ti,hwmods = "spi2"; 501 #address-cells = <1>; 502 #size-cells = <0>; 503 status = "disabled"; 504 }; 505 506 spi3: spi@481a4000 { 507 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 508 reg = <0x481a4000 0x400>; 509 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 510 ti,hwmods = "spi3"; 511 #address-cells = <1>; 512 #size-cells = <0>; 513 status = "disabled"; 514 }; 515 516 spi4: spi@48345000 { 517 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 518 reg = <0x48345000 0x400>; 519 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 520 ti,hwmods = "spi4"; 521 #address-cells = <1>; 522 #size-cells = <0>; 523 status = "disabled"; 524 }; 525 526 mac: ethernet@4a100000 { 527 compatible = "ti,am4372-cpsw","ti,cpsw"; 528 reg = <0x4a100000 0x800 529 0x4a101200 0x100>; 530 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 533 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 534 #address-cells = <1>; 535 #size-cells = <1>; 536 ti,hwmods = "cpgmac0"; 537 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 538 clock-names = "fck", "cpts"; 539 status = "disabled"; 540 cpdma_channels = <8>; 541 ale_entries = <1024>; 542 bd_ram_size = <0x2000>; 543 no_bd_ram = <0>; 544 rx_descs = <64>; 545 mac_control = <0x20>; 546 slaves = <2>; 547 active_slave = <0>; 548 cpts_clock_mult = <0x80000000>; 549 cpts_clock_shift = <29>; 550 syscon = <&scm_conf>; 551 ranges; 552 553 davinci_mdio: mdio@4a101000 { 554 compatible = "ti,am4372-mdio","ti,davinci_mdio"; 555 reg = <0x4a101000 0x100>; 556 #address-cells = <1>; 557 #size-cells = <0>; 558 ti,hwmods = "davinci_mdio"; 559 bus_freq = <1000000>; 560 status = "disabled"; 561 }; 562 563 cpsw_emac0: slave@4a100200 { 564 /* Filled in by U-Boot */ 565 mac-address = [ 00 00 00 00 00 00 ]; 566 }; 567 568 cpsw_emac1: slave@4a100300 { 569 /* Filled in by U-Boot */ 570 mac-address = [ 00 00 00 00 00 00 ]; 571 }; 572 573 phy_sel: cpsw-phy-sel@44e10650 { 574 compatible = "ti,am43xx-cpsw-phy-sel"; 575 reg= <0x44e10650 0x4>; 576 reg-names = "gmii-sel"; 577 }; 578 }; 579 580 epwmss0: epwmss@48300000 { 581 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 582 reg = <0x48300000 0x10>; 583 #address-cells = <1>; 584 #size-cells = <1>; 585 ranges; 586 ti,hwmods = "epwmss0"; 587 status = "disabled"; 588 589 ecap0: ecap@48300100 { 590 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 591 #pwm-cells = <3>; 592 reg = <0x48300100 0x80>; 593 ti,hwmods = "ecap0"; 594 status = "disabled"; 595 }; 596 597 ehrpwm0: ehrpwm@48300200 { 598 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 599 #pwm-cells = <3>; 600 reg = <0x48300200 0x80>; 601 ti,hwmods = "ehrpwm0"; 602 status = "disabled"; 603 }; 604 }; 605 606 epwmss1: epwmss@48302000 { 607 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 608 reg = <0x48302000 0x10>; 609 #address-cells = <1>; 610 #size-cells = <1>; 611 ranges; 612 ti,hwmods = "epwmss1"; 613 status = "disabled"; 614 615 ecap1: ecap@48302100 { 616 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 617 #pwm-cells = <3>; 618 reg = <0x48302100 0x80>; 619 ti,hwmods = "ecap1"; 620 status = "disabled"; 621 }; 622 623 ehrpwm1: ehrpwm@48302200 { 624 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 625 #pwm-cells = <3>; 626 reg = <0x48302200 0x80>; 627 ti,hwmods = "ehrpwm1"; 628 status = "disabled"; 629 }; 630 }; 631 632 epwmss2: epwmss@48304000 { 633 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 634 reg = <0x48304000 0x10>; 635 #address-cells = <1>; 636 #size-cells = <1>; 637 ranges; 638 ti,hwmods = "epwmss2"; 639 status = "disabled"; 640 641 ecap2: ecap@48304100 { 642 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 643 #pwm-cells = <3>; 644 reg = <0x48304100 0x80>; 645 ti,hwmods = "ecap2"; 646 status = "disabled"; 647 }; 648 649 ehrpwm2: ehrpwm@48304200 { 650 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 651 #pwm-cells = <3>; 652 reg = <0x48304200 0x80>; 653 ti,hwmods = "ehrpwm2"; 654 status = "disabled"; 655 }; 656 }; 657 658 epwmss3: epwmss@48306000 { 659 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 660 reg = <0x48306000 0x10>; 661 #address-cells = <1>; 662 #size-cells = <1>; 663 ranges; 664 ti,hwmods = "epwmss3"; 665 status = "disabled"; 666 667 ehrpwm3: ehrpwm@48306200 { 668 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 669 #pwm-cells = <3>; 670 reg = <0x48306200 0x80>; 671 ti,hwmods = "ehrpwm3"; 672 status = "disabled"; 673 }; 674 }; 675 676 epwmss4: epwmss@48308000 { 677 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 678 reg = <0x48308000 0x10>; 679 #address-cells = <1>; 680 #size-cells = <1>; 681 ranges; 682 ti,hwmods = "epwmss4"; 683 status = "disabled"; 684 685 ehrpwm4: ehrpwm@48308200 { 686 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 687 #pwm-cells = <3>; 688 reg = <0x48308200 0x80>; 689 ti,hwmods = "ehrpwm4"; 690 status = "disabled"; 691 }; 692 }; 693 694 epwmss5: epwmss@4830a000 { 695 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 696 reg = <0x4830a000 0x10>; 697 #address-cells = <1>; 698 #size-cells = <1>; 699 ranges; 700 ti,hwmods = "epwmss5"; 701 status = "disabled"; 702 703 ehrpwm5: ehrpwm@4830a200 { 704 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 705 #pwm-cells = <3>; 706 reg = <0x4830a200 0x80>; 707 ti,hwmods = "ehrpwm5"; 708 status = "disabled"; 709 }; 710 }; 711 712 tscadc: tscadc@44e0d000 { 713 compatible = "ti,am3359-tscadc"; 714 reg = <0x44e0d000 0x1000>; 715 ti,hwmods = "adc_tsc"; 716 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 717 clocks = <&adc_tsc_fck>; 718 clock-names = "fck"; 719 status = "disabled"; 720 721 tsc { 722 compatible = "ti,am3359-tsc"; 723 }; 724 725 adc { 726 #io-channel-cells = <1>; 727 compatible = "ti,am3359-adc"; 728 }; 729 730 }; 731 732 sham: sham@53100000 { 733 compatible = "ti,omap5-sham"; 734 ti,hwmods = "sham"; 735 reg = <0x53100000 0x300>; 736 dmas = <&edma 36>; 737 dma-names = "rx"; 738 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 739 }; 740 741 aes: aes@53501000 { 742 compatible = "ti,omap4-aes"; 743 ti,hwmods = "aes"; 744 reg = <0x53501000 0xa0>; 745 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 746 dmas = <&edma 6 747 &edma 5>; 748 dma-names = "tx", "rx"; 749 }; 750 751 des: des@53701000 { 752 compatible = "ti,omap4-des"; 753 ti,hwmods = "des"; 754 reg = <0x53701000 0xa0>; 755 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 756 dmas = <&edma 34 757 &edma 33>; 758 dma-names = "tx", "rx"; 759 }; 760 761 mcasp0: mcasp@48038000 { 762 compatible = "ti,am33xx-mcasp-audio"; 763 ti,hwmods = "mcasp0"; 764 reg = <0x48038000 0x2000>, 765 <0x46000000 0x400000>; 766 reg-names = "mpu", "dat"; 767 interrupts = <80>, <81>; 768 interrupt-names = "tx", "rx"; 769 status = "disabled"; 770 dmas = <&edma 8>, 771 <&edma 9>; 772 dma-names = "tx", "rx"; 773 }; 774 775 mcasp1: mcasp@4803C000 { 776 compatible = "ti,am33xx-mcasp-audio"; 777 ti,hwmods = "mcasp1"; 778 reg = <0x4803C000 0x2000>, 779 <0x46400000 0x400000>; 780 reg-names = "mpu", "dat"; 781 interrupts = <82>, <83>; 782 interrupt-names = "tx", "rx"; 783 status = "disabled"; 784 dmas = <&edma 10>, 785 <&edma 11>; 786 dma-names = "tx", "rx"; 787 }; 788 789 elm: elm@48080000 { 790 compatible = "ti,am3352-elm"; 791 reg = <0x48080000 0x2000>; 792 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 793 ti,hwmods = "elm"; 794 clocks = <&l4ls_gclk>; 795 clock-names = "fck"; 796 status = "disabled"; 797 }; 798 799 gpmc: gpmc@50000000 { 800 compatible = "ti,am3352-gpmc"; 801 ti,hwmods = "gpmc"; 802 clocks = <&l3s_gclk>; 803 clock-names = "fck"; 804 reg = <0x50000000 0x2000>; 805 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 806 gpmc,num-cs = <7>; 807 gpmc,num-waitpins = <2>; 808 #address-cells = <2>; 809 #size-cells = <1>; 810 status = "disabled"; 811 }; 812 813 am43xx_control_usb2phy1: control-phy@44e10620 { 814 compatible = "ti,control-phy-usb2-am437"; 815 reg = <0x44e10620 0x4>; 816 reg-names = "power"; 817 }; 818 819 am43xx_control_usb2phy2: control-phy@0x44e10628 { 820 compatible = "ti,control-phy-usb2-am437"; 821 reg = <0x44e10628 0x4>; 822 reg-names = "power"; 823 }; 824 825 ocp2scp0: ocp2scp@483a8000 { 826 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 827 #address-cells = <1>; 828 #size-cells = <1>; 829 ranges; 830 ti,hwmods = "ocp2scp0"; 831 832 usb2_phy1: phy@483a8000 { 833 compatible = "ti,am437x-usb2"; 834 reg = <0x483a8000 0x8000>; 835 ctrl-module = <&am43xx_control_usb2phy1>; 836 clocks = <&usb_phy0_always_on_clk32k>, 837 <&usb_otg_ss0_refclk960m>; 838 clock-names = "wkupclk", "refclk"; 839 #phy-cells = <0>; 840 status = "disabled"; 841 }; 842 }; 843 844 ocp2scp1: ocp2scp@483e8000 { 845 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 846 #address-cells = <1>; 847 #size-cells = <1>; 848 ranges; 849 ti,hwmods = "ocp2scp1"; 850 851 usb2_phy2: phy@483e8000 { 852 compatible = "ti,am437x-usb2"; 853 reg = <0x483e8000 0x8000>; 854 ctrl-module = <&am43xx_control_usb2phy2>; 855 clocks = <&usb_phy1_always_on_clk32k>, 856 <&usb_otg_ss1_refclk960m>; 857 clock-names = "wkupclk", "refclk"; 858 #phy-cells = <0>; 859 status = "disabled"; 860 }; 861 }; 862 863 dwc3_1: omap_dwc3@48380000 { 864 compatible = "ti,am437x-dwc3"; 865 ti,hwmods = "usb_otg_ss0"; 866 reg = <0x48380000 0x10000>; 867 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 868 #address-cells = <1>; 869 #size-cells = <1>; 870 utmi-mode = <1>; 871 ranges; 872 873 usb1: usb@48390000 { 874 compatible = "synopsys,dwc3"; 875 reg = <0x48390000 0x10000>; 876 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 877 phys = <&usb2_phy1>; 878 phy-names = "usb2-phy"; 879 maximum-speed = "high-speed"; 880 dr_mode = "otg"; 881 status = "disabled"; 882 snps,dis_u3_susphy_quirk; 883 snps,dis_u2_susphy_quirk; 884 }; 885 }; 886 887 dwc3_2: omap_dwc3@483c0000 { 888 compatible = "ti,am437x-dwc3"; 889 ti,hwmods = "usb_otg_ss1"; 890 reg = <0x483c0000 0x10000>; 891 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 892 #address-cells = <1>; 893 #size-cells = <1>; 894 utmi-mode = <1>; 895 ranges; 896 897 usb2: usb@483d0000 { 898 compatible = "synopsys,dwc3"; 899 reg = <0x483d0000 0x10000>; 900 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 901 phys = <&usb2_phy2>; 902 phy-names = "usb2-phy"; 903 maximum-speed = "high-speed"; 904 dr_mode = "otg"; 905 status = "disabled"; 906 snps,dis_u3_susphy_quirk; 907 snps,dis_u2_susphy_quirk; 908 }; 909 }; 910 911 qspi: qspi@47900000 { 912 compatible = "ti,am4372-qspi"; 913 reg = <0x47900000 0x100>, 914 <0x30000000 0x4000000>; 915 reg-names = "qspi_base", "qspi_mmap"; 916 #address-cells = <1>; 917 #size-cells = <0>; 918 ti,hwmods = "qspi"; 919 interrupts = <0 138 0x4>; 920 num-cs = <4>; 921 status = "disabled"; 922 }; 923 924 hdq: hdq@48347000 { 925 compatible = "ti,am4372-hdq"; 926 reg = <0x48347000 0x1000>; 927 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 928 clocks = <&func_12m_clk>; 929 clock-names = "fck"; 930 ti,hwmods = "hdq1w"; 931 status = "disabled"; 932 }; 933 934 dss: dss@4832a000 { 935 compatible = "ti,omap3-dss"; 936 reg = <0x4832a000 0x200>; 937 status = "disabled"; 938 ti,hwmods = "dss_core"; 939 clocks = <&disp_clk>; 940 clock-names = "fck"; 941 #address-cells = <1>; 942 #size-cells = <1>; 943 ranges; 944 945 dispc: dispc@4832a400 { 946 compatible = "ti,omap3-dispc"; 947 reg = <0x4832a400 0x400>; 948 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 949 ti,hwmods = "dss_dispc"; 950 clocks = <&disp_clk>; 951 clock-names = "fck"; 952 }; 953 954 rfbi: rfbi@4832a800 { 955 compatible = "ti,omap3-rfbi"; 956 reg = <0x4832a800 0x100>; 957 ti,hwmods = "dss_rfbi"; 958 clocks = <&disp_clk>; 959 clock-names = "fck"; 960 status = "disabled"; 961 }; 962 }; 963 964 ocmcram: ocmcram@40300000 { 965 compatible = "mmio-sram"; 966 reg = <0x40300000 0x40000>; /* 256k */ 967 }; 968 969 dcan0: can@481cc000 { 970 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 971 ti,hwmods = "d_can0"; 972 clocks = <&dcan0_fck>; 973 clock-names = "fck"; 974 reg = <0x481cc000 0x2000>; 975 syscon-raminit = <&scm_conf 0x644 0>; 976 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 977 status = "disabled"; 978 }; 979 980 dcan1: can@481d0000 { 981 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 982 ti,hwmods = "d_can1"; 983 clocks = <&dcan1_fck>; 984 clock-names = "fck"; 985 reg = <0x481d0000 0x2000>; 986 syscon-raminit = <&scm_conf 0x644 1>; 987 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 988 status = "disabled"; 989 }; 990 991 vpfe0: vpfe@48326000 { 992 compatible = "ti,am437x-vpfe"; 993 reg = <0x48326000 0x2000>; 994 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 995 ti,hwmods = "vpfe0"; 996 status = "disabled"; 997 }; 998 999 vpfe1: vpfe@48328000 { 1000 compatible = "ti,am437x-vpfe"; 1001 reg = <0x48328000 0x2000>; 1002 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 1003 ti,hwmods = "vpfe1"; 1004 status = "disabled"; 1005 }; 1006 }; 1007}; 1008 1009/include/ "am43xx-clocks.dtsi" 1010