1/* 2 * Device Tree Source for AM4372 SoC 3 * 4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This file is licensed under the terms of the GNU General Public License 7 * version 2. This program is licensed "as is" without any warranty of any 8 * kind, whether express or implied. 9 */ 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13 14#include "skeleton.dtsi" 15 16/ { 17 compatible = "ti,am4372", "ti,am43"; 18 interrupt-parent = <&wakeupgen>; 19 20 21 aliases { 22 i2c0 = &i2c0; 23 i2c1 = &i2c1; 24 i2c2 = &i2c2; 25 serial0 = &uart0; 26 ethernet0 = &cpsw_emac0; 27 ethernet1 = &cpsw_emac1; 28 }; 29 30 cpus { 31 #address-cells = <1>; 32 #size-cells = <0>; 33 cpu: cpu@0 { 34 compatible = "arm,cortex-a9"; 35 device_type = "cpu"; 36 reg = <0>; 37 38 clocks = <&dpll_mpu_ck>; 39 clock-names = "cpu"; 40 41 clock-latency = <300000>; /* From omap-cpufreq driver */ 42 }; 43 }; 44 45 gic: interrupt-controller@48241000 { 46 compatible = "arm,cortex-a9-gic"; 47 interrupt-controller; 48 #interrupt-cells = <3>; 49 reg = <0x48241000 0x1000>, 50 <0x48240100 0x0100>; 51 interrupt-parent = <&gic>; 52 }; 53 54 wakeupgen: interrupt-controller@48281000 { 55 compatible = "ti,omap4-wugen-mpu"; 56 interrupt-controller; 57 #interrupt-cells = <3>; 58 reg = <0x48281000 0x1000>; 59 interrupt-parent = <&gic>; 60 }; 61 62 l2-cache-controller@48242000 { 63 compatible = "arm,pl310-cache"; 64 reg = <0x48242000 0x1000>; 65 cache-unified; 66 cache-level = <2>; 67 }; 68 69 ocp { 70 compatible = "ti,am4372-l3-noc", "simple-bus"; 71 #address-cells = <1>; 72 #size-cells = <1>; 73 ranges; 74 ti,hwmods = "l3_main"; 75 reg = <0x44000000 0x400000 76 0x44800000 0x400000>; 77 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 78 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 79 80 l4_wkup: l4_wkup@44c00000 { 81 compatible = "ti,am4-l4-wkup", "simple-bus"; 82 #address-cells = <1>; 83 #size-cells = <1>; 84 ranges = <0 0x44c00000 0x287000>; 85 86 prcm: prcm@1f0000 { 87 compatible = "ti,am4-prcm"; 88 reg = <0x1f0000 0x11000>; 89 90 prcm_clocks: clocks { 91 #address-cells = <1>; 92 #size-cells = <0>; 93 }; 94 95 prcm_clockdomains: clockdomains { 96 }; 97 }; 98 99 scm: scm@210000 { 100 compatible = "ti,am4-scm", "simple-bus"; 101 reg = <0x210000 0x4000>; 102 #address-cells = <1>; 103 #size-cells = <1>; 104 ranges = <0 0x210000 0x4000>; 105 106 am43xx_pinmux: pinmux@800 { 107 compatible = "ti,am437-padconf", 108 "pinctrl-single"; 109 reg = <0x800 0x31c>; 110 #address-cells = <1>; 111 #size-cells = <0>; 112 #interrupt-cells = <1>; 113 interrupt-controller; 114 pinctrl-single,register-width = <32>; 115 pinctrl-single,function-mask = <0xffffffff>; 116 }; 117 118 scm_conf: scm_conf@0 { 119 compatible = "syscon"; 120 reg = <0x0 0x800>; 121 #address-cells = <1>; 122 #size-cells = <1>; 123 124 scm_clocks: clocks { 125 #address-cells = <1>; 126 #size-cells = <0>; 127 }; 128 }; 129 130 scm_clockdomains: clockdomains { 131 }; 132 }; 133 }; 134 135 emif: emif@4c000000 { 136 compatible = "ti,emif-am4372"; 137 reg = <0x4c000000 0x1000000>; 138 ti,hwmods = "emif"; 139 }; 140 141 edma: edma@49000000 { 142 compatible = "ti,edma3"; 143 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; 144 reg = <0x49000000 0x10000>, 145 <0x44e10f90 0x10>; 146 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, 147 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, 148 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 149 #dma-cells = <1>; 150 }; 151 152 uart0: serial@44e09000 { 153 compatible = "ti,am4372-uart","ti,omap2-uart"; 154 reg = <0x44e09000 0x2000>; 155 reg-shift = <2>; 156 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; 157 ti,hwmods = "uart1"; 158 }; 159 160 uart1: serial@48022000 { 161 compatible = "ti,am4372-uart","ti,omap2-uart"; 162 reg = <0x48022000 0x2000>; 163 reg-shift = <2>; 164 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 165 ti,hwmods = "uart2"; 166 status = "disabled"; 167 }; 168 169 uart2: serial@48024000 { 170 compatible = "ti,am4372-uart","ti,omap2-uart"; 171 reg = <0x48024000 0x2000>; 172 reg-shift = <2>; 173 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; 174 ti,hwmods = "uart3"; 175 status = "disabled"; 176 }; 177 178 uart3: serial@481a6000 { 179 compatible = "ti,am4372-uart","ti,omap2-uart"; 180 reg = <0x481a6000 0x2000>; 181 reg-shift = <2>; 182 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 183 ti,hwmods = "uart4"; 184 status = "disabled"; 185 }; 186 187 uart4: serial@481a8000 { 188 compatible = "ti,am4372-uart","ti,omap2-uart"; 189 reg = <0x481a8000 0x2000>; 190 reg-shift = <2>; 191 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 192 ti,hwmods = "uart5"; 193 status = "disabled"; 194 }; 195 196 uart5: serial@481aa000 { 197 compatible = "ti,am4372-uart","ti,omap2-uart"; 198 reg = <0x481aa000 0x2000>; 199 reg-shift = <2>; 200 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 201 ti,hwmods = "uart6"; 202 status = "disabled"; 203 }; 204 205 mailbox: mailbox@480C8000 { 206 compatible = "ti,omap4-mailbox"; 207 reg = <0x480C8000 0x200>; 208 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; 209 ti,hwmods = "mailbox"; 210 #mbox-cells = <1>; 211 ti,mbox-num-users = <4>; 212 ti,mbox-num-fifos = <8>; 213 mbox_wkupm3: wkup_m3 { 214 ti,mbox-tx = <0 0 0>; 215 ti,mbox-rx = <0 0 3>; 216 }; 217 }; 218 219 timer1: timer@44e31000 { 220 compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms"; 221 reg = <0x44e31000 0x400>; 222 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; 223 ti,timer-alwon; 224 ti,hwmods = "timer1"; 225 }; 226 227 timer2: timer@48040000 { 228 compatible = "ti,am4372-timer","ti,am335x-timer"; 229 reg = <0x48040000 0x400>; 230 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 231 ti,hwmods = "timer2"; 232 }; 233 234 timer3: timer@48042000 { 235 compatible = "ti,am4372-timer","ti,am335x-timer"; 236 reg = <0x48042000 0x400>; 237 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 238 ti,hwmods = "timer3"; 239 status = "disabled"; 240 }; 241 242 timer4: timer@48044000 { 243 compatible = "ti,am4372-timer","ti,am335x-timer"; 244 reg = <0x48044000 0x400>; 245 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 246 ti,timer-pwm; 247 ti,hwmods = "timer4"; 248 status = "disabled"; 249 }; 250 251 timer5: timer@48046000 { 252 compatible = "ti,am4372-timer","ti,am335x-timer"; 253 reg = <0x48046000 0x400>; 254 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 255 ti,timer-pwm; 256 ti,hwmods = "timer5"; 257 status = "disabled"; 258 }; 259 260 timer6: timer@48048000 { 261 compatible = "ti,am4372-timer","ti,am335x-timer"; 262 reg = <0x48048000 0x400>; 263 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 264 ti,timer-pwm; 265 ti,hwmods = "timer6"; 266 status = "disabled"; 267 }; 268 269 timer7: timer@4804a000 { 270 compatible = "ti,am4372-timer","ti,am335x-timer"; 271 reg = <0x4804a000 0x400>; 272 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 273 ti,timer-pwm; 274 ti,hwmods = "timer7"; 275 status = "disabled"; 276 }; 277 278 timer8: timer@481c1000 { 279 compatible = "ti,am4372-timer","ti,am335x-timer"; 280 reg = <0x481c1000 0x400>; 281 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; 282 ti,hwmods = "timer8"; 283 status = "disabled"; 284 }; 285 286 timer9: timer@4833d000 { 287 compatible = "ti,am4372-timer","ti,am335x-timer"; 288 reg = <0x4833d000 0x400>; 289 interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; 290 ti,hwmods = "timer9"; 291 status = "disabled"; 292 }; 293 294 timer10: timer@4833f000 { 295 compatible = "ti,am4372-timer","ti,am335x-timer"; 296 reg = <0x4833f000 0x400>; 297 interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 298 ti,hwmods = "timer10"; 299 status = "disabled"; 300 }; 301 302 timer11: timer@48341000 { 303 compatible = "ti,am4372-timer","ti,am335x-timer"; 304 reg = <0x48341000 0x400>; 305 interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>; 306 ti,hwmods = "timer11"; 307 status = "disabled"; 308 }; 309 310 counter32k: counter@44e86000 { 311 compatible = "ti,am4372-counter32k","ti,omap-counter32k"; 312 reg = <0x44e86000 0x40>; 313 ti,hwmods = "counter_32k"; 314 }; 315 316 rtc: rtc@44e3e000 { 317 compatible = "ti,am4372-rtc","ti,da830-rtc"; 318 reg = <0x44e3e000 0x1000>; 319 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH 320 GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; 321 ti,hwmods = "rtc"; 322 status = "disabled"; 323 }; 324 325 wdt: wdt@44e35000 { 326 compatible = "ti,am4372-wdt","ti,omap3-wdt"; 327 reg = <0x44e35000 0x1000>; 328 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 329 ti,hwmods = "wd_timer2"; 330 }; 331 332 gpio0: gpio@44e07000 { 333 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 334 reg = <0x44e07000 0x1000>; 335 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 336 gpio-controller; 337 #gpio-cells = <2>; 338 interrupt-controller; 339 #interrupt-cells = <2>; 340 ti,hwmods = "gpio1"; 341 status = "disabled"; 342 }; 343 344 gpio1: gpio@4804c000 { 345 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 346 reg = <0x4804c000 0x1000>; 347 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 348 gpio-controller; 349 #gpio-cells = <2>; 350 interrupt-controller; 351 #interrupt-cells = <2>; 352 ti,hwmods = "gpio2"; 353 status = "disabled"; 354 }; 355 356 gpio2: gpio@481ac000 { 357 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 358 reg = <0x481ac000 0x1000>; 359 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 360 gpio-controller; 361 #gpio-cells = <2>; 362 interrupt-controller; 363 #interrupt-cells = <2>; 364 ti,hwmods = "gpio3"; 365 status = "disabled"; 366 }; 367 368 gpio3: gpio@481ae000 { 369 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 370 reg = <0x481ae000 0x1000>; 371 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 372 gpio-controller; 373 #gpio-cells = <2>; 374 interrupt-controller; 375 #interrupt-cells = <2>; 376 ti,hwmods = "gpio4"; 377 status = "disabled"; 378 }; 379 380 gpio4: gpio@48320000 { 381 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 382 reg = <0x48320000 0x1000>; 383 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 384 gpio-controller; 385 #gpio-cells = <2>; 386 interrupt-controller; 387 #interrupt-cells = <2>; 388 ti,hwmods = "gpio5"; 389 status = "disabled"; 390 }; 391 392 gpio5: gpio@48322000 { 393 compatible = "ti,am4372-gpio","ti,omap4-gpio"; 394 reg = <0x48322000 0x1000>; 395 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 396 gpio-controller; 397 #gpio-cells = <2>; 398 interrupt-controller; 399 #interrupt-cells = <2>; 400 ti,hwmods = "gpio6"; 401 status = "disabled"; 402 }; 403 404 hwspinlock: spinlock@480ca000 { 405 compatible = "ti,omap4-hwspinlock"; 406 reg = <0x480ca000 0x1000>; 407 ti,hwmods = "spinlock"; 408 #hwlock-cells = <1>; 409 }; 410 411 i2c0: i2c@44e0b000 { 412 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 413 reg = <0x44e0b000 0x1000>; 414 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 415 ti,hwmods = "i2c1"; 416 #address-cells = <1>; 417 #size-cells = <0>; 418 status = "disabled"; 419 }; 420 421 i2c1: i2c@4802a000 { 422 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 423 reg = <0x4802a000 0x1000>; 424 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 425 ti,hwmods = "i2c2"; 426 #address-cells = <1>; 427 #size-cells = <0>; 428 status = "disabled"; 429 }; 430 431 i2c2: i2c@4819c000 { 432 compatible = "ti,am4372-i2c","ti,omap4-i2c"; 433 reg = <0x4819c000 0x1000>; 434 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 435 ti,hwmods = "i2c3"; 436 #address-cells = <1>; 437 #size-cells = <0>; 438 status = "disabled"; 439 }; 440 441 spi0: spi@48030000 { 442 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 443 reg = <0x48030000 0x400>; 444 interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; 445 ti,hwmods = "spi0"; 446 #address-cells = <1>; 447 #size-cells = <0>; 448 status = "disabled"; 449 }; 450 451 mmc1: mmc@48060000 { 452 compatible = "ti,omap4-hsmmc"; 453 reg = <0x48060000 0x1000>; 454 ti,hwmods = "mmc1"; 455 ti,dual-volt; 456 ti,needs-special-reset; 457 dmas = <&edma 24 458 &edma 25>; 459 dma-names = "tx", "rx"; 460 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 461 status = "disabled"; 462 }; 463 464 mmc2: mmc@481d8000 { 465 compatible = "ti,omap4-hsmmc"; 466 reg = <0x481d8000 0x1000>; 467 ti,hwmods = "mmc2"; 468 ti,needs-special-reset; 469 dmas = <&edma 2 470 &edma 3>; 471 dma-names = "tx", "rx"; 472 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 473 status = "disabled"; 474 }; 475 476 mmc3: mmc@47810000 { 477 compatible = "ti,omap4-hsmmc"; 478 reg = <0x47810000 0x1000>; 479 ti,hwmods = "mmc3"; 480 ti,needs-special-reset; 481 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 482 status = "disabled"; 483 }; 484 485 spi1: spi@481a0000 { 486 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 487 reg = <0x481a0000 0x400>; 488 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 489 ti,hwmods = "spi1"; 490 #address-cells = <1>; 491 #size-cells = <0>; 492 status = "disabled"; 493 }; 494 495 spi2: spi@481a2000 { 496 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 497 reg = <0x481a2000 0x400>; 498 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; 499 ti,hwmods = "spi2"; 500 #address-cells = <1>; 501 #size-cells = <0>; 502 status = "disabled"; 503 }; 504 505 spi3: spi@481a4000 { 506 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 507 reg = <0x481a4000 0x400>; 508 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>; 509 ti,hwmods = "spi3"; 510 #address-cells = <1>; 511 #size-cells = <0>; 512 status = "disabled"; 513 }; 514 515 spi4: spi@48345000 { 516 compatible = "ti,am4372-mcspi","ti,omap4-mcspi"; 517 reg = <0x48345000 0x400>; 518 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>; 519 ti,hwmods = "spi4"; 520 #address-cells = <1>; 521 #size-cells = <0>; 522 status = "disabled"; 523 }; 524 525 mac: ethernet@4a100000 { 526 compatible = "ti,am4372-cpsw","ti,cpsw"; 527 reg = <0x4a100000 0x800 528 0x4a101200 0x100>; 529 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH 530 GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH 531 GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 532 GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 533 #address-cells = <1>; 534 #size-cells = <1>; 535 ti,hwmods = "cpgmac0"; 536 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>; 537 clock-names = "fck", "cpts"; 538 status = "disabled"; 539 cpdma_channels = <8>; 540 ale_entries = <1024>; 541 bd_ram_size = <0x2000>; 542 no_bd_ram = <0>; 543 rx_descs = <64>; 544 mac_control = <0x20>; 545 slaves = <2>; 546 active_slave = <0>; 547 cpts_clock_mult = <0x80000000>; 548 cpts_clock_shift = <29>; 549 ranges; 550 551 davinci_mdio: mdio@4a101000 { 552 compatible = "ti,am4372-mdio","ti,davinci_mdio"; 553 reg = <0x4a101000 0x100>; 554 #address-cells = <1>; 555 #size-cells = <0>; 556 ti,hwmods = "davinci_mdio"; 557 bus_freq = <1000000>; 558 status = "disabled"; 559 }; 560 561 cpsw_emac0: slave@4a100200 { 562 /* Filled in by U-Boot */ 563 mac-address = [ 00 00 00 00 00 00 ]; 564 }; 565 566 cpsw_emac1: slave@4a100300 { 567 /* Filled in by U-Boot */ 568 mac-address = [ 00 00 00 00 00 00 ]; 569 }; 570 571 phy_sel: cpsw-phy-sel@44e10650 { 572 compatible = "ti,am43xx-cpsw-phy-sel"; 573 reg= <0x44e10650 0x4>; 574 reg-names = "gmii-sel"; 575 }; 576 }; 577 578 epwmss0: epwmss@48300000 { 579 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 580 reg = <0x48300000 0x10>; 581 #address-cells = <1>; 582 #size-cells = <1>; 583 ranges; 584 ti,hwmods = "epwmss0"; 585 status = "disabled"; 586 587 ecap0: ecap@48300100 { 588 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 589 #pwm-cells = <3>; 590 reg = <0x48300100 0x80>; 591 ti,hwmods = "ecap0"; 592 status = "disabled"; 593 }; 594 595 ehrpwm0: ehrpwm@48300200 { 596 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 597 #pwm-cells = <3>; 598 reg = <0x48300200 0x80>; 599 ti,hwmods = "ehrpwm0"; 600 status = "disabled"; 601 }; 602 }; 603 604 epwmss1: epwmss@48302000 { 605 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 606 reg = <0x48302000 0x10>; 607 #address-cells = <1>; 608 #size-cells = <1>; 609 ranges; 610 ti,hwmods = "epwmss1"; 611 status = "disabled"; 612 613 ecap1: ecap@48302100 { 614 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 615 #pwm-cells = <3>; 616 reg = <0x48302100 0x80>; 617 ti,hwmods = "ecap1"; 618 status = "disabled"; 619 }; 620 621 ehrpwm1: ehrpwm@48302200 { 622 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 623 #pwm-cells = <3>; 624 reg = <0x48302200 0x80>; 625 ti,hwmods = "ehrpwm1"; 626 status = "disabled"; 627 }; 628 }; 629 630 epwmss2: epwmss@48304000 { 631 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 632 reg = <0x48304000 0x10>; 633 #address-cells = <1>; 634 #size-cells = <1>; 635 ranges; 636 ti,hwmods = "epwmss2"; 637 status = "disabled"; 638 639 ecap2: ecap@48304100 { 640 compatible = "ti,am4372-ecap","ti,am33xx-ecap"; 641 #pwm-cells = <3>; 642 reg = <0x48304100 0x80>; 643 ti,hwmods = "ecap2"; 644 status = "disabled"; 645 }; 646 647 ehrpwm2: ehrpwm@48304200 { 648 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 649 #pwm-cells = <3>; 650 reg = <0x48304200 0x80>; 651 ti,hwmods = "ehrpwm2"; 652 status = "disabled"; 653 }; 654 }; 655 656 epwmss3: epwmss@48306000 { 657 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 658 reg = <0x48306000 0x10>; 659 #address-cells = <1>; 660 #size-cells = <1>; 661 ranges; 662 ti,hwmods = "epwmss3"; 663 status = "disabled"; 664 665 ehrpwm3: ehrpwm@48306200 { 666 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 667 #pwm-cells = <3>; 668 reg = <0x48306200 0x80>; 669 ti,hwmods = "ehrpwm3"; 670 status = "disabled"; 671 }; 672 }; 673 674 epwmss4: epwmss@48308000 { 675 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 676 reg = <0x48308000 0x10>; 677 #address-cells = <1>; 678 #size-cells = <1>; 679 ranges; 680 ti,hwmods = "epwmss4"; 681 status = "disabled"; 682 683 ehrpwm4: ehrpwm@48308200 { 684 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 685 #pwm-cells = <3>; 686 reg = <0x48308200 0x80>; 687 ti,hwmods = "ehrpwm4"; 688 status = "disabled"; 689 }; 690 }; 691 692 epwmss5: epwmss@4830a000 { 693 compatible = "ti,am4372-pwmss","ti,am33xx-pwmss"; 694 reg = <0x4830a000 0x10>; 695 #address-cells = <1>; 696 #size-cells = <1>; 697 ranges; 698 ti,hwmods = "epwmss5"; 699 status = "disabled"; 700 701 ehrpwm5: ehrpwm@4830a200 { 702 compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm"; 703 #pwm-cells = <3>; 704 reg = <0x4830a200 0x80>; 705 ti,hwmods = "ehrpwm5"; 706 status = "disabled"; 707 }; 708 }; 709 710 tscadc: tscadc@44e0d000 { 711 compatible = "ti,am3359-tscadc"; 712 reg = <0x44e0d000 0x1000>; 713 ti,hwmods = "adc_tsc"; 714 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 715 clocks = <&adc_tsc_fck>; 716 clock-names = "fck"; 717 status = "disabled"; 718 719 tsc { 720 compatible = "ti,am3359-tsc"; 721 }; 722 723 adc { 724 #io-channel-cells = <1>; 725 compatible = "ti,am3359-adc"; 726 }; 727 728 }; 729 730 sham: sham@53100000 { 731 compatible = "ti,omap5-sham"; 732 ti,hwmods = "sham"; 733 reg = <0x53100000 0x300>; 734 dmas = <&edma 36>; 735 dma-names = "rx"; 736 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 737 }; 738 739 aes: aes@53501000 { 740 compatible = "ti,omap4-aes"; 741 ti,hwmods = "aes"; 742 reg = <0x53501000 0xa0>; 743 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 744 dmas = <&edma 6 745 &edma 5>; 746 dma-names = "tx", "rx"; 747 }; 748 749 des: des@53701000 { 750 compatible = "ti,omap4-des"; 751 ti,hwmods = "des"; 752 reg = <0x53701000 0xa0>; 753 interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; 754 dmas = <&edma 34 755 &edma 33>; 756 dma-names = "tx", "rx"; 757 }; 758 759 mcasp0: mcasp@48038000 { 760 compatible = "ti,am33xx-mcasp-audio"; 761 ti,hwmods = "mcasp0"; 762 reg = <0x48038000 0x2000>, 763 <0x46000000 0x400000>; 764 reg-names = "mpu", "dat"; 765 interrupts = <80>, <81>; 766 interrupt-names = "tx", "rx"; 767 status = "disabled"; 768 dmas = <&edma 8>, 769 <&edma 9>; 770 dma-names = "tx", "rx"; 771 }; 772 773 mcasp1: mcasp@4803C000 { 774 compatible = "ti,am33xx-mcasp-audio"; 775 ti,hwmods = "mcasp1"; 776 reg = <0x4803C000 0x2000>, 777 <0x46400000 0x400000>; 778 reg-names = "mpu", "dat"; 779 interrupts = <82>, <83>; 780 interrupt-names = "tx", "rx"; 781 status = "disabled"; 782 dmas = <&edma 10>, 783 <&edma 11>; 784 dma-names = "tx", "rx"; 785 }; 786 787 elm: elm@48080000 { 788 compatible = "ti,am3352-elm"; 789 reg = <0x48080000 0x2000>; 790 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 791 ti,hwmods = "elm"; 792 clocks = <&l4ls_gclk>; 793 clock-names = "fck"; 794 status = "disabled"; 795 }; 796 797 gpmc: gpmc@50000000 { 798 compatible = "ti,am3352-gpmc"; 799 ti,hwmods = "gpmc"; 800 clocks = <&l3s_gclk>; 801 clock-names = "fck"; 802 reg = <0x50000000 0x2000>; 803 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 804 gpmc,num-cs = <7>; 805 gpmc,num-waitpins = <2>; 806 #address-cells = <2>; 807 #size-cells = <1>; 808 status = "disabled"; 809 }; 810 811 am43xx_control_usb2phy1: control-phy@44e10620 { 812 compatible = "ti,control-phy-usb2-am437"; 813 reg = <0x44e10620 0x4>; 814 reg-names = "power"; 815 }; 816 817 am43xx_control_usb2phy2: control-phy@0x44e10628 { 818 compatible = "ti,control-phy-usb2-am437"; 819 reg = <0x44e10628 0x4>; 820 reg-names = "power"; 821 }; 822 823 ocp2scp0: ocp2scp@483a8000 { 824 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 825 #address-cells = <1>; 826 #size-cells = <1>; 827 ranges; 828 ti,hwmods = "ocp2scp0"; 829 830 usb2_phy1: phy@483a8000 { 831 compatible = "ti,am437x-usb2"; 832 reg = <0x483a8000 0x8000>; 833 ctrl-module = <&am43xx_control_usb2phy1>; 834 clocks = <&usb_phy0_always_on_clk32k>, 835 <&usb_otg_ss0_refclk960m>; 836 clock-names = "wkupclk", "refclk"; 837 #phy-cells = <0>; 838 status = "disabled"; 839 }; 840 }; 841 842 ocp2scp1: ocp2scp@483e8000 { 843 compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp"; 844 #address-cells = <1>; 845 #size-cells = <1>; 846 ranges; 847 ti,hwmods = "ocp2scp1"; 848 849 usb2_phy2: phy@483e8000 { 850 compatible = "ti,am437x-usb2"; 851 reg = <0x483e8000 0x8000>; 852 ctrl-module = <&am43xx_control_usb2phy2>; 853 clocks = <&usb_phy1_always_on_clk32k>, 854 <&usb_otg_ss1_refclk960m>; 855 clock-names = "wkupclk", "refclk"; 856 #phy-cells = <0>; 857 status = "disabled"; 858 }; 859 }; 860 861 dwc3_1: omap_dwc3@48380000 { 862 compatible = "ti,am437x-dwc3"; 863 ti,hwmods = "usb_otg_ss0"; 864 reg = <0x48380000 0x10000>; 865 interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; 866 #address-cells = <1>; 867 #size-cells = <1>; 868 utmi-mode = <1>; 869 ranges; 870 871 usb1: usb@48390000 { 872 compatible = "synopsys,dwc3"; 873 reg = <0x48390000 0x10000>; 874 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 875 phys = <&usb2_phy1>; 876 phy-names = "usb2-phy"; 877 maximum-speed = "high-speed"; 878 dr_mode = "otg"; 879 status = "disabled"; 880 snps,dis_u3_susphy_quirk; 881 snps,dis_u2_susphy_quirk; 882 }; 883 }; 884 885 dwc3_2: omap_dwc3@483c0000 { 886 compatible = "ti,am437x-dwc3"; 887 ti,hwmods = "usb_otg_ss1"; 888 reg = <0x483c0000 0x10000>; 889 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; 890 #address-cells = <1>; 891 #size-cells = <1>; 892 utmi-mode = <1>; 893 ranges; 894 895 usb2: usb@483d0000 { 896 compatible = "synopsys,dwc3"; 897 reg = <0x483d0000 0x10000>; 898 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 899 phys = <&usb2_phy2>; 900 phy-names = "usb2-phy"; 901 maximum-speed = "high-speed"; 902 dr_mode = "otg"; 903 status = "disabled"; 904 snps,dis_u3_susphy_quirk; 905 snps,dis_u2_susphy_quirk; 906 }; 907 }; 908 909 qspi: qspi@47900000 { 910 compatible = "ti,am4372-qspi"; 911 reg = <0x47900000 0x100>; 912 #address-cells = <1>; 913 #size-cells = <0>; 914 ti,hwmods = "qspi"; 915 interrupts = <0 138 0x4>; 916 num-cs = <4>; 917 status = "disabled"; 918 }; 919 920 hdq: hdq@48347000 { 921 compatible = "ti,am4372-hdq"; 922 reg = <0x48347000 0x1000>; 923 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 924 clocks = <&func_12m_clk>; 925 clock-names = "fck"; 926 ti,hwmods = "hdq1w"; 927 status = "disabled"; 928 }; 929 930 dss: dss@4832a000 { 931 compatible = "ti,omap3-dss"; 932 reg = <0x4832a000 0x200>; 933 status = "disabled"; 934 ti,hwmods = "dss_core"; 935 clocks = <&disp_clk>; 936 clock-names = "fck"; 937 #address-cells = <1>; 938 #size-cells = <1>; 939 ranges; 940 941 dispc: dispc@4832a400 { 942 compatible = "ti,omap3-dispc"; 943 reg = <0x4832a400 0x400>; 944 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 945 ti,hwmods = "dss_dispc"; 946 clocks = <&disp_clk>; 947 clock-names = "fck"; 948 }; 949 950 rfbi: rfbi@4832a800 { 951 compatible = "ti,omap3-rfbi"; 952 reg = <0x4832a800 0x100>; 953 ti,hwmods = "dss_rfbi"; 954 clocks = <&disp_clk>; 955 clock-names = "fck"; 956 status = "disabled"; 957 }; 958 }; 959 960 ocmcram: ocmcram@40300000 { 961 compatible = "mmio-sram"; 962 reg = <0x40300000 0x40000>; /* 256k */ 963 }; 964 965 dcan0: can@481cc000 { 966 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 967 ti,hwmods = "d_can0"; 968 clocks = <&dcan0_fck>; 969 clock-names = "fck"; 970 reg = <0x481cc000 0x2000>; 971 syscon-raminit = <&scm_conf 0x644 0>; 972 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; 973 status = "disabled"; 974 }; 975 976 dcan1: can@481d0000 { 977 compatible = "ti,am4372-d_can", "ti,am3352-d_can"; 978 ti,hwmods = "d_can1"; 979 clocks = <&dcan1_fck>; 980 clock-names = "fck"; 981 reg = <0x481d0000 0x2000>; 982 syscon-raminit = <&scm_conf 0x644 1>; 983 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 984 status = "disabled"; 985 }; 986 987 vpfe0: vpfe@48326000 { 988 compatible = "ti,am437x-vpfe"; 989 reg = <0x48326000 0x2000>; 990 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 991 ti,hwmods = "vpfe0"; 992 status = "disabled"; 993 }; 994 995 vpfe1: vpfe@48328000 { 996 compatible = "ti,am437x-vpfe"; 997 reg = <0x48328000 0x2000>; 998 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 999 ti,hwmods = "vpfe1"; 1000 status = "disabled"; 1001 }; 1002 }; 1003}; 1004 1005/include/ "am43xx-clocks.dtsi" 1006