xref: /openbmc/u-boot/arch/arm/dts/am335x-evmsk.dts (revision e04f9d0c)
1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/*
10 * AM335x Starter Kit
11 * http://www.ti.com/tool/tmdssk3358
12 */
13
14/dts-v1/;
15
16#include "am33xx.dtsi"
17#include <dt-bindings/pwm/pwm.h>
18#include <dt-bindings/interrupt-controller/irq.h>
19
20/ {
21	model = "TI AM335x EVM-SK";
22	compatible = "ti,am335x-evmsk", "ti,am33xx";
23
24	chosen {
25		stdout-path = &uart0;
26		tick-timer = &timer2;
27	};
28
29	cpus {
30		cpu@0 {
31			cpu0-supply = <&vdd1_reg>;
32		};
33	};
34
35	memory {
36		device_type = "memory";
37		reg = <0x80000000 0x10000000>; /* 256 MB */
38	};
39
40	vbat: fixedregulator@0 {
41		compatible = "regulator-fixed";
42		regulator-name = "vbat";
43		regulator-min-microvolt = <5000000>;
44		regulator-max-microvolt = <5000000>;
45		regulator-boot-on;
46	};
47
48	lis3_reg: fixedregulator@1 {
49		compatible = "regulator-fixed";
50		regulator-name = "lis3_reg";
51		regulator-boot-on;
52	};
53
54	wl12xx_vmmc: fixedregulator@2 {
55		pinctrl-names = "default";
56		pinctrl-0 = <&wl12xx_gpio>;
57		compatible = "regulator-fixed";
58		regulator-name = "vwl1271";
59		regulator-min-microvolt = <1800000>;
60		regulator-max-microvolt = <1800000>;
61		gpio = <&gpio1 29 0>;
62		startup-delay-us = <70000>;
63		enable-active-high;
64	};
65
66	vtt_fixed: fixedregulator@3 {
67		compatible = "regulator-fixed";
68		regulator-name = "vtt";
69		regulator-min-microvolt = <1500000>;
70		regulator-max-microvolt = <1500000>;
71		gpio = <&gpio0 7 GPIO_ACTIVE_HIGH>;
72		regulator-always-on;
73		regulator-boot-on;
74		enable-active-high;
75	};
76
77	leds {
78		pinctrl-names = "default";
79		pinctrl-0 = <&user_leds_s0>;
80
81		compatible = "gpio-leds";
82
83		led@1 {
84			label = "evmsk:green:usr0";
85			gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
86			default-state = "off";
87		};
88
89		led@2 {
90			label = "evmsk:green:usr1";
91			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
92			default-state = "off";
93		};
94
95		led@3 {
96			label = "evmsk:green:mmc0";
97			gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
98			linux,default-trigger = "mmc0";
99			default-state = "off";
100		};
101
102		led@4 {
103			label = "evmsk:green:heartbeat";
104			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
105			linux,default-trigger = "heartbeat";
106			default-state = "off";
107		};
108	};
109
110	gpio_buttons: gpio_buttons@0 {
111		compatible = "gpio-keys";
112		#address-cells = <1>;
113		#size-cells = <0>;
114
115		switch@1 {
116			label = "button0";
117			linux,code = <0x100>;
118			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
119		};
120
121		switch@2 {
122			label = "button1";
123			linux,code = <0x101>;
124			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
125		};
126
127		switch@3 {
128			label = "button2";
129			linux,code = <0x102>;
130			gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>;
131			wakeup-source;
132		};
133
134		switch@4 {
135			label = "button3";
136			linux,code = <0x103>;
137			gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
138		};
139	};
140
141	backlight {
142		compatible = "pwm-backlight";
143		pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>;
144		brightness-levels = <0 58 61 66 75 90 125 170 255>;
145		default-brightness-level = <8>;
146	};
147
148	sound {
149		compatible = "simple-audio-card";
150		simple-audio-card,name = "AM335x-EVMSK";
151		simple-audio-card,widgets =
152			"Headphone", "Headphone Jack";
153		simple-audio-card,routing =
154			"Headphone Jack",	"HPLOUT",
155			"Headphone Jack",	"HPROUT";
156		simple-audio-card,format = "dsp_b";
157		simple-audio-card,bitclock-master = <&sound_master>;
158		simple-audio-card,frame-master = <&sound_master>;
159		simple-audio-card,bitclock-inversion;
160
161		simple-audio-card,cpu {
162			sound-dai = <&mcasp1>;
163		};
164
165		sound_master: simple-audio-card,codec {
166			sound-dai = <&tlv320aic3106>;
167			system-clock-frequency = <24000000>;
168		};
169	};
170
171	panel {
172		compatible = "ti,tilcdc,panel";
173		pinctrl-names = "default", "sleep";
174		pinctrl-0 = <&lcd_pins_default>;
175		pinctrl-1 = <&lcd_pins_sleep>;
176		status = "okay";
177		panel-info {
178			ac-bias           = <255>;
179			ac-bias-intrpt    = <0>;
180			dma-burst-sz      = <16>;
181			bpp               = <32>;
182			fdd               = <0x80>;
183			sync-edge         = <0>;
184			sync-ctrl         = <1>;
185			raster-order      = <0>;
186			fifo-th           = <0>;
187		};
188		display-timings {
189			480x272 {
190				hactive         = <480>;
191				vactive         = <272>;
192				hback-porch     = <43>;
193				hfront-porch    = <8>;
194				hsync-len       = <4>;
195				vback-porch     = <12>;
196				vfront-porch    = <4>;
197				vsync-len       = <10>;
198				clock-frequency = <9000000>;
199				hsync-active    = <0>;
200				vsync-active    = <0>;
201			};
202		};
203	};
204};
205
206&am33xx_pinmux {
207	pinctrl-names = "default";
208	pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>;
209
210	lcd_pins_default: lcd_pins_default {
211		pinctrl-single,pins = <
212			AM33XX_IOPAD(0x820, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad8.lcd_data23 */
213			AM33XX_IOPAD(0x824, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad9.lcd_data22 */
214			AM33XX_IOPAD(0x828, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad10.lcd_data21 */
215			AM33XX_IOPAD(0x82c, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad11.lcd_data20 */
216			AM33XX_IOPAD(0x830, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad12.lcd_data19 */
217			AM33XX_IOPAD(0x834, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad13.lcd_data18 */
218			AM33XX_IOPAD(0x838, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad14.lcd_data17 */
219			AM33XX_IOPAD(0x83c, PIN_OUTPUT | MUX_MODE1)	/* gpmc_ad15.lcd_data16 */
220			AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data0.lcd_data0 */
221			AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data1.lcd_data1 */
222			AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data2.lcd_data2 */
223			AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0)	/* lcd_data3.lcd_data3 */
224			AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data4.lcd_data4 */
225			AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data5.lcd_data5 */
226			AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data6.lcd_data6 */
227			AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data7.lcd_data7 */
228			AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data8.lcd_data8 */
229			AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data9.lcd_data9 */
230			AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data10.lcd_data10 */
231			AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data11.lcd_data11 */
232			AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0)	/* lcd_data12.lcd_data12 */
233			AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0)	/* lcd_data13.lcd_data13 */
234			AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0)	/* lcd_data14.lcd_data14 */
235			AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0)	/* lcd_data15.lcd_data15 */
236			AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0)	/* lcd_vsync.lcd_vsync */
237			AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0)	/* lcd_hsync.lcd_hsync */
238			AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0)	/* lcd_pclk.lcd_pclk */
239			AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0)	/* lcd_ac_bias_en.lcd_ac_bias_en */
240		>;
241	};
242
243	lcd_pins_sleep: lcd_pins_sleep {
244		pinctrl-single,pins = <
245			AM33XX_IOPAD(0x820, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad8.lcd_data23 */
246			AM33XX_IOPAD(0x824, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad9.lcd_data22 */
247			AM33XX_IOPAD(0x828, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad10.lcd_data21 */
248			AM33XX_IOPAD(0x82c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad11.lcd_data20 */
249			AM33XX_IOPAD(0x830, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad12.lcd_data19 */
250			AM33XX_IOPAD(0x834, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad13.lcd_data18 */
251			AM33XX_IOPAD(0x838, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad14.lcd_data17 */
252			AM33XX_IOPAD(0x83c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad15.lcd_data16 */
253			AM33XX_IOPAD(0x8a0, PULL_DISABLE | MUX_MODE7)	/* lcd_data0.lcd_data0 */
254			AM33XX_IOPAD(0x8a4, PULL_DISABLE | MUX_MODE7)	/* lcd_data1.lcd_data1 */
255			AM33XX_IOPAD(0x8a8, PULL_DISABLE | MUX_MODE7)	/* lcd_data2.lcd_data2 */
256			AM33XX_IOPAD(0x8ac, PULL_DISABLE | MUX_MODE7)	/* lcd_data3.lcd_data3 */
257			AM33XX_IOPAD(0x8b0, PULL_DISABLE | MUX_MODE7)	/* lcd_data4.lcd_data4 */
258			AM33XX_IOPAD(0x8b4, PULL_DISABLE | MUX_MODE7)	/* lcd_data5.lcd_data5 */
259			AM33XX_IOPAD(0x8b8, PULL_DISABLE | MUX_MODE7)	/* lcd_data6.lcd_data6 */
260			AM33XX_IOPAD(0x8bc, PULL_DISABLE | MUX_MODE7)	/* lcd_data7.lcd_data7 */
261			AM33XX_IOPAD(0x8c0, PULL_DISABLE | MUX_MODE7)	/* lcd_data8.lcd_data8 */
262			AM33XX_IOPAD(0x8c4, PULL_DISABLE | MUX_MODE7)	/* lcd_data9.lcd_data9 */
263			AM33XX_IOPAD(0x8c8, PULL_DISABLE | MUX_MODE7)	/* lcd_data10.lcd_data10 */
264			AM33XX_IOPAD(0x8cc, PULL_DISABLE | MUX_MODE7)	/* lcd_data11.lcd_data11 */
265			AM33XX_IOPAD(0x8d0, PULL_DISABLE | MUX_MODE7)	/* lcd_data12.lcd_data12 */
266			AM33XX_IOPAD(0x8d4, PULL_DISABLE | MUX_MODE7)	/* lcd_data13.lcd_data13 */
267			AM33XX_IOPAD(0x8d8, PULL_DISABLE | MUX_MODE7)	/* lcd_data14.lcd_data14 */
268			AM33XX_IOPAD(0x8dc, PULL_DISABLE | MUX_MODE7)	/* lcd_data15.lcd_data15 */
269			AM33XX_IOPAD(0x8e0, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_vsync.lcd_vsync */
270			AM33XX_IOPAD(0x8e4, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_hsync.lcd_hsync */
271			AM33XX_IOPAD(0x8e8, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_pclk.lcd_pclk */
272			AM33XX_IOPAD(0x8ec, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* lcd_ac_bias_en.lcd_ac_bias_en */
273		>;
274	};
275
276
277	user_leds_s0: user_leds_s0 {
278		pinctrl-single,pins = <
279			AM33XX_IOPAD(0x810, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad4.gpio1_4 */
280			AM33XX_IOPAD(0x814, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad5.gpio1_5 */
281			AM33XX_IOPAD(0x818, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad6.gpio1_6 */
282			AM33XX_IOPAD(0x81c, PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ad7.gpio1_7 */
283		>;
284	};
285
286	gpio_keys_s0: gpio_keys_s0 {
287		pinctrl-single,pins = <
288			AM33XX_IOPAD(0x894, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_oen_ren.gpio2_3 */
289			AM33XX_IOPAD(0x890, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_advn_ale.gpio2_2 */
290			AM33XX_IOPAD(0x870, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_wait0.gpio0_30 */
291			AM33XX_IOPAD(0x89c, PIN_INPUT_PULLDOWN | MUX_MODE7)	/* gpmc_ben0_cle.gpio2_5 */
292		>;
293	};
294
295	i2c0_pins: pinmux_i2c0_pins {
296		pinctrl-single,pins = <
297			AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
298			AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
299		>;
300	};
301
302	uart0_pins: pinmux_uart0_pins {
303		pinctrl-single,pins = <
304			AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
305			AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
306		>;
307	};
308
309	clkout2_pin: pinmux_clkout2_pin {
310		pinctrl-single,pins = <
311			AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
312		>;
313	};
314
315	ecap2_pins: backlight_pins {
316		pinctrl-single,pins = <
317			AM33XX_IOPAD(0x99c, MUX_MODE4)	/* mcasp0_ahclkr.ecap2_in_pwm2_out */
318		>;
319	};
320
321	cpsw_default: cpsw_default {
322		pinctrl-single,pins = <
323			/* Slave 1 */
324			AM33XX_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txen.rgmii1_tctl */
325			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxdv.rgmii1_rctl */
326			AM33XX_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd3.rgmii1_td3 */
327			AM33XX_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd2.rgmii1_td2 */
328			AM33XX_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd1.rgmii1_td1 */
329			AM33XX_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txd0.rgmii1_td0 */
330			AM33XX_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* mii1_txclk.rgmii1_tclk */
331			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxclk.rgmii1_rclk */
332			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd3.rgmii1_rd3 */
333			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd2.rgmii1_rd2 */
334			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd1.rgmii1_rd1 */
335			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* mii1_rxd0.rgmii1_rd0 */
336
337			/* Slave 2 */
338			AM33XX_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a0.rgmii2_tctl */
339			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a1.rgmii2_rctl */
340			AM33XX_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a2.rgmii2_td3 */
341			AM33XX_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a3.rgmii2_td2 */
342			AM33XX_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a4.rgmii2_td1 */
343			AM33XX_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a5.rgmii2_td0 */
344			AM33XX_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a6.rgmii2_tclk */
345			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a7.rgmii2_rclk */
346			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a8.rgmii2_rd3 */
347			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a9.rgmii2_rd2 */
348			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a10.rgmii2_rd1 */
349			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2)	/* gpmc_a11.rgmii2_rd0 */
350		>;
351	};
352
353	cpsw_sleep: cpsw_sleep {
354		pinctrl-single,pins = <
355			/* Slave 1 reset value */
356			AM33XX_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
357			AM33XX_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
358			AM33XX_IOPAD(0x91c, PIN_INPUT_PULLDOWN | MUX_MODE7)
359			AM33XX_IOPAD(0x920, PIN_INPUT_PULLDOWN | MUX_MODE7)
360			AM33XX_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
361			AM33XX_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
362			AM33XX_IOPAD(0x92c, PIN_INPUT_PULLDOWN | MUX_MODE7)
363			AM33XX_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE7)
364			AM33XX_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE7)
365			AM33XX_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE7)
366			AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
367			AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
368
369			/* Slave 2 reset value*/
370			AM33XX_IOPAD(0x840, PIN_INPUT_PULLDOWN | MUX_MODE7)
371			AM33XX_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE7)
372			AM33XX_IOPAD(0x848, PIN_INPUT_PULLDOWN | MUX_MODE7)
373			AM33XX_IOPAD(0x84c, PIN_INPUT_PULLDOWN | MUX_MODE7)
374			AM33XX_IOPAD(0x850, PIN_INPUT_PULLDOWN | MUX_MODE7)
375			AM33XX_IOPAD(0x854, PIN_INPUT_PULLDOWN | MUX_MODE7)
376			AM33XX_IOPAD(0x858, PIN_INPUT_PULLDOWN | MUX_MODE7)
377			AM33XX_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE7)
378			AM33XX_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE7)
379			AM33XX_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE7)
380			AM33XX_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE7)
381			AM33XX_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE7)
382		>;
383	};
384
385	davinci_mdio_default: davinci_mdio_default {
386		pinctrl-single,pins = <
387			/* MDIO */
388			AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
389			AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
390		>;
391	};
392
393	davinci_mdio_sleep: davinci_mdio_sleep {
394		pinctrl-single,pins = <
395			/* MDIO reset value */
396			AM33XX_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
397			AM33XX_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
398		>;
399	};
400
401	mmc1_pins: pinmux_mmc1_pins {
402		pinctrl-single,pins = <
403			AM33XX_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
404		>;
405	};
406
407	mcasp1_pins: mcasp1_pins {
408		pinctrl-single,pins = <
409			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
410			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
411			AM33XX_IOPAD(0x908, PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
412			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
413		>;
414	};
415
416	mcasp1_pins_sleep: mcasp1_pins_sleep {
417		pinctrl-single,pins = <
418			AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
419			AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
420			AM33XX_IOPAD(0x908, PIN_INPUT_PULLDOWN | MUX_MODE7)
421			AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
422		>;
423	};
424
425	mmc2_pins: pinmux_mmc2_pins {
426		pinctrl-single,pins = <
427			AM33XX_IOPAD(0x874, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_31 */
428			AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
429			AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
430			AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
431			AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
432			AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
433			AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
434		>;
435	};
436
437	wl12xx_gpio: pinmux_wl12xx_gpio {
438		pinctrl-single,pins = <
439			AM33XX_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_csn0.gpio1_29 */
440		>;
441	};
442};
443
444&uart0 {
445	pinctrl-names = "default";
446	pinctrl-0 = <&uart0_pins>;
447
448	status = "okay";
449};
450
451&i2c0 {
452	pinctrl-names = "default";
453	pinctrl-0 = <&i2c0_pins>;
454
455	status = "okay";
456	clock-frequency = <400000>;
457
458	tps: tps@2d {
459		reg = <0x2d>;
460	};
461
462	lis331dlh: lis331dlh@18 {
463		compatible = "st,lis331dlh", "st,lis3lv02d";
464		reg = <0x18>;
465		Vdd-supply = <&lis3_reg>;
466		Vdd_IO-supply = <&lis3_reg>;
467
468		st,click-single-x;
469		st,click-single-y;
470		st,click-single-z;
471		st,click-thresh-x = <10>;
472		st,click-thresh-y = <10>;
473		st,click-thresh-z = <10>;
474		st,irq1-click;
475		st,irq2-click;
476		st,wakeup-x-lo;
477		st,wakeup-x-hi;
478		st,wakeup-y-lo;
479		st,wakeup-y-hi;
480		st,wakeup-z-lo;
481		st,wakeup-z-hi;
482		st,min-limit-x = <120>;
483		st,min-limit-y = <120>;
484		st,min-limit-z = <140>;
485		st,max-limit-x = <550>;
486		st,max-limit-y = <550>;
487		st,max-limit-z = <750>;
488	};
489
490	tlv320aic3106: tlv320aic3106@1b {
491		#sound-dai-cells = <0>;
492		compatible = "ti,tlv320aic3106";
493		reg = <0x1b>;
494		status = "okay";
495
496		/* Regulators */
497		AVDD-supply = <&vaux2_reg>;
498		IOVDD-supply = <&vaux2_reg>;
499		DRVDD-supply = <&vaux2_reg>;
500		DVDD-supply = <&vbat>;
501	};
502};
503
504&usb {
505	status = "okay";
506};
507
508&usb_ctrl_mod {
509	status = "okay";
510};
511
512&usb0_phy {
513	status = "okay";
514};
515
516&usb1_phy {
517	status = "okay";
518};
519
520&usb0 {
521	status = "okay";
522};
523
524&usb1 {
525	status = "okay";
526	dr_mode = "host";
527};
528
529&cppi41dma  {
530	status = "okay";
531};
532
533&epwmss2 {
534	status = "okay";
535
536	ecap2: ecap@48304100 {
537		status = "okay";
538		pinctrl-names = "default";
539		pinctrl-0 = <&ecap2_pins>;
540	};
541};
542
543#include "tps65910.dtsi"
544
545&tps {
546	vcc1-supply = <&vbat>;
547	vcc2-supply = <&vbat>;
548	vcc3-supply = <&vbat>;
549	vcc4-supply = <&vbat>;
550	vcc5-supply = <&vbat>;
551	vcc6-supply = <&vbat>;
552	vcc7-supply = <&vbat>;
553	vccio-supply = <&vbat>;
554
555	regulators {
556		vrtc_reg: regulator@0 {
557			regulator-always-on;
558		};
559
560		vio_reg: regulator@1 {
561			regulator-always-on;
562		};
563
564		vdd1_reg: regulator@2 {
565			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
566			regulator-name = "vdd_mpu";
567			regulator-min-microvolt = <912500>;
568			regulator-max-microvolt = <1312500>;
569			regulator-boot-on;
570			regulator-always-on;
571		};
572
573		vdd2_reg: regulator@3 {
574			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
575			regulator-name = "vdd_core";
576			regulator-min-microvolt = <912500>;
577			regulator-max-microvolt = <1150000>;
578			regulator-boot-on;
579			regulator-always-on;
580		};
581
582		vdd3_reg: regulator@4 {
583			regulator-always-on;
584		};
585
586		vdig1_reg: regulator@5 {
587			regulator-always-on;
588		};
589
590		vdig2_reg: regulator@6 {
591			regulator-always-on;
592		};
593
594		vpll_reg: regulator@7 {
595			regulator-always-on;
596		};
597
598		vdac_reg: regulator@8 {
599			regulator-always-on;
600		};
601
602		vaux1_reg: regulator@9 {
603			regulator-always-on;
604		};
605
606		vaux2_reg: regulator@10 {
607			regulator-always-on;
608		};
609
610		vaux33_reg: regulator@11 {
611			regulator-always-on;
612		};
613
614		vmmc_reg: regulator@12 {
615			regulator-min-microvolt = <1800000>;
616			regulator-max-microvolt = <3300000>;
617			regulator-always-on;
618		};
619	};
620};
621
622&mac {
623	pinctrl-names = "default", "sleep";
624	pinctrl-0 = <&cpsw_default>;
625	pinctrl-1 = <&cpsw_sleep>;
626	dual_emac = <1>;
627	status = "okay";
628};
629
630&davinci_mdio {
631	pinctrl-names = "default", "sleep";
632	pinctrl-0 = <&davinci_mdio_default>;
633	pinctrl-1 = <&davinci_mdio_sleep>;
634	status = "okay";
635};
636
637&cpsw_emac0 {
638	phy_id = <&davinci_mdio>, <0>;
639	phy-mode = "rgmii-txid";
640	dual_emac_res_vlan = <1>;
641};
642
643&cpsw_emac1 {
644	phy_id = <&davinci_mdio>, <1>;
645	phy-mode = "rgmii-txid";
646	dual_emac_res_vlan = <2>;
647};
648
649&mmc1 {
650	status = "okay";
651	vmmc-supply = <&vmmc_reg>;
652	bus-width = <4>;
653	pinctrl-names = "default";
654	pinctrl-0 = <&mmc1_pins>;
655	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
656};
657
658&sham {
659	status = "okay";
660};
661
662&aes {
663	status = "okay";
664};
665
666&gpio0 {
667	ti,no-reset-on-init;
668};
669
670&mmc2 {
671	status = "okay";
672	vmmc-supply = <&wl12xx_vmmc>;
673	ti,non-removable;
674	bus-width = <4>;
675	cap-power-off-card;
676	pinctrl-names = "default";
677	pinctrl-0 = <&mmc2_pins>;
678
679	#address-cells = <1>;
680	#size-cells = <0>;
681	wlcore: wlcore@2 {
682		compatible = "ti,wl1271";
683		reg = <2>;
684		interrupt-parent = <&gpio0>;
685		interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
686		ref-clock-frequency = <38400000>;
687	};
688};
689
690&mcasp1 {
691	#sound-dai-cells = <0>;
692	pinctrl-names = "default", "sleep";
693	pinctrl-0 = <&mcasp1_pins>;
694	pinctrl-1 = <&mcasp1_pins_sleep>;
695
696	status = "okay";
697
698	op-mode = <0>;          /* MCASP_IIS_MODE */
699	tdm-slots = <2>;
700	/* 4 serializers */
701	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
702		0 0 1 2
703	>;
704	tx-num-evt = <32>;
705	rx-num-evt = <32>;
706};
707
708&tscadc {
709	status = "okay";
710	tsc {
711		ti,wires = <4>;
712		ti,x-plate-resistance = <200>;
713		ti,coordinate-readouts = <5>;
714		ti,wire-config = <0x00 0x11 0x22 0x33>;
715	};
716};
717
718&lcdc {
719      status = "okay";
720};
721