1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2018 B&R Industrial Automation GmbH
4 * http://www.br-automation.com
5 *
6 */
7/dts-v1/;
8
9#include "am33xx.dtsi"
10
11/ {
12	model = "BRPPT1 (NAND) Panel";
13	compatible = "ti,am33xx";
14
15	fset: factory-settings {
16		bl-version	= "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
17		version		= <0x0100>;
18		order-no	= "6PPT30 (NAND)";
19		hw-revision	= "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
20		serial-no	= "0";
21		device-id	= <0x0>;
22		parent-id	= <0x0>;
23		hw-variant	= <0x1>;
24	};
25
26	aliases {
27		ds1bkl0 = &pwmbacklight;
28		ds1bkl1 = &tps_bl;
29		ds1timing = &timing0;
30		ds1ctrl = &lcdc;
31		gpmc = &gpmc;
32		mmc = &mmc2;
33		fset = &fset;
34	};
35
36	chosen {
37		bootargs = "console=ttyO0,115200 earlyprintk";
38		stdout-path = &uart0;
39	};
40
41	memory {
42		device_type = "memory";
43		reg = <0x80000000 0x10000000>; /* 256 MB */
44	};
45
46	panel {
47		status = "disabled";
48
49		compatible = "ti,tilcdc,panel";
50		enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
51
52		backlight = <&pwmbacklight>;
53		bkl-pwm = <&pwmbacklight>;
54		bkl-tps = <&tps_bl>;
55
56		panel-info {
57			ac-bias		= <255>;
58			ac-bias-intrpt	= <0>;
59			dma-burst-sz	= <16>;
60			bpp		= <32>;
61			fdd		= <0x80>;
62			sync-edge	= <0>;
63			sync-ctrl	= <1>;
64			raster-order	= <0>;
65			fifo-th		= <0>;
66		};
67
68		display-timings {
69			native-mode = <&timing0>;
70			timing0: lcd {
71				clock-frequency	= <32000000>;
72				hactive		= <800>;
73				vactive		= <480>;
74				hfront-porch	= <2>;
75				hback-porch	= <192>;
76				hsync-len	= <1>;
77				vfront-porch	= <20>;
78				vback-porch	= <2>;
79				vsync-len	= <1>;
80				hsync-active	= <1>;
81				vsync-active	= <1>;
82				pupdelay	= <10>;
83				pondelay	= <10>;
84			};
85		};
86	};
87
88	vmmcsd_fixed: fixedregulator@0 {
89		compatible = "regulator-fixed";
90		regulator-name = "vmmcsd_fixed";
91		regulator-min-microvolt = <3300000>;
92		regulator-max-microvolt = <3300000>;
93	};
94
95	pwm0: omap-pwm@timer5 {
96		compatible = "ti,omap-dmtimer-pwm";
97		ti,timers = <&timer5>;
98		#pwm-cells = <3>;
99	};
100
101	pwm1: omap-pwm@timer6 {
102		compatible = "ti,omap-dmtimer-pwm";
103		ti,timers = <&timer6>;
104		#pwm-cells = <3>;
105	};
106
107	beeper: pwm-beep {
108		compatible = "pwm-beeper";
109		pwms = <&pwm0 0 0 0>;
110	};
111
112	pwmbacklight: pwm-bkl {
113		compatible = "pwm-backlight";
114		pwms = <&pwm1 0 5000000 0>;
115
116		default-brightness-level = <255>;
117		brightness-levels = <0 16 32 64 128 170 202 234 255>;
118
119		power-supply = <&vmmcsd_fixed>;
120		enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
121	};
122};
123
124&uart0 {		/* console uart */
125	u-boot,dm-spl;
126	status = "okay";
127};
128
129&uart1 {
130	status = "okay";
131};
132
133&i2c0 {
134	u-boot,dm-spl;
135	status = "okay";
136	clock-frequency = <400000>;
137
138	tps: tps@24 {		/* PMIC controller */
139		u-boot,dm-spl;
140		reg = <0x24>;
141		compatible = "ti,tps65217";
142
143		tps_bl: backlight {
144			compatible = "ti,tps65217-bl";
145			isel = <1>;	/* 1 - ISET1, 2 ISET2 */
146			fdim = <1000>;	/* TPS65217_BL_FDIM_1kHZ */
147			default-brightness = <50>;
148		};
149	};
150};
151
152&i2c2 {
153	status = "okay";
154	clock-frequency = <100000>;
155};
156
157&edma {
158	status = "okay";
159};
160
161&cppi41dma  {
162	status = "okay";
163};
164
165&usb {
166	status = "okay";
167};
168
169&usb_ctrl_mod {
170	status = "okay";
171};
172
173&usb0_phy {
174	status = "okay";
175};
176
177&usb1_phy {
178	status = "okay";
179};
180
181&usb0 {
182	status = "okay";
183	dr_mode = "host";
184};
185
186&usb1 {
187	status = "okay";
188	dr_mode = "host";
189};
190
191&davinci_mdio {
192	status = "okay";
193
194	phy0: ethernet-phy@0 {
195		reg = <1>;
196	};
197
198	phy1: ethernet-phy@1 {
199		reg = <2>;
200	};
201};
202
203&mac {
204	dual_emac;
205	status = "okay";
206};
207
208&cpsw_emac0 {
209	phy-handle = <&phy0>;
210	dual_emac_res_vlan = <1>;
211	phy-mode = "mii";
212};
213
214&cpsw_emac1 {
215	phy-handle = <&phy1>;
216	dual_emac_res_vlan = <2>;
217	phy-mode = "mii";
218};
219
220&mmc2 {
221	vmmc-supply = <&vmmcsd_fixed>;
222	bus-width = <0x4>;
223	ti,non-removable;
224	ti,needs-special-hs-handling;
225	ti,vcc-aux-disable-is-sleep;
226	status = "disabled";
227};
228
229&lcdc {
230	status = "disabled";
231};
232
233&elm {
234	status = "okay";
235};
236
237&sham {
238	status = "okay";
239};
240
241&aes {
242	status = "okay";
243};
244
245&gpio0 {
246	u-boot,dm-spl;
247	ti,no-reset-on-init;
248};
249
250&gpio1 {
251	u-boot,dm-spl;
252	ti,no-reset-on-init;
253};
254
255&gpio2 {
256	u-boot,dm-spl;
257	ti,no-reset-on-init;
258};
259
260&gpio3 {
261	u-boot,dm-spl;
262	ti,no-reset-on-init;
263};
264
265&wdt2 {
266	ti,no-reset-on-init;
267	ti,no-idle-on-init;
268};
269
270&tscadc {
271	status = "okay";
272	tsc {
273		ti,wires = <4>;
274		ti,x-plate-resistance = <200>;
275		ti,zx-cutoff-ratio = <40>;
276		ti,min_deviation = <60>;
277		ti,max_deviation = <600>;
278		ti,coordinate-readouts = <5>;
279		ti,wire-config = <0x00 0x11 0x22 0x33>;
280
281		bnr-buttons {
282			Home-Button {};
283		};
284	};
285
286	adc {
287		ti,adc-channels = <5 6 7>;
288	};
289};
290
291&gpmc {
292	u-boot,dm-spl;
293	status = "okay";
294	pinctrl-names = "default";
295	ranges = <0 0 0x08000000 0x10000000>;	/* CS0: NAND */
296	nand@0,0 {
297		compatible = "ti,omap2-nand";
298		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
299		interrupt-parent = <&gpmc>;
300		rb-gpios = <&gpmc 1 GPIO_ACTIVE_HIGH>; /* gpmc_wait1 */
301		ti,nand-ecc-opt = "bch8";
302		ti,elm-id = <&elm>;
303		nand-bus-width = <8>;
304		gpmc,device-width = <1>;
305		gpmc,sync-clk-ps = <0>;
306		gpmc,cs-on-ns = <0>;
307		gpmc,cs-rd-off-ns = <44>;
308		gpmc,cs-wr-off-ns = <44>;
309		gpmc,adv-on-ns = <6>;
310		gpmc,adv-rd-off-ns = <34>;
311		gpmc,adv-wr-off-ns = <44>;
312		gpmc,we-on-ns = <0>;
313		gpmc,we-off-ns = <40>;
314		gpmc,oe-on-ns = <0>;
315		gpmc,oe-off-ns = <54>;
316		gpmc,access-ns = <64>;
317		gpmc,rd-cycle-ns = <82>;
318		gpmc,wr-cycle-ns = <82>;
319		gpmc,wait-on-read = "true";
320		gpmc,wait-on-write = "true";
321		gpmc,bus-turnaround-ns = <0>;
322		gpmc,cycle2cycle-delay-ns = <0>;
323		gpmc,clk-activation-ns = <0>;
324		gpmc,wait-monitoring-ns = <0>;
325		gpmc,wr-access-ns = <40>;
326		gpmc,wr-data-mux-bus-ns = <0>;
327		gpmc,wait-pin = <1>;
328		#address-cells = <1>;
329		#size-cells = <1>;
330		partition@0 {
331			label = "NAND.MLO";
332			reg = <0x00000000 0x000020000>;
333		};
334		partition@1 {
335			label = "NAND.cfgscr";
336			reg = <0x00020000 0x00020000>;
337		};
338		partition@2 {
339			label = "NAND.dtb";
340			reg = <0x00040000 0x00020000>;
341		};
342		partition@3 {
343			label = "NAND.u-boot-env";
344			reg = <0x00060000 0x00020000>;
345		};
346		partition@4 {
347			label = "NAND.u-boot";
348			reg = <0x00080000 0x00080000>;
349		};
350		partition@5 {
351			label = "NAND.kernel";
352			reg = <0x00100000 0x00400000>;
353		};
354		partition@6 {
355			label = "NAND.rootfs";
356			reg = <0x00500000 0x08000000>;
357		};
358		partition@7 {
359			label = "NAND.user";
360			reg = <0x08500000 0x17b00000>;
361		};
362	};
363};
364