xref: /openbmc/u-boot/arch/arm/dts/am335x-bone-common.dtsi (revision eba6589f7e019d8ccb331a84a789b0c4d74f51f6)
1 /*
2  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 / {
10 	cpus {
11 		cpu@0 {
12 			cpu0-supply = <&dcdc2_reg>;
13 		};
14 	};
15 
16 	chosen {
17 		stdout-path = &uart0;
18 		tick-timer = &timer2;
19 	};
20 
21 	memory {
22 		device_type = "memory";
23 		reg = <0x80000000 0x10000000>; /* 256 MB */
24 	};
25 
26 	leds {
27 		pinctrl-names = "default";
28 		pinctrl-0 = <&user_leds_s0>;
29 
30 		compatible = "gpio-leds";
31 
32 		led@2 {
33 			label = "beaglebone:green:heartbeat";
34 			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
35 			linux,default-trigger = "heartbeat";
36 			default-state = "off";
37 		};
38 
39 		led@3 {
40 			label = "beaglebone:green:mmc0";
41 			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
42 			linux,default-trigger = "mmc0";
43 			default-state = "off";
44 		};
45 
46 		led@4 {
47 			label = "beaglebone:green:usr2";
48 			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
49 			linux,default-trigger = "cpu0";
50 			default-state = "off";
51 		};
52 
53 		led@5 {
54 			label = "beaglebone:green:usr3";
55 			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
56 			linux,default-trigger = "mmc1";
57 			default-state = "off";
58 		};
59 	};
60 
61 	vmmcsd_fixed: fixedregulator@0 {
62 		compatible = "regulator-fixed";
63 		regulator-name = "vmmcsd_fixed";
64 		regulator-min-microvolt = <3300000>;
65 		regulator-max-microvolt = <3300000>;
66 	};
67 };
68 
69 &am33xx_pinmux {
70 	pinctrl-names = "default";
71 	pinctrl-0 = <&clkout2_pin>;
72 
73 	user_leds_s0: user_leds_s0 {
74 		pinctrl-single,pins = <
75 			0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a5.gpio1_21 */
76 			0x58 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a6.gpio1_22 */
77 			0x5c (PIN_OUTPUT_PULLDOWN | MUX_MODE7)	/* gpmc_a7.gpio1_23 */
78 			0x60 (PIN_OUTPUT_PULLUP | MUX_MODE7)	/* gpmc_a8.gpio1_24 */
79 		>;
80 	};
81 
82 	i2c0_pins: pinmux_i2c0_pins {
83 		pinctrl-single,pins = <
84 			0x188 (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_sda.i2c0_sda */
85 			0x18c (PIN_INPUT_PULLUP | MUX_MODE0)	/* i2c0_scl.i2c0_scl */
86 		>;
87 	};
88 
89 	i2c2_pins: pinmux_i2c2_pins {
90 		pinctrl-single,pins = <
91 			0x178 (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_ctsn.i2c2_sda */
92 			0x17c (PIN_INPUT_PULLUP | MUX_MODE3)	/* uart1_rtsn.i2c2_scl */
93 		>;
94 	};
95 
96 	uart0_pins: pinmux_uart0_pins {
97 		pinctrl-single,pins = <
98 			0x170 (PIN_INPUT_PULLUP | MUX_MODE0)	/* uart0_rxd.uart0_rxd */
99 			0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* uart0_txd.uart0_txd */
100 		>;
101 	};
102 
103 	clkout2_pin: pinmux_clkout2_pin {
104 		pinctrl-single,pins = <
105 			0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3)	/* xdma_event_intr1.clkout2 */
106 		>;
107 	};
108 
109 	cpsw_default: cpsw_default {
110 		pinctrl-single,pins = <
111 			/* Slave 1 */
112 			0x110 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxerr.mii1_rxerr */
113 			0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txen.mii1_txen */
114 			0x118 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxdv.mii1_rxdv */
115 			0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd3.mii1_txd3 */
116 			0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd2.mii1_txd2 */
117 			0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd1.mii1_txd1 */
118 			0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)	/* mii1_txd0.mii1_txd0 */
119 			0x12c (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_txclk.mii1_txclk */
120 			0x130 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxclk.mii1_rxclk */
121 			0x134 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd3.mii1_rxd3 */
122 			0x138 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd2.mii1_rxd2 */
123 			0x13c (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd1.mii1_rxd1 */
124 			0x140 (PIN_INPUT_PULLUP | MUX_MODE0)	/* mii1_rxd0.mii1_rxd0 */
125 		>;
126 	};
127 
128 	cpsw_sleep: cpsw_sleep {
129 		pinctrl-single,pins = <
130 			/* Slave 1 reset value */
131 			0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
132 			0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
133 			0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
134 			0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
135 			0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
136 			0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
137 			0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
138 			0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
139 			0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
140 			0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
141 			0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
142 			0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
143 			0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
144 		>;
145 	};
146 
147 	davinci_mdio_default: davinci_mdio_default {
148 		pinctrl-single,pins = <
149 			/* MDIO */
150 			0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)	/* mdio_data.mdio_data */
151 			0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)			/* mdio_clk.mdio_clk */
152 		>;
153 	};
154 
155 	davinci_mdio_sleep: davinci_mdio_sleep {
156 		pinctrl-single,pins = <
157 			/* MDIO reset value */
158 			0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
159 			0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
160 		>;
161 	};
162 
163 	mmc1_pins: pinmux_mmc1_pins {
164 		pinctrl-single,pins = <
165 			0x160 (PIN_INPUT | MUX_MODE7) /* GPIO0_6 */
166 		>;
167 	};
168 
169 	emmc_pins: pinmux_emmc_pins {
170 		pinctrl-single,pins = <
171 			0x80 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
172 			0x84 (PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
173 			0x00 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
174 			0x04 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
175 			0x08 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
176 			0x0c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
177 			0x10 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
178 			0x14 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
179 			0x18 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
180 			0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
181 		>;
182 	};
183 };
184 
185 &uart0 {
186 	pinctrl-names = "default";
187 	pinctrl-0 = <&uart0_pins>;
188 
189 	status = "okay";
190 };
191 
192 &usb {
193 	status = "okay";
194 };
195 
196 &usb_ctrl_mod {
197 	status = "okay";
198 };
199 
200 &usb0_phy {
201 	status = "okay";
202 };
203 
204 &usb1_phy {
205 	status = "okay";
206 };
207 
208 &usb0 {
209 	status = "okay";
210 	dr_mode = "peripheral";
211 };
212 
213 &usb1 {
214 	status = "okay";
215 	dr_mode = "host";
216 };
217 
218 &cppi41dma  {
219 	status = "okay";
220 };
221 
222 &i2c0 {
223 	pinctrl-names = "default";
224 	pinctrl-0 = <&i2c0_pins>;
225 
226 	status = "okay";
227 	clock-frequency = <400000>;
228 
229 	tps: tps@24 {
230 		reg = <0x24>;
231 	};
232 
233 	baseboard_eeprom: baseboard_eeprom@50 {
234 		compatible = "at,24c256";
235 		reg = <0x50>;
236 
237 		#address-cells = <1>;
238 		#size-cells = <1>;
239 		baseboard_data: baseboard_data@0 {
240 			reg = <0 0x100>;
241 		};
242 	};
243 };
244 
245 &i2c2 {
246 	pinctrl-names = "default";
247 	pinctrl-0 = <&i2c2_pins>;
248 
249 	status = "okay";
250 	clock-frequency = <100000>;
251 
252 	cape_eeprom0: cape_eeprom0@54 {
253 		compatible = "at,24c256";
254 		reg = <0x54>;
255 		#address-cells = <1>;
256 		#size-cells = <1>;
257 		cape0_data: cape_data@0 {
258 			reg = <0 0x100>;
259 		};
260 	};
261 
262 	cape_eeprom1: cape_eeprom1@55 {
263 		compatible = "at,24c256";
264 		reg = <0x55>;
265 		#address-cells = <1>;
266 		#size-cells = <1>;
267 		cape1_data: cape_data@0 {
268 			reg = <0 0x100>;
269 		};
270 	};
271 
272 	cape_eeprom2: cape_eeprom2@56 {
273 		compatible = "at,24c256";
274 		reg = <0x56>;
275 		#address-cells = <1>;
276 		#size-cells = <1>;
277 		cape2_data: cape_data@0 {
278 			reg = <0 0x100>;
279 		};
280 	};
281 
282 	cape_eeprom3: cape_eeprom3@57 {
283 		compatible = "at,24c256";
284 		reg = <0x57>;
285 		#address-cells = <1>;
286 		#size-cells = <1>;
287 		cape3_data: cape_data@0 {
288 			reg = <0 0x100>;
289 		};
290 	};
291 };
292 
293 
294 /include/ "tps65217.dtsi"
295 
296 &tps {
297 	/*
298 	 * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
299 	 * mode") at poweroff.  Most BeagleBone versions do not support RTC-only
300 	 * mode and risk hardware damage if this mode is entered.
301 	 *
302 	 * For details, see linux-omap mailing list May 2015 thread
303 	 *	[PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
304 	 * In particular, messages:
305 	 *	http://www.spinics.net/lists/linux-omap/msg118585.html
306 	 *	http://www.spinics.net/lists/linux-omap/msg118615.html
307 	 *
308 	 * You can override this later with
309 	 *	&tps {  /delete-property/ ti,pmic-shutdown-controller;  }
310 	 * if you want to use RTC-only mode and made sure you are not affected
311 	 * by the hardware problems. (Tip: double-check by performing a current
312 	 * measurement after shutdown: it should be less than 1 mA.)
313 	 */
314 	ti,pmic-shutdown-controller;
315 
316 	regulators {
317 		dcdc1_reg: regulator@0 {
318 			regulator-name = "vdds_dpr";
319 			regulator-always-on;
320 		};
321 
322 		dcdc2_reg: regulator@1 {
323 			/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
324 			regulator-name = "vdd_mpu";
325 			regulator-min-microvolt = <925000>;
326 			regulator-max-microvolt = <1325000>;
327 			regulator-boot-on;
328 			regulator-always-on;
329 		};
330 
331 		dcdc3_reg: regulator@2 {
332 			/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
333 			regulator-name = "vdd_core";
334 			regulator-min-microvolt = <925000>;
335 			regulator-max-microvolt = <1150000>;
336 			regulator-boot-on;
337 			regulator-always-on;
338 		};
339 
340 		ldo1_reg: regulator@3 {
341 			regulator-name = "vio,vrtc,vdds";
342 			regulator-always-on;
343 		};
344 
345 		ldo2_reg: regulator@4 {
346 			regulator-name = "vdd_3v3aux";
347 			regulator-always-on;
348 		};
349 
350 		ldo3_reg: regulator@5 {
351 			regulator-name = "vdd_1v8";
352 			regulator-always-on;
353 		};
354 
355 		ldo4_reg: regulator@6 {
356 			regulator-name = "vdd_3v3a";
357 			regulator-always-on;
358 		};
359 	};
360 };
361 
362 &cpsw_emac0 {
363 	phy_id = <&davinci_mdio>, <0>;
364 	phy-mode = "mii";
365 };
366 
367 &cpsw_emac1 {
368 	phy_id = <&davinci_mdio>, <1>;
369 	phy-mode = "mii";
370 };
371 
372 &mac {
373 	pinctrl-names = "default", "sleep";
374 	pinctrl-0 = <&cpsw_default>;
375 	pinctrl-1 = <&cpsw_sleep>;
376 	status = "okay";
377 };
378 
379 &davinci_mdio {
380 	pinctrl-names = "default", "sleep";
381 	pinctrl-0 = <&davinci_mdio_default>;
382 	pinctrl-1 = <&davinci_mdio_sleep>;
383 	status = "okay";
384 };
385 
386 &mmc1 {
387 	status = "okay";
388 	bus-width = <0x4>;
389 	pinctrl-names = "default";
390 	pinctrl-0 = <&mmc1_pins>;
391 	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
392 };
393 
394 &aes {
395 	status = "okay";
396 };
397 
398 &sham {
399 	status = "okay";
400 };
401