1*67c145a8SYegor Yefremov/* 2*67c145a8SYegor Yefremov * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 3*67c145a8SYegor Yefremov * 4*67c145a8SYegor Yefremov * This program is free software; you can redistribute it and/or modify 5*67c145a8SYegor Yefremov * it under the terms of the GNU General Public License version 2 as 6*67c145a8SYegor Yefremov * published by the Free Software Foundation. 7*67c145a8SYegor Yefremov */ 8*67c145a8SYegor Yefremov 9*67c145a8SYegor Yefremov/* 10*67c145a8SYegor Yefremov * VScom OnRISC 11*67c145a8SYegor Yefremov * http://www.vscom.de 12*67c145a8SYegor Yefremov */ 13*67c145a8SYegor Yefremov 14*67c145a8SYegor Yefremov/dts-v1/; 15*67c145a8SYegor Yefremov 16*67c145a8SYegor Yefremov#include "am33xx.dtsi" 17*67c145a8SYegor Yefremov#include <dt-bindings/pwm/pwm.h> 18*67c145a8SYegor Yefremov 19*67c145a8SYegor Yefremov/ { 20*67c145a8SYegor Yefremov model = "OnRISC Baltos"; 21*67c145a8SYegor Yefremov compatible = "vscom,onrisc", "ti,am33xx"; 22*67c145a8SYegor Yefremov 23*67c145a8SYegor Yefremov chosen { 24*67c145a8SYegor Yefremov stdout-path = &uart0; 25*67c145a8SYegor Yefremov }; 26*67c145a8SYegor Yefremov 27*67c145a8SYegor Yefremov cpus { 28*67c145a8SYegor Yefremov cpu@0 { 29*67c145a8SYegor Yefremov cpu0-supply = <&vdd1_reg>; 30*67c145a8SYegor Yefremov }; 31*67c145a8SYegor Yefremov }; 32*67c145a8SYegor Yefremov 33*67c145a8SYegor Yefremov vbat: fixedregulator@0 { 34*67c145a8SYegor Yefremov compatible = "regulator-fixed"; 35*67c145a8SYegor Yefremov regulator-name = "vbat"; 36*67c145a8SYegor Yefremov regulator-min-microvolt = <5000000>; 37*67c145a8SYegor Yefremov regulator-max-microvolt = <5000000>; 38*67c145a8SYegor Yefremov regulator-boot-on; 39*67c145a8SYegor Yefremov }; 40*67c145a8SYegor Yefremov}; 41*67c145a8SYegor Yefremov 42*67c145a8SYegor Yefremov&am33xx_pinmux { 43*67c145a8SYegor Yefremov mmc1_pins: pinmux_mmc1_pins { 44*67c145a8SYegor Yefremov pinctrl-single,pins = < 45*67c145a8SYegor Yefremov 0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */ 46*67c145a8SYegor Yefremov 0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */ 47*67c145a8SYegor Yefremov 0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */ 48*67c145a8SYegor Yefremov 0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */ 49*67c145a8SYegor Yefremov 0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */ 50*67c145a8SYegor Yefremov 0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */ 51*67c145a8SYegor Yefremov >; 52*67c145a8SYegor Yefremov }; 53*67c145a8SYegor Yefremov 54*67c145a8SYegor Yefremov i2c1_pins: pinmux_i2c1_pins { 55*67c145a8SYegor Yefremov pinctrl-single,pins = < 56*67c145a8SYegor Yefremov 0x158 0x2a /* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */ 57*67c145a8SYegor Yefremov 0x15c 0x2a /* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */ 58*67c145a8SYegor Yefremov >; 59*67c145a8SYegor Yefremov }; 60*67c145a8SYegor Yefremov 61*67c145a8SYegor Yefremov tps65910_pins: pinmux_tps65910_pins { 62*67c145a8SYegor Yefremov pinctrl-single,pins = < 63*67c145a8SYegor Yefremov 0x078 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_ben1.gpio1[28] */ 64*67c145a8SYegor Yefremov >; 65*67c145a8SYegor Yefremov 66*67c145a8SYegor Yefremov }; 67*67c145a8SYegor Yefremov tca6416_pins: pinmux_tca6416_pins { 68*67c145a8SYegor Yefremov pinctrl-single,pins = < 69*67c145a8SYegor Yefremov AM33XX_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE7) /* xdma_event_intr1.gpio0[20] tca6416 stuff */ 70*67c145a8SYegor Yefremov >; 71*67c145a8SYegor Yefremov }; 72*67c145a8SYegor Yefremov 73*67c145a8SYegor Yefremov uart0_pins: pinmux_uart0_pins { 74*67c145a8SYegor Yefremov pinctrl-single,pins = < 75*67c145a8SYegor Yefremov 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 76*67c145a8SYegor Yefremov 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 77*67c145a8SYegor Yefremov >; 78*67c145a8SYegor Yefremov }; 79*67c145a8SYegor Yefremov 80*67c145a8SYegor Yefremov cpsw_default: cpsw_default { 81*67c145a8SYegor Yefremov pinctrl-single,pins = < 82*67c145a8SYegor Yefremov /* Slave 1 */ 83*67c145a8SYegor Yefremov 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */ 84*67c145a8SYegor Yefremov 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_tx_en.rmii1_txen */ 85*67c145a8SYegor Yefremov 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */ 86*67c145a8SYegor Yefremov 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */ 87*67c145a8SYegor Yefremov 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */ 88*67c145a8SYegor Yefremov 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */ 89*67c145a8SYegor Yefremov 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_ref_clk.rmii1_refclk */ 90*67c145a8SYegor Yefremov 91*67c145a8SYegor Yefremov 92*67c145a8SYegor Yefremov /* Slave 2 */ 93*67c145a8SYegor Yefremov 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ 94*67c145a8SYegor Yefremov 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ 95*67c145a8SYegor Yefremov 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ 96*67c145a8SYegor Yefremov 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ 97*67c145a8SYegor Yefremov 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ 98*67c145a8SYegor Yefremov 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ 99*67c145a8SYegor Yefremov 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ 100*67c145a8SYegor Yefremov 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ 101*67c145a8SYegor Yefremov 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ 102*67c145a8SYegor Yefremov 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ 103*67c145a8SYegor Yefremov 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ 104*67c145a8SYegor Yefremov 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ 105*67c145a8SYegor Yefremov >; 106*67c145a8SYegor Yefremov }; 107*67c145a8SYegor Yefremov 108*67c145a8SYegor Yefremov cpsw_sleep: cpsw_sleep { 109*67c145a8SYegor Yefremov pinctrl-single,pins = < 110*67c145a8SYegor Yefremov /* Slave 1 reset value */ 111*67c145a8SYegor Yefremov 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) 112*67c145a8SYegor Yefremov 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) 113*67c145a8SYegor Yefremov 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) 114*67c145a8SYegor Yefremov 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) 115*67c145a8SYegor Yefremov 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) 116*67c145a8SYegor Yefremov 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) 117*67c145a8SYegor Yefremov 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) 118*67c145a8SYegor Yefremov 119*67c145a8SYegor Yefremov /* Slave 2 reset value*/ 120*67c145a8SYegor Yefremov 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) 121*67c145a8SYegor Yefremov 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) 122*67c145a8SYegor Yefremov 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) 123*67c145a8SYegor Yefremov 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) 124*67c145a8SYegor Yefremov 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) 125*67c145a8SYegor Yefremov 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) 126*67c145a8SYegor Yefremov 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) 127*67c145a8SYegor Yefremov 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) 128*67c145a8SYegor Yefremov 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) 129*67c145a8SYegor Yefremov 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) 130*67c145a8SYegor Yefremov 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) 131*67c145a8SYegor Yefremov 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) 132*67c145a8SYegor Yefremov >; 133*67c145a8SYegor Yefremov }; 134*67c145a8SYegor Yefremov 135*67c145a8SYegor Yefremov davinci_mdio_default: davinci_mdio_default { 136*67c145a8SYegor Yefremov pinctrl-single,pins = < 137*67c145a8SYegor Yefremov /* MDIO */ 138*67c145a8SYegor Yefremov 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ 139*67c145a8SYegor Yefremov 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 140*67c145a8SYegor Yefremov >; 141*67c145a8SYegor Yefremov }; 142*67c145a8SYegor Yefremov 143*67c145a8SYegor Yefremov davinci_mdio_sleep: davinci_mdio_sleep { 144*67c145a8SYegor Yefremov pinctrl-single,pins = < 145*67c145a8SYegor Yefremov /* MDIO reset value */ 146*67c145a8SYegor Yefremov 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) 147*67c145a8SYegor Yefremov 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) 148*67c145a8SYegor Yefremov >; 149*67c145a8SYegor Yefremov }; 150*67c145a8SYegor Yefremov 151*67c145a8SYegor Yefremov nandflash_pins_s0: nandflash_pins_s0 { 152*67c145a8SYegor Yefremov pinctrl-single,pins = < 153*67c145a8SYegor Yefremov 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ 154*67c145a8SYegor Yefremov 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ 155*67c145a8SYegor Yefremov 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ 156*67c145a8SYegor Yefremov 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ 157*67c145a8SYegor Yefremov 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ 158*67c145a8SYegor Yefremov 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ 159*67c145a8SYegor Yefremov 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ 160*67c145a8SYegor Yefremov 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ 161*67c145a8SYegor Yefremov 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ 162*67c145a8SYegor Yefremov 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */ 163*67c145a8SYegor Yefremov 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ 164*67c145a8SYegor Yefremov 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ 165*67c145a8SYegor Yefremov 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ 166*67c145a8SYegor Yefremov 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ 167*67c145a8SYegor Yefremov 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ 168*67c145a8SYegor Yefremov >; 169*67c145a8SYegor Yefremov }; 170*67c145a8SYegor Yefremov}; 171*67c145a8SYegor Yefremov 172*67c145a8SYegor Yefremov&elm { 173*67c145a8SYegor Yefremov status = "okay"; 174*67c145a8SYegor Yefremov}; 175*67c145a8SYegor Yefremov 176*67c145a8SYegor Yefremov&gpmc { 177*67c145a8SYegor Yefremov pinctrl-names = "default"; 178*67c145a8SYegor Yefremov pinctrl-0 = <&nandflash_pins_s0>; 179*67c145a8SYegor Yefremov ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */ 180*67c145a8SYegor Yefremov status = "okay"; 181*67c145a8SYegor Yefremov 182*67c145a8SYegor Yefremov nand@0,0 { 183*67c145a8SYegor Yefremov reg = <0 0 0>; /* CS0, offset 0 */ 184*67c145a8SYegor Yefremov nand-bus-width = <8>; 185*67c145a8SYegor Yefremov ti,nand-ecc-opt = "bch8"; 186*67c145a8SYegor Yefremov ti,nand-xfer-type = "polled"; 187*67c145a8SYegor Yefremov 188*67c145a8SYegor Yefremov gpmc,device-nand = "true"; 189*67c145a8SYegor Yefremov gpmc,device-width = <1>; 190*67c145a8SYegor Yefremov gpmc,sync-clk-ps = <0>; 191*67c145a8SYegor Yefremov gpmc,cs-on-ns = <0>; 192*67c145a8SYegor Yefremov gpmc,cs-rd-off-ns = <44>; 193*67c145a8SYegor Yefremov gpmc,cs-wr-off-ns = <44>; 194*67c145a8SYegor Yefremov gpmc,adv-on-ns = <6>; 195*67c145a8SYegor Yefremov gpmc,adv-rd-off-ns = <34>; 196*67c145a8SYegor Yefremov gpmc,adv-wr-off-ns = <44>; 197*67c145a8SYegor Yefremov gpmc,we-on-ns = <0>; 198*67c145a8SYegor Yefremov gpmc,we-off-ns = <40>; 199*67c145a8SYegor Yefremov gpmc,oe-on-ns = <0>; 200*67c145a8SYegor Yefremov gpmc,oe-off-ns = <54>; 201*67c145a8SYegor Yefremov gpmc,access-ns = <64>; 202*67c145a8SYegor Yefremov gpmc,rd-cycle-ns = <82>; 203*67c145a8SYegor Yefremov gpmc,wr-cycle-ns = <82>; 204*67c145a8SYegor Yefremov gpmc,wait-on-read = "true"; 205*67c145a8SYegor Yefremov gpmc,wait-on-write = "true"; 206*67c145a8SYegor Yefremov gpmc,bus-turnaround-ns = <0>; 207*67c145a8SYegor Yefremov gpmc,cycle2cycle-delay-ns = <0>; 208*67c145a8SYegor Yefremov gpmc,clk-activation-ns = <0>; 209*67c145a8SYegor Yefremov gpmc,wait-monitoring-ns = <0>; 210*67c145a8SYegor Yefremov gpmc,wr-access-ns = <40>; 211*67c145a8SYegor Yefremov gpmc,wr-data-mux-bus-ns = <0>; 212*67c145a8SYegor Yefremov 213*67c145a8SYegor Yefremov #address-cells = <1>; 214*67c145a8SYegor Yefremov #size-cells = <1>; 215*67c145a8SYegor Yefremov elm_id = <&elm>; 216*67c145a8SYegor Yefremov 217*67c145a8SYegor Yefremov boot@0 { 218*67c145a8SYegor Yefremov label = "SPL"; 219*67c145a8SYegor Yefremov reg = <0x0 0x20000>; 220*67c145a8SYegor Yefremov }; 221*67c145a8SYegor Yefremov boot@20000{ 222*67c145a8SYegor Yefremov label = "SPL.backup1"; 223*67c145a8SYegor Yefremov reg = <0x20000 0x20000>; 224*67c145a8SYegor Yefremov }; 225*67c145a8SYegor Yefremov boot@40000 { 226*67c145a8SYegor Yefremov label = "SPL.backup2"; 227*67c145a8SYegor Yefremov reg = <0x40000 0x20000>; 228*67c145a8SYegor Yefremov }; 229*67c145a8SYegor Yefremov boot@60000 { 230*67c145a8SYegor Yefremov label = "SPL.backup3"; 231*67c145a8SYegor Yefremov reg = <0x60000 0x20000>; 232*67c145a8SYegor Yefremov }; 233*67c145a8SYegor Yefremov boot@80000 { 234*67c145a8SYegor Yefremov label = "u-boot"; 235*67c145a8SYegor Yefremov reg = <0x80000 0x1e0000>; 236*67c145a8SYegor Yefremov }; 237*67c145a8SYegor Yefremov boot@260000 { 238*67c145a8SYegor Yefremov label = "UBI"; 239*67c145a8SYegor Yefremov reg = <0x260000 0xfda0000>; 240*67c145a8SYegor Yefremov }; 241*67c145a8SYegor Yefremov }; 242*67c145a8SYegor Yefremov}; 243*67c145a8SYegor Yefremov 244*67c145a8SYegor Yefremov&uart0 { 245*67c145a8SYegor Yefremov pinctrl-names = "default"; 246*67c145a8SYegor Yefremov pinctrl-0 = <&uart0_pins>; 247*67c145a8SYegor Yefremov 248*67c145a8SYegor Yefremov status = "okay"; 249*67c145a8SYegor Yefremov}; 250*67c145a8SYegor Yefremov 251*67c145a8SYegor Yefremov&i2c1 { 252*67c145a8SYegor Yefremov pinctrl-names = "default"; 253*67c145a8SYegor Yefremov pinctrl-0 = <&i2c1_pins>; 254*67c145a8SYegor Yefremov 255*67c145a8SYegor Yefremov status = "okay"; 256*67c145a8SYegor Yefremov clock-frequency = <1000>; 257*67c145a8SYegor Yefremov 258*67c145a8SYegor Yefremov tps: tps@2d { 259*67c145a8SYegor Yefremov reg = <0x2d>; 260*67c145a8SYegor Yefremov gpio-controller; 261*67c145a8SYegor Yefremov #gpio-cells = <2>; 262*67c145a8SYegor Yefremov interrupt-parent = <&gpio1>; 263*67c145a8SYegor Yefremov interrupts = <28 GPIO_ACTIVE_LOW>; 264*67c145a8SYegor Yefremov pinctrl-names = "default"; 265*67c145a8SYegor Yefremov pinctrl-0 = <&tps65910_pins>; 266*67c145a8SYegor Yefremov }; 267*67c145a8SYegor Yefremov 268*67c145a8SYegor Yefremov at24@50 { 269*67c145a8SYegor Yefremov compatible = "at24,24c02"; 270*67c145a8SYegor Yefremov pagesize = <8>; 271*67c145a8SYegor Yefremov reg = <0x50>; 272*67c145a8SYegor Yefremov }; 273*67c145a8SYegor Yefremov 274*67c145a8SYegor Yefremov tca6416: gpio@20 { 275*67c145a8SYegor Yefremov compatible = "ti,tca6416"; 276*67c145a8SYegor Yefremov reg = <0x20>; 277*67c145a8SYegor Yefremov gpio-controller; 278*67c145a8SYegor Yefremov #gpio-cells = <2>; 279*67c145a8SYegor Yefremov interrupt-parent = <&gpio0>; 280*67c145a8SYegor Yefremov interrupts = <20 GPIO_ACTIVE_LOW>; 281*67c145a8SYegor Yefremov pinctrl-names = "default"; 282*67c145a8SYegor Yefremov pinctrl-0 = <&tca6416_pins>; 283*67c145a8SYegor Yefremov }; 284*67c145a8SYegor Yefremov}; 285*67c145a8SYegor Yefremov 286*67c145a8SYegor Yefremov&usb { 287*67c145a8SYegor Yefremov status = "okay"; 288*67c145a8SYegor Yefremov}; 289*67c145a8SYegor Yefremov 290*67c145a8SYegor Yefremov&usb_ctrl_mod { 291*67c145a8SYegor Yefremov status = "okay"; 292*67c145a8SYegor Yefremov}; 293*67c145a8SYegor Yefremov 294*67c145a8SYegor Yefremov&usb0_phy { 295*67c145a8SYegor Yefremov status = "okay"; 296*67c145a8SYegor Yefremov}; 297*67c145a8SYegor Yefremov 298*67c145a8SYegor Yefremov&usb1_phy { 299*67c145a8SYegor Yefremov status = "okay"; 300*67c145a8SYegor Yefremov}; 301*67c145a8SYegor Yefremov 302*67c145a8SYegor Yefremov&usb0 { 303*67c145a8SYegor Yefremov status = "okay"; 304*67c145a8SYegor Yefremov dr_mode = "host"; 305*67c145a8SYegor Yefremov}; 306*67c145a8SYegor Yefremov 307*67c145a8SYegor Yefremov&usb1 { 308*67c145a8SYegor Yefremov status = "okay"; 309*67c145a8SYegor Yefremov dr_mode = "host"; 310*67c145a8SYegor Yefremov}; 311*67c145a8SYegor Yefremov 312*67c145a8SYegor Yefremov&cppi41dma { 313*67c145a8SYegor Yefremov status = "okay"; 314*67c145a8SYegor Yefremov}; 315*67c145a8SYegor Yefremov 316*67c145a8SYegor Yefremov/include/ "tps65910.dtsi" 317*67c145a8SYegor Yefremov 318*67c145a8SYegor Yefremov&tps { 319*67c145a8SYegor Yefremov vcc1-supply = <&vbat>; 320*67c145a8SYegor Yefremov vcc2-supply = <&vbat>; 321*67c145a8SYegor Yefremov vcc3-supply = <&vbat>; 322*67c145a8SYegor Yefremov vcc4-supply = <&vbat>; 323*67c145a8SYegor Yefremov vcc5-supply = <&vbat>; 324*67c145a8SYegor Yefremov vcc6-supply = <&vbat>; 325*67c145a8SYegor Yefremov vcc7-supply = <&vbat>; 326*67c145a8SYegor Yefremov vccio-supply = <&vbat>; 327*67c145a8SYegor Yefremov 328*67c145a8SYegor Yefremov ti,en-ck32k-xtal = <1>; 329*67c145a8SYegor Yefremov 330*67c145a8SYegor Yefremov regulators { 331*67c145a8SYegor Yefremov vrtc_reg: regulator@0 { 332*67c145a8SYegor Yefremov regulator-always-on; 333*67c145a8SYegor Yefremov }; 334*67c145a8SYegor Yefremov 335*67c145a8SYegor Yefremov vio_reg: regulator@1 { 336*67c145a8SYegor Yefremov regulator-always-on; 337*67c145a8SYegor Yefremov }; 338*67c145a8SYegor Yefremov 339*67c145a8SYegor Yefremov vdd1_reg: regulator@2 { 340*67c145a8SYegor Yefremov /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 341*67c145a8SYegor Yefremov regulator-name = "vdd_mpu"; 342*67c145a8SYegor Yefremov regulator-min-microvolt = <912500>; 343*67c145a8SYegor Yefremov regulator-max-microvolt = <1312500>; 344*67c145a8SYegor Yefremov regulator-boot-on; 345*67c145a8SYegor Yefremov regulator-always-on; 346*67c145a8SYegor Yefremov }; 347*67c145a8SYegor Yefremov 348*67c145a8SYegor Yefremov vdd2_reg: regulator@3 { 349*67c145a8SYegor Yefremov /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 350*67c145a8SYegor Yefremov regulator-name = "vdd_core"; 351*67c145a8SYegor Yefremov regulator-min-microvolt = <912500>; 352*67c145a8SYegor Yefremov regulator-max-microvolt = <1150000>; 353*67c145a8SYegor Yefremov regulator-boot-on; 354*67c145a8SYegor Yefremov regulator-always-on; 355*67c145a8SYegor Yefremov }; 356*67c145a8SYegor Yefremov 357*67c145a8SYegor Yefremov vdd3_reg: regulator@4 { 358*67c145a8SYegor Yefremov regulator-always-on; 359*67c145a8SYegor Yefremov }; 360*67c145a8SYegor Yefremov 361*67c145a8SYegor Yefremov vdig1_reg: regulator@5 { 362*67c145a8SYegor Yefremov regulator-always-on; 363*67c145a8SYegor Yefremov }; 364*67c145a8SYegor Yefremov 365*67c145a8SYegor Yefremov vdig2_reg: regulator@6 { 366*67c145a8SYegor Yefremov regulator-always-on; 367*67c145a8SYegor Yefremov }; 368*67c145a8SYegor Yefremov 369*67c145a8SYegor Yefremov vpll_reg: regulator@7 { 370*67c145a8SYegor Yefremov regulator-always-on; 371*67c145a8SYegor Yefremov }; 372*67c145a8SYegor Yefremov 373*67c145a8SYegor Yefremov vdac_reg: regulator@8 { 374*67c145a8SYegor Yefremov regulator-always-on; 375*67c145a8SYegor Yefremov }; 376*67c145a8SYegor Yefremov 377*67c145a8SYegor Yefremov vaux1_reg: regulator@9 { 378*67c145a8SYegor Yefremov regulator-always-on; 379*67c145a8SYegor Yefremov }; 380*67c145a8SYegor Yefremov 381*67c145a8SYegor Yefremov vaux2_reg: regulator@10 { 382*67c145a8SYegor Yefremov regulator-always-on; 383*67c145a8SYegor Yefremov }; 384*67c145a8SYegor Yefremov 385*67c145a8SYegor Yefremov vaux33_reg: regulator@11 { 386*67c145a8SYegor Yefremov regulator-always-on; 387*67c145a8SYegor Yefremov }; 388*67c145a8SYegor Yefremov 389*67c145a8SYegor Yefremov vmmc_reg: regulator@12 { 390*67c145a8SYegor Yefremov regulator-min-microvolt = <1800000>; 391*67c145a8SYegor Yefremov regulator-max-microvolt = <3300000>; 392*67c145a8SYegor Yefremov regulator-always-on; 393*67c145a8SYegor Yefremov }; 394*67c145a8SYegor Yefremov }; 395*67c145a8SYegor Yefremov}; 396*67c145a8SYegor Yefremov 397*67c145a8SYegor Yefremov&mac { 398*67c145a8SYegor Yefremov pinctrl-names = "default", "sleep"; 399*67c145a8SYegor Yefremov pinctrl-0 = <&cpsw_default>; 400*67c145a8SYegor Yefremov pinctrl-1 = <&cpsw_sleep>; 401*67c145a8SYegor Yefremov dual_emac = <1>; 402*67c145a8SYegor Yefremov 403*67c145a8SYegor Yefremov status = "okay"; 404*67c145a8SYegor Yefremov}; 405*67c145a8SYegor Yefremov 406*67c145a8SYegor Yefremov&davinci_mdio { 407*67c145a8SYegor Yefremov pinctrl-names = "default", "sleep"; 408*67c145a8SYegor Yefremov pinctrl-0 = <&davinci_mdio_default>; 409*67c145a8SYegor Yefremov pinctrl-1 = <&davinci_mdio_sleep>; 410*67c145a8SYegor Yefremov 411*67c145a8SYegor Yefremov status = "okay"; 412*67c145a8SYegor Yefremov}; 413*67c145a8SYegor Yefremov 414*67c145a8SYegor Yefremov&cpsw_emac0 { 415*67c145a8SYegor Yefremov phy_id = <&davinci_mdio>, <0>; 416*67c145a8SYegor Yefremov phy-mode = "rmii"; 417*67c145a8SYegor Yefremov dual_emac_res_vlan = <1>; 418*67c145a8SYegor Yefremov}; 419*67c145a8SYegor Yefremov 420*67c145a8SYegor Yefremov&cpsw_emac1 { 421*67c145a8SYegor Yefremov phy_id = <&davinci_mdio>, <7>; 422*67c145a8SYegor Yefremov phy-mode = "rgmii-txid"; 423*67c145a8SYegor Yefremov dual_emac_res_vlan = <2>; 424*67c145a8SYegor Yefremov}; 425*67c145a8SYegor Yefremov 426*67c145a8SYegor Yefremov&phy_sel { 427*67c145a8SYegor Yefremov rmii-clock-ext = <1>; 428*67c145a8SYegor Yefremov}; 429*67c145a8SYegor Yefremov 430*67c145a8SYegor Yefremov&mmc1 { 431*67c145a8SYegor Yefremov pinctrl-names = "default"; 432*67c145a8SYegor Yefremov pinctrl-0 = <&mmc1_pins>; 433*67c145a8SYegor Yefremov vmmc-supply = <&vmmc_reg>; 434*67c145a8SYegor Yefremov status = "okay"; 435*67c145a8SYegor Yefremov}; 436*67c145a8SYegor Yefremov 437*67c145a8SYegor Yefremov&gpio0 { 438*67c145a8SYegor Yefremov ti,no-reset-on-init; 439*67c145a8SYegor Yefremov}; 440