xref: /openbmc/u-boot/arch/arm/cpu/sa1100/cpu.c (revision f13606b7)
1 /*
2  * (C) Copyright 2002
3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4  * Marius Groeger <mgroeger@sysgo.de>
5  *
6  * (C) Copyright 2002
7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8  * Alex Zuepke <azu@sysgo.de>
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 /*
14  * CPU specific code
15  */
16 
17 #include <common.h>
18 #include <command.h>
19 #include <asm/system.h>
20 #include <asm/io.h>
21 
22 #ifdef CONFIG_USE_IRQ
23 DECLARE_GLOBAL_DATA_PTR;
24 #endif
25 
26 static void cache_flush(void);
27 
28 int cleanup_before_linux (void)
29 {
30 	/*
31 	 * this function is called just before we call linux
32 	 * it prepares the processor for linux
33 	 *
34 	 * just disable everything that can disturb booting linux
35 	 */
36 
37 	disable_interrupts ();
38 
39 	/* turn off I-cache */
40 	icache_disable();
41 	dcache_disable();
42 
43 	/* flush I-cache */
44 	cache_flush();
45 
46 	return (0);
47 }
48 
49 /* flush I/D-cache */
50 static void cache_flush (void)
51 {
52 	unsigned long i = 0;
53 
54 	asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
55 }
56 
57 #define RST_BASE 0x90030000
58 #define RSRR	0x00
59 #define RCSR	0x04
60 
61 __attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
62 {
63 	/* repeat endlessly */
64 	while (1) {
65 		writel(0, RST_BASE + RCSR);
66 		writel(1, RST_BASE + RSRR);
67 	}
68 }
69