184ad6884SPeter Tyser/* 2*20f7b1b7SMarek Vasut * armboot - Startup Code for XScale CPU-core 384ad6884SPeter Tyser * 484ad6884SPeter Tyser * Copyright (C) 1998 Dan Malek <dmalek@jlc.net> 584ad6884SPeter Tyser * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se> 684ad6884SPeter Tyser * Copyright (C) 2000 Wolfgang Denk <wd@denx.de> 784ad6884SPeter Tyser * Copyright (C) 2001 Alex Zuepke <azu@sysgo.de> 8*20f7b1b7SMarek Vasut * Copyright (C) 2001 Marius Groger <mag@sysgo.de> 9*20f7b1b7SMarek Vasut * Copyright (C) 2002 Alex Zupke <azu@sysgo.de> 10*20f7b1b7SMarek Vasut * Copyright (C) 2002 Gary Jennejohn <garyj@denx.de> 1184ad6884SPeter Tyser * Copyright (C) 2002 Kyle Harris <kharris@nexus-tech.net> 1284ad6884SPeter Tyser * Copyright (C) 2003 Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de> 13*20f7b1b7SMarek Vasut * Copyright (C) 2003 Kshitij <kshitij@ti.com> 14*20f7b1b7SMarek Vasut * Copyright (C) 2003 Richard Woodruff <r-woodruff2@ti.com> 15*20f7b1b7SMarek Vasut * Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de> 16*20f7b1b7SMarek Vasut * Copyright (C) 2004 Texas Instruments <r-woodruff2@ti.com> 17*20f7b1b7SMarek Vasut * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> 1884ad6884SPeter Tyser * 1984ad6884SPeter Tyser * See file CREDITS for list of people who contributed to this 2084ad6884SPeter Tyser * project. 2184ad6884SPeter Tyser * 2284ad6884SPeter Tyser * This program is free software; you can redistribute it and/or 2384ad6884SPeter Tyser * modify it under the terms of the GNU General Public License as 2484ad6884SPeter Tyser * published by the Free Software Foundation; either version 2 of 2584ad6884SPeter Tyser * the License, or (at your option) any later version. 2684ad6884SPeter Tyser * 2784ad6884SPeter Tyser * This program is distributed in the hope that it will be useful, 2884ad6884SPeter Tyser * but WITHOUT ANY WARRANTY; without even the implied warranty of 2984ad6884SPeter Tyser * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 3084ad6884SPeter Tyser * GNU General Public License for more details. 3184ad6884SPeter Tyser * 3284ad6884SPeter Tyser * You should have received a copy of the GNU General Public License 3384ad6884SPeter Tyser * along with this program; if not, write to the Free Software 3484ad6884SPeter Tyser * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 3584ad6884SPeter Tyser * MA 02111-1307 USA 3684ad6884SPeter Tyser */ 3784ad6884SPeter Tyser 3825ddd1fbSWolfgang Denk#include <asm-offsets.h> 3984ad6884SPeter Tyser#include <config.h> 4084ad6884SPeter Tyser#include <version.h> 4184ad6884SPeter Tyser.globl _start 4284ad6884SPeter Tyser_start: b reset 43401bb30bSAneesh V#ifdef CONFIG_SPL_BUILD 445ab877b6SMarek Vasut ldr pc, _hang 455ab877b6SMarek Vasut ldr pc, _hang 465ab877b6SMarek Vasut ldr pc, _hang 475ab877b6SMarek Vasut ldr pc, _hang 485ab877b6SMarek Vasut ldr pc, _hang 495ab877b6SMarek Vasut ldr pc, _hang 505ab877b6SMarek Vasut ldr pc, _hang 515ab877b6SMarek Vasut 525ab877b6SMarek Vasut_hang: 535ab877b6SMarek Vasut .word do_hang 545ab877b6SMarek Vasut .word 0x12345678 555ab877b6SMarek Vasut .word 0x12345678 565ab877b6SMarek Vasut .word 0x12345678 575ab877b6SMarek Vasut .word 0x12345678 585ab877b6SMarek Vasut .word 0x12345678 595ab877b6SMarek Vasut .word 0x12345678 605ab877b6SMarek Vasut .word 0x12345678 /* now 16*4=64 */ 615ab877b6SMarek Vasut#else 6284ad6884SPeter Tyser ldr pc, _undefined_instruction 6384ad6884SPeter Tyser ldr pc, _software_interrupt 6484ad6884SPeter Tyser ldr pc, _prefetch_abort 6584ad6884SPeter Tyser ldr pc, _data_abort 6684ad6884SPeter Tyser ldr pc, _not_used 6784ad6884SPeter Tyser ldr pc, _irq 6884ad6884SPeter Tyser ldr pc, _fiq 6984ad6884SPeter Tyser 7084ad6884SPeter Tyser_undefined_instruction: .word undefined_instruction 7184ad6884SPeter Tyser_software_interrupt: .word software_interrupt 7284ad6884SPeter Tyser_prefetch_abort: .word prefetch_abort 7384ad6884SPeter Tyser_data_abort: .word data_abort 7484ad6884SPeter Tyser_not_used: .word not_used 7584ad6884SPeter Tyser_irq: .word irq 7684ad6884SPeter Tyser_fiq: .word fiq 77*20f7b1b7SMarek Vasut_pad: .word 0x12345678 /* now 16*4=64 */ 78401bb30bSAneesh V#endif /* CONFIG_SPL_BUILD */ 79*20f7b1b7SMarek Vasut.global _end_vect 80*20f7b1b7SMarek Vasut_end_vect: 8184ad6884SPeter Tyser 8284ad6884SPeter Tyser .balignl 16,0xdeadbeef 8384ad6884SPeter Tyser/* 84*20f7b1b7SMarek Vasut ************************************************************************* 85*20f7b1b7SMarek Vasut * 8684ad6884SPeter Tyser * Startup Code (reset vector) 8784ad6884SPeter Tyser * 88*20f7b1b7SMarek Vasut * do important init only if we don't start from memory! 89*20f7b1b7SMarek Vasut * setup Memory and board specific bits prior to relocation. 90*20f7b1b7SMarek Vasut * relocate armboot to ram 91*20f7b1b7SMarek Vasut * setup stack 92*20f7b1b7SMarek Vasut * 93*20f7b1b7SMarek Vasut ************************************************************************* 9484ad6884SPeter Tyser */ 9584ad6884SPeter Tyser 965347f68cSHeiko Schocher.globl _TEXT_BASE 9784ad6884SPeter Tyser_TEXT_BASE: 98*20f7b1b7SMarek Vasut#ifdef CONFIG_SPL_BUILD 99*20f7b1b7SMarek Vasut .word CONFIG_SPL_TEXT_BASE 100*20f7b1b7SMarek Vasut#else 10114d0a02aSWolfgang Denk .word CONFIG_SYS_TEXT_BASE 102*20f7b1b7SMarek Vasut#endif 10384ad6884SPeter Tyser 10484ad6884SPeter Tyser/* 10584ad6884SPeter Tyser * These are defined in the board-specific linker script. 106*20f7b1b7SMarek Vasut * Subtracting _start from them lets the linker put their 107*20f7b1b7SMarek Vasut * relative position in the executable instead of leaving 108*20f7b1b7SMarek Vasut * them null. 10984ad6884SPeter Tyser */ 1106e96cf9aSMarek Vasut.globl _bss_start_ofs 1116e96cf9aSMarek Vasut_bss_start_ofs: 1126e96cf9aSMarek Vasut .word __bss_start - _start 11384ad6884SPeter Tyser 1146e96cf9aSMarek Vasut.globl _bss_end_ofs 1156e96cf9aSMarek Vasut_bss_end_ofs: 11644c6e659SPo-Yu Chuang .word __bss_end__ - _start 11784ad6884SPeter Tyser 118f326cbbaSPo-Yu Chuang.globl _end_ofs 119f326cbbaSPo-Yu Chuang_end_ofs: 120f326cbbaSPo-Yu Chuang .word _end - _start 121f326cbbaSPo-Yu Chuang 12284ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ 12384ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */ 12484ad6884SPeter Tyser.globl IRQ_STACK_START 12584ad6884SPeter TyserIRQ_STACK_START: 12684ad6884SPeter Tyser .word 0x0badc0de 12784ad6884SPeter Tyser 12884ad6884SPeter Tyser/* IRQ stack memory (calculated at run-time) */ 12984ad6884SPeter Tyser.globl FIQ_STACK_START 13084ad6884SPeter TyserFIQ_STACK_START: 13184ad6884SPeter Tyser .word 0x0badc0de 132*20f7b1b7SMarek Vasut#endif 13384ad6884SPeter Tyser 1345347f68cSHeiko Schocher/* IRQ stack memory (calculated at run-time) + 8 bytes */ 1355347f68cSHeiko Schocher.globl IRQ_STACK_START_IN 1365347f68cSHeiko SchocherIRQ_STACK_START_IN: 1375347f68cSHeiko Schocher .word 0x0badc0de 1385347f68cSHeiko Schocher 1395347f68cSHeiko Schocher/* 1405347f68cSHeiko Schocher * the actual reset code 1415347f68cSHeiko Schocher */ 1425347f68cSHeiko Schocher 1435347f68cSHeiko Schocherreset: 1445347f68cSHeiko Schocher /* 1455347f68cSHeiko Schocher * set the cpu to SVC32 mode 1465347f68cSHeiko Schocher */ 1475347f68cSHeiko Schocher mrs r0,cpsr 1485347f68cSHeiko Schocher bic r0,r0,#0x1f 1495347f68cSHeiko Schocher orr r0,r0,#0xd3 1505347f68cSHeiko Schocher msr cpsr,r0 1515347f68cSHeiko Schocher 152*20f7b1b7SMarek Vasut#ifndef CONFIG_SKIP_LOWLEVEL_INIT 153*20f7b1b7SMarek Vasut bl cpu_init_crit 154*20f7b1b7SMarek Vasut#endif 1555347f68cSHeiko Schocher 1565347f68cSHeiko Schocher/* Set stackpointer in internal RAM to call board_init_f */ 1575347f68cSHeiko Schochercall_board_init_f: 1585347f68cSHeiko Schocher ldr sp, =(CONFIG_SYS_INIT_SP_ADDR) 159296cae73SHeiko Schocher bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ 1605347f68cSHeiko Schocher ldr r0, =0x00000000 1615347f68cSHeiko Schocher bl board_init_f 1625347f68cSHeiko Schocher 1635347f68cSHeiko Schocher/*------------------------------------------------------------------------------*/ 164*20f7b1b7SMarek Vasut#ifndef CONFIG_SPL_BUILD 1655347f68cSHeiko Schocher/* 1665347f68cSHeiko Schocher * void relocate_code (addr_sp, gd, addr_moni) 1675347f68cSHeiko Schocher * 1685347f68cSHeiko Schocher * This "function" does not return, instead it continues in RAM 1695347f68cSHeiko Schocher * after relocating the monitor code. 1705347f68cSHeiko Schocher * 1715347f68cSHeiko Schocher */ 1725347f68cSHeiko Schocher .globl relocate_code 1735347f68cSHeiko Schocherrelocate_code: 1745347f68cSHeiko Schocher mov r4, r0 /* save addr_sp */ 1755347f68cSHeiko Schocher mov r5, r1 /* save addr of gd */ 1765347f68cSHeiko Schocher mov r6, r2 /* save addr of destination */ 1775347f68cSHeiko Schocher 1785347f68cSHeiko Schocher /* Set up the stack */ 1795347f68cSHeiko Schocherstack_setup: 1805347f68cSHeiko Schocher mov sp, r4 1815347f68cSHeiko Schocher 1825347f68cSHeiko Schocher adr r0, _start 183a1a47d3cSAndreas Bießmann cmp r0, r6 184a1a47d3cSAndreas Bießmann beq clear_bss /* skip relocation */ 185a78fb68fSAndreas Bießmann mov r1, r6 /* r1 <- scratch for copy_loop */ 1866e96cf9aSMarek Vasut ldr r3, _bss_start_ofs 1876e96cf9aSMarek Vasut add r2, r0, r3 /* r2 <- source end address */ 1885347f68cSHeiko Schocher 1895347f68cSHeiko Schochercopy_loop: 190*20f7b1b7SMarek Vasut ldmia r0!, {r9-r10} /* copy from source address [r0] */ 191*20f7b1b7SMarek Vasut stmia r1!, {r9-r10} /* copy to target address [r1] */ 192da90d4ceSAlbert Aribaud cmp r0, r2 /* until source end address [r2] */ 193da90d4ceSAlbert Aribaud blo copy_loop 1945347f68cSHeiko Schocher 195401bb30bSAneesh V#ifndef CONFIG_SPL_BUILD 1966e96cf9aSMarek Vasut /* 1976e96cf9aSMarek Vasut * fix .rel.dyn relocations 1986e96cf9aSMarek Vasut */ 1996e96cf9aSMarek Vasut ldr r0, _TEXT_BASE /* r0 <- Text base */ 200a78fb68fSAndreas Bießmann sub r9, r6, r0 /* r9 <- relocation offset */ 2016e96cf9aSMarek Vasut ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */ 2026e96cf9aSMarek Vasut add r10, r10, r0 /* r10 <- sym table in FLASH */ 2036e96cf9aSMarek Vasut ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */ 2046e96cf9aSMarek Vasut add r2, r2, r0 /* r2 <- rel dyn start in FLASH */ 2056e96cf9aSMarek Vasut ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */ 2066e96cf9aSMarek Vasut add r3, r3, r0 /* r3 <- rel dyn end in FLASH */ 2075347f68cSHeiko Schocherfixloop: 2086e96cf9aSMarek Vasut ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */ 209*20f7b1b7SMarek Vasut add r0, r0, r9 /* r0 <- location to fix up in RAM */ 2106e96cf9aSMarek Vasut ldr r1, [r2, #4] 2111f52d89fSAndreas Bießmann and r7, r1, #0xff 2121f52d89fSAndreas Bießmann cmp r7, #23 /* relative fixup? */ 2136e96cf9aSMarek Vasut beq fixrel 2141f52d89fSAndreas Bießmann cmp r7, #2 /* absolute fixup? */ 2156e96cf9aSMarek Vasut beq fixabs 2166e96cf9aSMarek Vasut /* ignore unknown type of fixup */ 2176e96cf9aSMarek Vasut b fixnext 2186e96cf9aSMarek Vasutfixabs: 2196e96cf9aSMarek Vasut /* absolute fix: set location to (offset) symbol value */ 2206e96cf9aSMarek Vasut mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */ 2216e96cf9aSMarek Vasut add r1, r10, r1 /* r1 <- address of symbol in table */ 2226e96cf9aSMarek Vasut ldr r1, [r1, #4] /* r1 <- symbol value */ 2233600945bSWolfgang Denk add r1, r1, r9 /* r1 <- relocated sym addr */ 2246e96cf9aSMarek Vasut b fixnext 2256e96cf9aSMarek Vasutfixrel: 2266e96cf9aSMarek Vasut /* relative fix: increase location by offset */ 2276e96cf9aSMarek Vasut ldr r1, [r0] 2286e96cf9aSMarek Vasut add r1, r1, r9 2296e96cf9aSMarek Vasutfixnext: 2306e96cf9aSMarek Vasut str r1, [r0] 2316e96cf9aSMarek Vasut add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ 2325347f68cSHeiko Schocher cmp r2, r3 2336e96cf9aSMarek Vasut blo fixloop 234*20f7b1b7SMarek Vasut#endif 2355347f68cSHeiko Schocher 2365347f68cSHeiko Schocherclear_bss: 237401bb30bSAneesh V#ifndef CONFIG_SPL_BUILD 2386e96cf9aSMarek Vasut ldr r0, _bss_start_ofs 2396e96cf9aSMarek Vasut ldr r1, _bss_end_ofs 240a78fb68fSAndreas Bießmann mov r4, r6 /* reloc addr */ 2415347f68cSHeiko Schocher add r0, r0, r4 2425347f68cSHeiko Schocher add r1, r1, r4 2435347f68cSHeiko Schocher mov r2, #0x00000000 /* clear */ 2445347f68cSHeiko Schocher 2455347f68cSHeiko Schocherclbss_l:str r2, [r0] /* clear loop... */ 2465347f68cSHeiko Schocher add r0, r0, #4 2475347f68cSHeiko Schocher cmp r0, r1 2485347f68cSHeiko Schocher bne clbss_l 249401bb30bSAneesh V#endif /* #ifndef CONFIG_SPL_BUILD */ 2505347f68cSHeiko Schocher 2515347f68cSHeiko Schocher/* 2525347f68cSHeiko Schocher * We are done. Do not return, instead branch to second part of board 2535347f68cSHeiko Schocher * initialization, now running from RAM. 2545347f68cSHeiko Schocher */ 255*20f7b1b7SMarek Vasut#ifdef CONFIG_ONENAND_SPL 256*20f7b1b7SMarek Vasut ldr r0, _onenand_boot_ofs 2576e96cf9aSMarek Vasut mov pc, r0 2585347f68cSHeiko Schocher 259*20f7b1b7SMarek Vasut_onenand_boot_ofs: 260*20f7b1b7SMarek Vasut .word onenand_boot 2615347f68cSHeiko Schocher#else 262*20f7b1b7SMarek Vasutjump_2_ram: 2636e96cf9aSMarek Vasut ldr r0, _board_init_r_ofs 264*20f7b1b7SMarek Vasut ldr r1, _TEXT_BASE 265123fb7deSDarius Augulis add lr, r0, r1 266123fb7deSDarius Augulis add lr, lr, r9 2675347f68cSHeiko Schocher /* setup parameters for board_init_r */ 2685347f68cSHeiko Schocher mov r0, r5 /* gd_t */ 269a78fb68fSAndreas Bießmann mov r1, r6 /* dest_addr */ 2705347f68cSHeiko Schocher /* jump to it ... */ 2715347f68cSHeiko Schocher mov pc, lr 2725347f68cSHeiko Schocher 2736e96cf9aSMarek Vasut_board_init_r_ofs: 2746e96cf9aSMarek Vasut .word board_init_r - _start 275*20f7b1b7SMarek Vasut#endif 2765347f68cSHeiko Schocher 2776e96cf9aSMarek Vasut_rel_dyn_start_ofs: 2786e96cf9aSMarek Vasut .word __rel_dyn_start - _start 2796e96cf9aSMarek Vasut_rel_dyn_end_ofs: 2806e96cf9aSMarek Vasut .word __rel_dyn_end - _start 2816e96cf9aSMarek Vasut_dynsym_start_ofs: 2826e96cf9aSMarek Vasut .word __dynsym_start - _start 2832cad92fdSMarek Vasut#endif 284*20f7b1b7SMarek Vasut/* 285*20f7b1b7SMarek Vasut ************************************************************************* 286*20f7b1b7SMarek Vasut * 287*20f7b1b7SMarek Vasut * CPU_init_critical registers 288*20f7b1b7SMarek Vasut * 289*20f7b1b7SMarek Vasut * setup important registers 290*20f7b1b7SMarek Vasut * setup memory timing 291*20f7b1b7SMarek Vasut * 292*20f7b1b7SMarek Vasut ************************************************************************* 293*20f7b1b7SMarek Vasut */ 294*20f7b1b7SMarek Vasut#ifndef CONFIG_SKIP_LOWLEVEL_INIT 295*20f7b1b7SMarek Vasutcpu_init_crit: 296*20f7b1b7SMarek Vasut /* 297*20f7b1b7SMarek Vasut * flush v4 I/D caches 298*20f7b1b7SMarek Vasut */ 299*20f7b1b7SMarek Vasut mov r0, #0 300*20f7b1b7SMarek Vasut mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */ 301*20f7b1b7SMarek Vasut mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */ 3022cad92fdSMarek Vasut 303*20f7b1b7SMarek Vasut /* 304*20f7b1b7SMarek Vasut * disable MMU stuff and caches 305*20f7b1b7SMarek Vasut */ 306*20f7b1b7SMarek Vasut mrc p15, 0, r0, c1, c0, 0 307*20f7b1b7SMarek Vasut bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 308*20f7b1b7SMarek Vasut bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 309*20f7b1b7SMarek Vasut orr r0, r0, #0x00000002 @ set bit 2 (A) Align 310*20f7b1b7SMarek Vasut orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 311*20f7b1b7SMarek Vasut mcr p15, 0, r0, c1, c0, 0 31284ad6884SPeter Tyser 313*20f7b1b7SMarek Vasut mov pc, lr /* back to my caller */ 314*20f7b1b7SMarek Vasut#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 31584ad6884SPeter Tyser 316401bb30bSAneesh V#ifndef CONFIG_SPL_BUILD 317*20f7b1b7SMarek Vasut/* 318*20f7b1b7SMarek Vasut ************************************************************************* 319*20f7b1b7SMarek Vasut * 320*20f7b1b7SMarek Vasut * Interrupt handling 321*20f7b1b7SMarek Vasut * 322*20f7b1b7SMarek Vasut ************************************************************************* 323*20f7b1b7SMarek Vasut */ 324*20f7b1b7SMarek Vasut@ 325*20f7b1b7SMarek Vasut@ IRQ stack frame. 326*20f7b1b7SMarek Vasut@ 32784ad6884SPeter Tyser#define S_FRAME_SIZE 72 32884ad6884SPeter Tyser 32984ad6884SPeter Tyser#define S_OLD_R0 68 33084ad6884SPeter Tyser#define S_PSR 64 33184ad6884SPeter Tyser#define S_PC 60 33284ad6884SPeter Tyser#define S_LR 56 33384ad6884SPeter Tyser#define S_SP 52 33484ad6884SPeter Tyser 33584ad6884SPeter Tyser#define S_IP 48 33684ad6884SPeter Tyser#define S_FP 44 33784ad6884SPeter Tyser#define S_R10 40 33884ad6884SPeter Tyser#define S_R9 36 33984ad6884SPeter Tyser#define S_R8 32 34084ad6884SPeter Tyser#define S_R7 28 34184ad6884SPeter Tyser#define S_R6 24 34284ad6884SPeter Tyser#define S_R5 20 34384ad6884SPeter Tyser#define S_R4 16 34484ad6884SPeter Tyser#define S_R3 12 34584ad6884SPeter Tyser#define S_R2 8 34684ad6884SPeter Tyser#define S_R1 4 34784ad6884SPeter Tyser#define S_R0 0 34884ad6884SPeter Tyser 34984ad6884SPeter Tyser#define MODE_SVC 0x13 350*20f7b1b7SMarek Vasut#define I_BIT 0x80 35184ad6884SPeter Tyser 352*20f7b1b7SMarek Vasut/* 353*20f7b1b7SMarek Vasut * use bad_save_user_regs for abort/prefetch/undef/swi ... 354*20f7b1b7SMarek Vasut * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling 355*20f7b1b7SMarek Vasut */ 35684ad6884SPeter Tyser 35784ad6884SPeter Tyser .macro bad_save_user_regs 358*20f7b1b7SMarek Vasut sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack 359*20f7b1b7SMarek Vasut stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 36084ad6884SPeter Tyser 361*20f7b1b7SMarek Vasut ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack 362*20f7b1b7SMarek Vasut ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) 363*20f7b1b7SMarek Vasut add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack 36484ad6884SPeter Tyser 36584ad6884SPeter Tyser add r5, sp, #S_SP 36684ad6884SPeter Tyser mov r1, lr 367*20f7b1b7SMarek Vasut stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr 368*20f7b1b7SMarek Vasut mov r0, sp @ save current stack into r0 (param register) 36984ad6884SPeter Tyser .endm 37084ad6884SPeter Tyser 37184ad6884SPeter Tyser .macro irq_save_user_regs 37284ad6884SPeter Tyser sub sp, sp, #S_FRAME_SIZE 373*20f7b1b7SMarek Vasut stmia sp, {r0 - r12} @ Calling r0-r12 374*20f7b1b7SMarek Vasut add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good. 375*20f7b1b7SMarek Vasut stmdb r8, {sp, lr}^ @ Calling SP, LR 376*20f7b1b7SMarek Vasut str lr, [r8, #0] @ Save calling PC 37784ad6884SPeter Tyser mrs r6, spsr 378*20f7b1b7SMarek Vasut str r6, [r8, #4] @ Save CPSR 379*20f7b1b7SMarek Vasut str r0, [r8, #8] @ Save OLD_R0 38084ad6884SPeter Tyser mov r0, sp 38184ad6884SPeter Tyser .endm 38284ad6884SPeter Tyser 38384ad6884SPeter Tyser .macro irq_restore_user_regs 38484ad6884SPeter Tyser ldmia sp, {r0 - lr}^ @ Calling r0 - lr 38584ad6884SPeter Tyser mov r0, r0 38684ad6884SPeter Tyser ldr lr, [sp, #S_PC] @ Get PC 38784ad6884SPeter Tyser add sp, sp, #S_FRAME_SIZE 38884ad6884SPeter Tyser subs pc, lr, #4 @ return & move spsr_svc into cpsr 38984ad6884SPeter Tyser .endm 39084ad6884SPeter Tyser 39184ad6884SPeter Tyser .macro get_bad_stack 392*20f7b1b7SMarek Vasut ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode) 39384ad6884SPeter Tyser 394*20f7b1b7SMarek Vasut str lr, [r13] @ save caller lr in position 0 of saved stack 395*20f7b1b7SMarek Vasut mrs lr, spsr @ get the spsr 396*20f7b1b7SMarek Vasut str lr, [r13, #4] @ save spsr in position 1 of saved stack 39784ad6884SPeter Tyser 39884ad6884SPeter Tyser mov r13, #MODE_SVC @ prepare SVC-Mode 399*20f7b1b7SMarek Vasut @ msr spsr_c, r13 400*20f7b1b7SMarek Vasut msr spsr, r13 @ switch modes, make sure moves will execute 401*20f7b1b7SMarek Vasut mov lr, pc @ capture return pc 402*20f7b1b7SMarek Vasut movs pc, lr @ jump to next instruction & switch modes. 403*20f7b1b7SMarek Vasut .endm 404*20f7b1b7SMarek Vasut 405*20f7b1b7SMarek Vasut .macro get_bad_stack_swi 406*20f7b1b7SMarek Vasut sub r13, r13, #4 @ space on current stack for scratch reg. 407*20f7b1b7SMarek Vasut str r0, [r13] @ save R0's value. 408*20f7b1b7SMarek Vasut ldr r0, IRQ_STACK_START_IN @ get data regions start 409*20f7b1b7SMarek Vasut str lr, [r0] @ save caller lr in position 0 of saved stack 410*20f7b1b7SMarek Vasut mrs r0, spsr @ get the spsr 411*20f7b1b7SMarek Vasut str lr, [r0, #4] @ save spsr in position 1 of saved stack 412*20f7b1b7SMarek Vasut ldr r0, [r13] @ restore r0 413*20f7b1b7SMarek Vasut add r13, r13, #4 @ pop stack entry 41484ad6884SPeter Tyser .endm 41584ad6884SPeter Tyser 41684ad6884SPeter Tyser .macro get_irq_stack @ setup IRQ stack 41784ad6884SPeter Tyser ldr sp, IRQ_STACK_START 41884ad6884SPeter Tyser .endm 41984ad6884SPeter Tyser 42084ad6884SPeter Tyser .macro get_fiq_stack @ setup FIQ stack 42184ad6884SPeter Tyser ldr sp, FIQ_STACK_START 42284ad6884SPeter Tyser .endm 423*20f7b1b7SMarek Vasut#endif /* CONFIG_SPL_BUILD */ 42484ad6884SPeter Tyser 425*20f7b1b7SMarek Vasut/* 426*20f7b1b7SMarek Vasut * exception handlers 427*20f7b1b7SMarek Vasut */ 428401bb30bSAneesh V#ifdef CONFIG_SPL_BUILD 4295ab877b6SMarek Vasut .align 5 4305ab877b6SMarek Vasutdo_hang: 431*20f7b1b7SMarek Vasut ldr sp, _TEXT_BASE /* use 32 words about stack */ 4325ab877b6SMarek Vasut bl hang /* hang and never return */ 433*20f7b1b7SMarek Vasut#else /* !CONFIG_SPL_BUILD */ 43484ad6884SPeter Tyser .align 5 43584ad6884SPeter Tyserundefined_instruction: 43684ad6884SPeter Tyser get_bad_stack 43784ad6884SPeter Tyser bad_save_user_regs 43884ad6884SPeter Tyser bl do_undefined_instruction 43984ad6884SPeter Tyser 44084ad6884SPeter Tyser .align 5 44184ad6884SPeter Tysersoftware_interrupt: 442*20f7b1b7SMarek Vasut get_bad_stack_swi 44384ad6884SPeter Tyser bad_save_user_regs 44484ad6884SPeter Tyser bl do_software_interrupt 44584ad6884SPeter Tyser 44684ad6884SPeter Tyser .align 5 44784ad6884SPeter Tyserprefetch_abort: 44884ad6884SPeter Tyser get_bad_stack 44984ad6884SPeter Tyser bad_save_user_regs 45084ad6884SPeter Tyser bl do_prefetch_abort 45184ad6884SPeter Tyser 45284ad6884SPeter Tyser .align 5 45384ad6884SPeter Tyserdata_abort: 45484ad6884SPeter Tyser get_bad_stack 45584ad6884SPeter Tyser bad_save_user_regs 45684ad6884SPeter Tyser bl do_data_abort 45784ad6884SPeter Tyser 45884ad6884SPeter Tyser .align 5 45984ad6884SPeter Tysernot_used: 46084ad6884SPeter Tyser get_bad_stack 46184ad6884SPeter Tyser bad_save_user_regs 46284ad6884SPeter Tyser bl do_not_used 46384ad6884SPeter Tyser 46484ad6884SPeter Tyser#ifdef CONFIG_USE_IRQ 46584ad6884SPeter Tyser 46684ad6884SPeter Tyser .align 5 46784ad6884SPeter Tyserirq: 46884ad6884SPeter Tyser get_irq_stack 46984ad6884SPeter Tyser irq_save_user_regs 47084ad6884SPeter Tyser bl do_irq 47184ad6884SPeter Tyser irq_restore_user_regs 47284ad6884SPeter Tyser 47384ad6884SPeter Tyser .align 5 47484ad6884SPeter Tyserfiq: 47584ad6884SPeter Tyser get_fiq_stack 476*20f7b1b7SMarek Vasut /* someone ought to write a more effiction fiq_save_user_regs */ 477*20f7b1b7SMarek Vasut irq_save_user_regs 478*20f7b1b7SMarek Vasut bl do_fiq 47984ad6884SPeter Tyser irq_restore_user_regs 48084ad6884SPeter Tyser 481*20f7b1b7SMarek Vasut#else 48284ad6884SPeter Tyser 48384ad6884SPeter Tyser .align 5 48484ad6884SPeter Tyserirq: 48584ad6884SPeter Tyser get_bad_stack 48684ad6884SPeter Tyser bad_save_user_regs 48784ad6884SPeter Tyser bl do_irq 48884ad6884SPeter Tyser 48984ad6884SPeter Tyser .align 5 49084ad6884SPeter Tyserfiq: 49184ad6884SPeter Tyser get_bad_stack 49284ad6884SPeter Tyser bad_save_user_regs 49384ad6884SPeter Tyser bl do_fiq 49484ad6884SPeter Tyser 495*20f7b1b7SMarek Vasut#endif 49684ad6884SPeter Tyser .align 5 497401bb30bSAneesh V#endif /* CONFIG_SPL_BUILD */ 498