xref: /openbmc/u-boot/arch/arm/cpu/pxa/cache.c (revision 8f695232)
1 /*
2  * (C) Copyright 2016 Vasily Khoruzhick <anarsoul@gmail.com>
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #include <linux/types.h>
8 #include <common.h>
9 
10 #ifndef CONFIG_SYS_DCACHE_OFF
11 
12 #ifndef CONFIG_SYS_CACHELINE_SIZE
13 #define CONFIG_SYS_CACHELINE_SIZE	32
14 #endif
15 
16 void invalidate_dcache_all(void)
17 {
18 	/* Flush/Invalidate I cache */
19 	asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0));
20 	/* Flush/Invalidate D cache */
21 	asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
22 }
23 
24 void flush_dcache_all(void)
25 {
26 	return invalidate_dcache_all();
27 }
28 
29 void invalidate_dcache_range(unsigned long start, unsigned long stop)
30 {
31 	start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
32 	stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
33 
34 	while (start <= stop) {
35 		asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
36 		start += CONFIG_SYS_CACHELINE_SIZE;
37 	}
38 }
39 
40 void flush_dcache_range(unsigned long start, unsigned long stop)
41 {
42 	return invalidate_dcache_range(start, stop);
43 }
44 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
45 void invalidate_dcache_all(void)
46 {
47 }
48 
49 void flush_dcache_all(void)
50 {
51 }
52 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
53 
54 /*
55  * Stub implementations for l2 cache operations
56  */
57 
58 __weak void l2_cache_disable(void) {}
59 
60 #if defined CONFIG_SYS_THUMB_BUILD
61 __weak void invalidate_l2_cache(void) {}
62 #endif
63