1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2014-2016, Freescale Semiconductor, Inc. 4 */ 5 6 #include <common.h> 7 #include <asm/io.h> 8 #include <asm/system.h> 9 #include <asm/armv8/mmu.h> 10 #include <asm/io.h> 11 #include <asm/arch/mc_me_regs.h> 12 #include "cpu.h" 13 14 u32 cpu_mask(void) 15 { 16 return readl(MC_ME_CS); 17 } 18 19 #ifndef CONFIG_SYS_DCACHE_OFF 20 21 #define S32V234_IRAM_BASE 0x3e800000UL 22 #define S32V234_IRAM_SIZE 0x800000UL 23 #define S32V234_DRAM_BASE1 0x80000000UL 24 #define S32V234_DRAM_SIZE1 0x40000000UL 25 #define S32V234_DRAM_BASE2 0xC0000000UL 26 #define S32V234_DRAM_SIZE2 0x20000000UL 27 #define S32V234_PERIPH_BASE 0x40000000UL 28 #define S32V234_PERIPH_SIZE 0x40000000UL 29 30 static struct mm_region s32v234_mem_map[] = { 31 { 32 .virt = S32V234_IRAM_BASE, 33 .phys = S32V234_IRAM_BASE, 34 .size = S32V234_IRAM_SIZE, 35 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 36 PTE_BLOCK_OUTER_SHARE 37 }, { 38 .virt = S32V234_DRAM_BASE1, 39 .phys = S32V234_DRAM_BASE1, 40 .size = S32V234_DRAM_SIZE1, 41 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 42 PTE_BLOCK_OUTER_SHARE 43 }, { 44 .virt = S32V234_PERIPH_BASE, 45 .phys = S32V234_PERIPH_BASE, 46 .size = S32V234_PERIPH_SIZE, 47 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 48 PTE_BLOCK_NON_SHARE 49 /* TODO: Do we need these? */ 50 /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */ 51 }, { 52 .virt = S32V234_DRAM_BASE2, 53 .phys = S32V234_DRAM_BASE2, 54 .size = S32V234_DRAM_SIZE2, 55 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) | 56 PTE_BLOCK_OUTER_SHARE 57 }, { 58 /* List terminator */ 59 0, 60 } 61 }; 62 63 struct mm_region *mem_map = s32v234_mem_map; 64 65 #endif 66 67 /* 68 * Return the number of cores on this SOC. 69 */ 70 int cpu_numcores(void) 71 { 72 int numcores; 73 u32 mask; 74 75 mask = cpu_mask(); 76 numcores = hweight32(cpu_mask()); 77 78 /* Verify if M4 is deactivated */ 79 if (mask & 0x1) 80 numcores--; 81 82 return numcores; 83 } 84 85 #if defined(CONFIG_ARCH_EARLY_INIT_R) 86 int arch_early_init_r(void) 87 { 88 int rv; 89 asm volatile ("dsb sy"); 90 rv = fsl_s32v234_wake_seconday_cores(); 91 92 if (rv) 93 printf("Did not wake secondary cores\n"); 94 95 asm volatile ("sev"); 96 return 0; 97 } 98 #endif /* CONFIG_ARCH_EARLY_INIT_R */ 99