1 /* 2 * (C) Copyright 2014-2016, Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/system.h> 10 #include <asm/armv8/mmu.h> 11 #include <asm/io.h> 12 #include <asm/arch/mc_me_regs.h> 13 #include "cpu.h" 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 u32 cpu_mask(void) 18 { 19 return readl(MC_ME_CS); 20 } 21 22 #ifndef CONFIG_SYS_DCACHE_OFF 23 24 #define S32V234_IRAM_BASE 0x3e800000UL 25 #define S32V234_IRAM_SIZE 0x800000UL 26 #define S32V234_DRAM_BASE1 0x80000000UL 27 #define S32V234_DRAM_SIZE1 0x40000000UL 28 #define S32V234_DRAM_BASE2 0xC0000000UL 29 #define S32V234_DRAM_SIZE2 0x20000000UL 30 #define S32V234_PERIPH_BASE 0x40000000UL 31 #define S32V234_PERIPH_SIZE 0x40000000UL 32 33 static struct mm_region s32v234_mem_map[] = { 34 { 35 .base = S32V234_IRAM_BASE, 36 .size = S32V234_IRAM_SIZE, 37 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 38 PTE_BLOCK_OUTER_SHARE 39 }, { 40 .base = S32V234_DRAM_BASE1, 41 .size = S32V234_DRAM_SIZE1, 42 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 43 PTE_BLOCK_OUTER_SHARE 44 }, { 45 .base = S32V234_PERIPH_BASE, 46 .size = S32V234_PERIPH_SIZE, 47 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 48 PTE_BLOCK_NON_SHARE 49 /* TODO: Do we need these? */ 50 /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */ 51 }, { 52 .base = S32V234_DRAM_BASE2, 53 .size = S32V234_DRAM_SIZE2, 54 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) | 55 PTE_BLOCK_OUTER_SHARE 56 }, { 57 /* List terminator */ 58 0, 59 } 60 }; 61 62 struct mm_region *mem_map = s32v234_mem_map; 63 64 #endif 65 66 /* 67 * Return the number of cores on this SOC. 68 */ 69 int cpu_numcores(void) 70 { 71 int numcores; 72 u32 mask; 73 74 mask = cpu_mask(); 75 numcores = hweight32(cpu_mask()); 76 77 /* Verify if M4 is deactivated */ 78 if (mask & 0x1) 79 numcores--; 80 81 return numcores; 82 } 83 84 #if defined(CONFIG_ARCH_EARLY_INIT_R) 85 int arch_early_init_r(void) 86 { 87 int rv; 88 asm volatile ("dsb sy"); 89 rv = fsl_s32v234_wake_seconday_cores(); 90 91 if (rv) 92 printf("Did not wake secondary cores\n"); 93 94 asm volatile ("sev"); 95 return 0; 96 } 97 #endif /* CONFIG_ARCH_EARLY_INIT_R */ 98