1 /* 2 * (C) Copyright 2014-2016, Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <asm/io.h> 9 #include <asm/system.h> 10 #include <asm/armv8/mmu.h> 11 #include <asm/io.h> 12 #include <asm/arch/mc_me_regs.h> 13 #include "cpu.h" 14 15 DECLARE_GLOBAL_DATA_PTR; 16 17 u32 cpu_mask(void) 18 { 19 return readl(MC_ME_CS); 20 } 21 22 #ifndef CONFIG_SYS_DCACHE_OFF 23 24 #define S32V234_IRAM_BASE 0x3e800000UL 25 #define S32V234_IRAM_SIZE 0x800000UL 26 #define S32V234_DRAM_BASE1 0x80000000UL 27 #define S32V234_DRAM_SIZE1 0x40000000UL 28 #define S32V234_DRAM_BASE2 0xC0000000UL 29 #define S32V234_DRAM_SIZE2 0x20000000UL 30 #define S32V234_PERIPH_BASE 0x40000000UL 31 #define S32V234_PERIPH_SIZE 0x40000000UL 32 33 static struct mm_region s32v234_mem_map[] = { 34 { 35 .virt = S32V234_IRAM_BASE, 36 .phys = S32V234_IRAM_BASE, 37 .size = S32V234_IRAM_SIZE, 38 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 39 PTE_BLOCK_OUTER_SHARE 40 }, { 41 .virt = S32V234_DRAM_BASE1, 42 .phys = S32V234_DRAM_BASE1, 43 .size = S32V234_DRAM_SIZE1, 44 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | 45 PTE_BLOCK_OUTER_SHARE 46 }, { 47 .virt = S32V234_PERIPH_BASE, 48 .phys = S32V234_PERIPH_BASE, 49 .size = S32V234_PERIPH_SIZE, 50 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | 51 PTE_BLOCK_NON_SHARE 52 /* TODO: Do we need these? */ 53 /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */ 54 }, { 55 .virt = S32V234_DRAM_BASE2, 56 .phys = S32V234_DRAM_BASE2, 57 .size = S32V234_DRAM_SIZE2, 58 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) | 59 PTE_BLOCK_OUTER_SHARE 60 }, { 61 /* List terminator */ 62 0, 63 } 64 }; 65 66 struct mm_region *mem_map = s32v234_mem_map; 67 68 #endif 69 70 /* 71 * Return the number of cores on this SOC. 72 */ 73 int cpu_numcores(void) 74 { 75 int numcores; 76 u32 mask; 77 78 mask = cpu_mask(); 79 numcores = hweight32(cpu_mask()); 80 81 /* Verify if M4 is deactivated */ 82 if (mask & 0x1) 83 numcores--; 84 85 return numcores; 86 } 87 88 #if defined(CONFIG_ARCH_EARLY_INIT_R) 89 int arch_early_init_r(void) 90 { 91 int rv; 92 asm volatile ("dsb sy"); 93 rv = fsl_s32v234_wake_seconday_cores(); 94 95 if (rv) 96 printf("Did not wake secondary cores\n"); 97 98 asm volatile ("sev"); 99 return 0; 100 } 101 #endif /* CONFIG_ARCH_EARLY_INIT_R */ 102